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@inproceedings{DBLP:conf/vlsit/0001AFWLWKBS22,
author = {Qirui Zhang and
Hyochan An and
Zichen Fan and
Zhehong Wang and
Ziyun Li and
Guanru Wang and
Hun{-}Seok Kim and
David T. Blaauw and
Dennis Sylvester},
title = {A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM
for Fully-on-Chip Intelligence},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {72--73},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830340},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830340},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/0001AFWLWKBS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/0001KPPCCK22,
author = {Su{-}Hyun Han and
Bumjun Kim and
Seonghyeok Park and
Yongjae Park and
Jung{-}Hoon Chun and
Jaehyuk Choi and
Seong{-}Jin Kim},
title = {A 100{\texttimes}80 {CMOS} Flash LiDAR Sensor with 0.0011mm\({}^{\mbox{2}}\)
In-Pixel Histogramming {TDC} Based on Analog Counter and Self-Calibrated
Single-Slope {ADC}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {82--83},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830305},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830305},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/0001KPPCCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/0002OPJBRGK22,
author = {Yusung Kim and
Clifford Ong and
Anandkumar Mahadevan Pillai and
Harish Jagadeesh and
Gwanghyeon Baek and
Iqbal Rajwani and
Zheng Guo and
Eric Karl},
title = {Energy-Efficient High Bandwidth 6T {SRAM} Design on Intel 4 {CMOS}
Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {212--213},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830148},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830148},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/0002OPJBRGK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/0005LLJKCOL22,
author = {Jaehoon Lee and
Yong Lim and
Jongmi Lee and
Taejin Jang and
Kwonwoo Kang and
Jongpil Cho and
Seunghyun Oh and
Jongwoo Lee},
title = {A 0.56mW 63.6dB {SNDR} 250MS/s {SAR} {ADC} in 8nm FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {90--92},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830180},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830180},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/0005LLJKCOL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AabrarKLKCJYD22,
author = {Khandker Akif Aabrar and
Sharadindu Gopal Kirtania and
A. Lu and
A. Khanna and
Wriddhi Chakraborty and
M. San Jose and
Shimeng Yu and
Suman Datta},
title = {A Thousand State Superlattice(SL) {FEFET} Analog Weight Cell},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {242--243},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830333},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830333},
timestamp = {Wed, 24 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AabrarKLKCJYD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AcharyaPBGVILWM22,
author = {Rohith Acharya and
Anton Potocnik and
Steven Brebels and
Alexander Grill and
Jeroen Verjauw and
Tsvetan Ivanov and
Daniel Perez Lozano and
Danny Wan and
Fahd A. Mohiyaddin and
Jacques Van Damme and
A. M. Vadiraj and
Massimo Mongillo and
Georges G. E. Gielen and
Francky Catthoor and
Jan Craninckx and
Iuliana P. Radu and
Bogdan Govoreanu},
title = {Scalable 1.4 {\(\mu\)}W cryo-CMOS {SP4T} multiplexer operating at
10 mK for high-fidelity superconducting qubit measurements},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {230--231},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830396},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830396},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AcharyaPBGVILWM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AhmedLSA22,
author = {Karim Ali Ahmed and
Longyang Lin and
Praveenakumar Shivappa Salamani and
Massimo Alioto},
title = {Imager with Dynamic {LSB} Adaptation and Ratiometric Readout for Low-Bit
Depth 5-{\(\mu\)}W Peak Power in Purely-Harvested Systems},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {50--51},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830147},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830147},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AhmedLSA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AkazawaWSSOTTT22,
author = {Tomohiro Akazawa and
D. Wu and
Kai Sumita and
N. Sekine and
Makoto Okano and
Kasidit Toprasertpong and
Shinichi Takagi and
Mitsuru Takenaka},
title = {Low-capacitance Ultrathin InGaAs Membrane Photodetector on Si Slot
Waveguide towards Receiver-less System},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {411--412},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830204},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830204},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/AkazawaWSSOTTT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AkkayaCLWC22,
author = {Nail Etkin Can Akkaya and
Gary Chan and
Hung{-}Jen Liao and
Yih Wang and
Jonathan Chang},
title = {A 135.6Tbps/W 2R2W {SRAM} with 12T Logic Bit-cell with Vmin Down to
335mV Targeted for Machine-Learning Applications in 6nm FinFET {CMOS}
Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {110--111},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830214},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830214},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AkkayaCLWC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AlamHTKPORDHH22,
author = {Md Nur K. Alam and
Yusuke Higashi and
Brecht Truijen and
Ben Kaczer and
Mihaela Ioana Popovici and
Bj O'Sullivan and
Philippe Roussel and
Robin Degraeve and
Marc M. Heyns and
Jan Van Houdt},
title = {Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET
and nFET from simultaneous {PV} and {IV} measurements},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {340--342},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830476},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830476},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AlamHTKPORDHH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AtzeniIJNGCLHJ22,
author = {Gabriele Atzeni and
Rosario M. Incandela and
Youngwoo Ji and
Alessandro Novello and
Hesam Ghiasi and
Giorgio Cristiano and
Jiawei Liao and
Qiuting Huang and
Taekwang Jang},
title = {An Impedance-boosted Switched-capacitor Low-noise Amplifier Achieving
0.4 {NEF}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {116--117},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830399},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830399},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/AtzeniIJNGCLHJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/AtzeniLLNLMBLCN22,
author = {Gabriele Atzeni and
Jongyup Lim and
Jiawei Liao and
Alessandro Novello and
Jungho Lee and
Eunseong Moon and
Michael Barrow and
Joseph G. Letner and
Joseph T. Costello and
Samuel R. Nason and
Paras R. Patel and
Parag G. Patil and
Hun{-}Seok Kim and
Cynthia A. Chestek and
Jamie Phillips and
David T. Blaauw and
Taekwang Jang},
title = {A 260{\texttimes}274 {\(\mu\)}m\({}^{\mbox{2}}\) 572 nW Neural Recording
Micromote Using Near-Infrared Power Transfer and an {RF} Data Uplink},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {64--65},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830516},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830516},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/AtzeniLLNLMBLCN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BaeCKPK22,
author = {Hong{-}Hyun Bae and
Jeong{-}Hyun Cho and
Gyeong{-}Gu Kang and
Yousung Park and
Hyun{-}Sik Kim},
title = {A 97.6{\%}-Efficient 1-2MHz Hysteretic Buck Converter with 7V/{\(\mu\)}s
DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {194--195},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830181},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830181},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/BaeCKPK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BaekBLPLSLS22,
author = {Goeun Baek and
Seunghun Bae and
Minki Lee and
Hyuncheol Park and
Kangseop Lee and
Jae{-}Yoon Sim and
Moonjoo Lee and
Ho{-}Jin Song},
title = {13-K Tnoise Cryo-CMOS Parametric Amplifier at 80 mK for Quantum Computers},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {236--237},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830358},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830358},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/BaekBLPLSLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BagherbeikXMKTS22,
author = {Mohammad Bagherbeik and
Wentao Xu and
Seyed Farzad Mousavi and
Kouichi Kanda and
Hirotaka Tamura and
Ali Sheikholeslami},
title = {{MAQO:} {A} Scalable Many-Core Annealer for Quadratic Optimization},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {76--77},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830468},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830468},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/BagherbeikXMKTS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BaikSLKCGL22,
author = {Seungyeob Baik and
Taeryoung Seol and
Sehwan Lee and
Geunha Kim and
SeongHwan Cho and
Arup K. George and
Junghyup Lee},
title = {A 2.54{\(\mu\)}J{\(\bullet\)}ppm\({}^{\mbox{2}}\)-FOMS Supply- and
Temperature-Independent Time-Locked {\(\Delta\)}{\(\Sigma\)} Capacitance-to-Digital
Converter in 0.18-{\(\mu\)}m {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {114--115},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830524},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830524},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/BaikSLKCGL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BrinkYWLS22,
author = {Martin van den Brink and
Anthony Yen and
Paul van Wijnen and
Michael Lercel and
Boudewijn Sluijk},
title = {Holistic Patterning to Advance Semiconductor Manufacturing in the
2020s and Beyond},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {3--7},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830360},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830360},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/BrinkYWLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/BroganR22,
author = {Lee Brogan and
Jon Reid},
title = {Impact of Material Interface Geometry on Interconnect Resistance},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {425--426},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830209},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830209},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/BroganR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/CaiBRFGNJTCK22,
author = {Kaiming Cai and
Simon Van Beek and
Siddharth Rao and
K. Fan and
M. Gupta and
V. D. Nguyen and
Ganesh Jayakumar and
Giacomo Talmelli and
S. Couet and
Gouri Sankar Kar},
title = {Selective operations of multi-pillar {SOT-MRAM} for high density and
low power embedded memories},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {375--376},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830307},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830307},
timestamp = {Wed, 24 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/CaiBRFGNJTCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Cao022,
author = {Qiankai Cao and
Jie Gu},
title = {A Sparse Convolution Neural Network Accelerator for 3D/4D Point-Cloud
Image Recognition on Low Power Mobile Device with Hopping-Index Rule
Book for Efficient Coordinate Management},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {106--107},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830178},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830178},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Cao022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/CarselloFKKLMNS22,
author = {Alex Carsello and
Kathleen Feng and
Taeyoung Kong and
Kalhan Koul and
Qiaoyi Liu and
Jackson Melchert and
Gedeon Nyengele and
Maxwell Strange and
Keyi Zhang and
Ankita Nayak and
Jeff Setter and
James Thomas and
Kavya Sreedhar and
Po{-}Han Chen and
Nikhil Bhagdikar and
Zachary Myers and
Brandon D'Agostino and
Pranil Joshi and
Stephen Richardson and
Rick Bahr and
Christopher Torng and
Mark Horowitz and
Priyanka Raina},
title = {Amber: {A} 367 GOPS, 538 {GOPS/W} 16nm SoC with a Coarse-Grained Reconfigurable
Array for Flexible Acceleration of Dense Linear Algebra},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {70--71},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830509},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830509},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/CarselloFKKLMNS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChakrabortySGSS22,
author = {Wriddhi Chakraborty and
P. Shrestha and
A. Gupta and
Rakshith Saligram and
Samuel Spetalnick and
J. Campbell and
Arijit Raychowdhury and
Suman Datta},
title = {Multi-bit per-cell 1T SiGe Floating Body {RAM} for Cache Memory in
Cryogenic Computing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {302--303},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830483},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830483},
timestamp = {Mon, 29 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChakrabortySGSS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChandALCHTFVT22,
author = {Umesh Chand and
Mohamed M. Sabry Aly and
Manohar Lal and
Chen Chun{-}Kuei and
Sonu Hooda and
Shih{-}Hao Tsai and
Zihang Fang and
Hasita Veluri and
Aaron Voon{-}Yew Thean},
title = {Sub-10nm Ultra-thin ZnO Channel {FET} with Record-High 561 {\(\mathrm{\mu}\)}A/{\(\mathrm{\mu}\)}m
{ION} at {VDS} 1V, High {\(\mathrm{\mu}\)}-84 cm\({}^{\mbox{2}}\)/V-s
and1T-1RRAM Memory Cell Demonstration Memory Implications for Energy-Efficient
Deep-Learning Computing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {326--327},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830250},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830250},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChandALCHTFVT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChangR22,
author = {Dong{-}Jin Chang and
Seung{-}Tak Ryu},
title = {A Relative-Prime Rotation Based Fully On-Chip Background Skew Calibration
for Time-Interleaved ADCs},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {174--175},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830416},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830416},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChangR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Chen0CL22,
author = {Ruicong Chen and
Hanrui Wang and
Anantha P. Chandrakasan and
Hae{-}Seung Lee},
title = {RaM-SAR: {A} Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s
Secure Random-Mapping {SAR} {ADC} with Power and {EM} Side-channel
Attack Resilience},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {94--95},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830365},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830365},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Chen0CL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenHQYLMWW22,
author = {Wei{-}Chen Chen and
F. Huang and
S. Qin and
Z. Yu and
Q. Lin and
Paul C. McIntyre and
S. S. Wong and
H.{-}S. Philip Wong},
title = {4 Bits/cell Hybrid 1F1R for High Density Embedded Non-Volatile Memory
and its Application for Compute in Memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {244--245},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830242},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830242},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ChenHQYLMWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenKTK22,
author = {Gregory K. Chen and
Phil C. Knag and
Carlos Tokunaga and
Ram K. Krishnamurthy},
title = {An 8-core {RISC-V} Processor with Compute near Last Level Cache in
Intel 4 {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {68--69},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830518},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830518},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChenKTK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenNYLLLHDLWWL22,
author = {Kaifei Chen and
Jiebin Niu and
Guanhua Yang and
Menggan Liu and
Wendong Lu and
Fuxi Liao and
Kailiang Huang and
XinLv Duan and
Congyan Lu and
Jiawei Wang and
Lingfei Wang and
Mengmeng Li and
Di Geng and
Chao Zhao and
Guilei Wang and
Nianduan Lu and
Ling Li and
Ming Liu},
title = {Scaling Dual-Gate Ultra-thin a-IGZO {FET} to 30 nm Channel Length
with Record-high Gm, max of 559 {\(\mathrm{\mu}\)}S/{\(\mathrm{\mu}\)}m
at VDS=1 V, Record-low {DIBL} of 10 mV/V and Nearly Ideal {SS} of
63 mV/dec},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {298--299},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830389},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830389},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChenNYLLLHDLWWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenSSJMSWLKVMZ22,
author = {Rongmei Chen and
Giuliano Sisto and
Michele Stucchi and
Anne Jourdain and
Kenichi Miyaguchi and
Pieter Schuddinck and
P. Woeltgens and
H. Lin and
Naveen Kakarla and
Anabela Veloso and
Dragomir Milojevic and
Odysseas Zografos and
Pieter Weckx and
Geert Hellings and
Geert Van der Plas and
Julien Ryckaert and
Eric Beyne},
title = {Backside {PDN} and 2.5D {MIMCAP} to Double Boost 2D and 3D ICs IR-Drop
beyond 2nm Node},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {429--430},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830328},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830328},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChenSSJMSWLKVMZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenYSTFHFYMDKB22,
author = {Kuan{-}Yu Chen and
Chi{-}Sheng Yang and
Yu{-}Hsiu Sun and
Chien{-}Wei Tseng and
Morteza Fayazi and
Xin He and
Siying Feng and
Yufan Yue and
Trevor N. Mudge and
Ronald G. Dreslinski and
Hun{-}Seok Kim and
David T. Blaauw},
title = {A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for
Wireless Communication and Linear-Algebra Kernels in 12nm {FINFET}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {202--203},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830330},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830330},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChenYSTFHFYMDKB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenYWCKCP22,
author = {Cheng Chen and
Joonseok Yang and
Hui Wang and
Zhidong Cao and
Siavash Kananian and
Kevin Chen and
Ada S. Y. Poon},
title = {A 90-{\(\mu\)}W Penny-Sized 1.2-gram Wireless {EEG} Recorder with
12-Channel {FDMA} Transmitter for Month-Long Continuous Mental Health
Monitoring},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {248--249},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830202},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830202},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChenYWCKCP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChenZZZJWZKZWKS22,
author = {Yue Chen and
Gong Zhang and
Jiuren Zhou and
Zijie Zheng and
Leming Jiao and
Haibo Wang and
Zuopu Zhou and
Annie Kumar and
Jishen Zhang and
Yuxuan Wang and
Qiwen Kong and
Chen Sun and
Xiao Gong},
title = {First Demonstration of Fully CMOS-compatible Non-volatile Programmable
Photonic Switch Enabled by Ferroelectric-SOI Waveguide for Next Generation
Photonic Integrated Circuit},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {405--406},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830262},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830262},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ChenZZZJWZKZWKS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChiangWLNWHCCZL22,
author = {H.{-}L. Chiang and
J.{-}F. Wang and
K.{-}H. Lin and
C.{-}H. Nien and
J.{-}J. Wu and
Kuo{-}Yu Hsiang and
C.{-}P. Chuu and
Y.{-}W. Chen and
X. W. Zhang and
C. W. Liu and
Tahui Wang and
C. C. Wang and
Min{-}Hung Lee and
M.{-}F. Chang and
C.{-}S. Chang and
T. C. Chen},
title = {Interfacial-Layer Design for Hf1-xZrxO2-Based {FTJ} Devices: From
Atom to Array},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {361--362},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830462},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830462},
timestamp = {Wed, 03 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ChiangWLNWHCCZL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChienCCYHHCWTL22,
author = {Jun{-}Chau Chien and
Zong{-}Jun Cheng and
Shu{-}Yan Chuang and
Hsiu{-}Cheng Yeh and
Guan{-}Yu Huang and
Hung{-}Yu Hou and
Yi{-}Ting Chen and
Wei{-}Yang Weng and
Chi{-}Yang Tseng and
Liang{-}In Lin},
title = {A Scalable Standing-Wave-Oscillator-based Imager with Near-Field-Modulated
Pixels Achieving 64{\%} Filling Factor for {RF} Intraoperative Imaging},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {162--163},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830290},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830290},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChienCCYHHCWTL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoBLKYK22,
author = {Jeong{-}Hyun Cho and
Hong{-}Hyun Bae and
Gyu{-}Wan Lim and
Tae{-}Hwang Kong and
Jun{-}Hyeok Yang and
Hyun{-}Sik Kim},
title = {A Fully-Integrated 0.9W/mm\({}^{\mbox{2}}\) 79.1{\%}-Efficiency 200MHz
Multi-Phase Buck Converter with Flying-Capacitor-Based Inter-Inductor
Current Balancing Technique},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {196--197},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830282},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830282},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChoBLKYK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoKOKSBKBSJ22,
author = {Keonhee Cho and
Giseok Kim and
Ji Sang Oh and
Ki{-}Ryong Kim and
Changsu Sim and
Younmee Bae and
Mijung Kim and
Sangyeop Baeck and
Taejoong Song and
Seong{-}Ook Jung},
title = {A 14-nm Low Voltage {SRAM} with Charge-Recycling and Charge Self-Saving
Techniques for Low-Power Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {214--215},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830353},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830353},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ChoKOKSBKBSJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ChoeRLHLRLAKKY22,
author = {Gihun Choe and
Prasanna Venkatesan Ravindran and
Anni Lu and
Jae Hur and
Maximilian Lederer and
Andr{\'{e}} Reck and
Sarah Lombardo and
Nashrah Afroze and
Josh Kacher and
Asif Islam Khan and
Shimeng Yu},
title = {Machine Learning Assisted Statistical Variation Analysis of Ferroelectric
Transistors: From Experimental Metrology to Predictive Modeling},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {336--337},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830392},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830392},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ChoeRLHLRLAKKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Chou0RLDSWBZ22,
author = {Teyuh Chou and
Wei Tang and
Mihai D. Rotaru and
Chester Liu and
Rahul Dutta and
Sharon Lim Pei Siang and
David Ho Soon Wee and
Surya Bhattacharya and
Zhengya Zhang},
title = {NetFlex: {A} 22nm Multi-Chiplet Perception Accelerator in High-Density
Fan-Out Wafer-Level Packaging},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {208--209},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830249},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830249},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Chou0RLDSWBZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/CorrellJSLZTWEB22,
author = {Justin M. Correll and
Lu Jie and
Seungheun Song and
Seungjong Lee and
Junkang Zhu and
Wei Tang and
Luke Wormald and
Jack Erhardt and
Nicolas Breil and
Roger Quon and
Deepak Kamalanathan and
Siddarth A. Krishnan and
Michael Chudzik and
Zhengya Zhang and
Wei D. Lu and
Michael P. Flynn},
title = {An 8-bit 20.7 {TOPS/W} Multi-Level Cell ReRAM-based Compute Engine},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {264--265},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830490},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830490},
timestamp = {Thu, 16 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/CorrellJSLZTWEB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DeavilleZV22,
author = {Peter Deaville and
Bonan Zhang and
Naveen Verma},
title = {A 22nm 128-kb {MRAM} Row/Column-Parallel In-Memory Computing Macro
with Memory-Resistance Boosting and Multi-Column {ADC} Readout},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {268--269},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830153},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830153},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/DeavilleZV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DesaiKKSWCLRTD22,
author = {Nachiket V. Desai and
Harish K. Krishnamurthy and
Suhwan Kim and
Christopher Schaef and
Sheldon Weng and
Beomseok Choi and
William J. Lambert and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {Fully Integrated Voltage Regulators with Package-Embedded Inductors
for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm {CMOS}
Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled
ON-Time Discontinuous Conduction Mode {(DCM)} Operation},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {192--193},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830385},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830385},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/DesaiKKSWCLRTD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DicksonDCKMCFBB22,
author = {Timothy O. Dickson and
Zeynep Toprak Deniz and
Martin Cochet and
Marcel A. Kossel and
Thomas Morf and
Young{-}Ho Choi and
Pier Andrea Francese and
Matthias Br{\"{a}}ndli and
Troy J. Beukema and
Christian W. Baks and
Jonathan E. Proesel and
John F. Bulzacchelli and
Michael P. Beakes and
Byoung{-}Joo Yoo and
Hyoungbae Ahn and
Dong{-}Hyuk Lim and
Gunil Kang and
Sang{-}Hune Park and
Mounir Meghelli and
Hyo{-}Gyuem Rhew and
Daniel J. Friedman and
Michael Choi and
Mehmet Soyuer and
Jongshin Shin},
title = {A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET {CMOS}
for 200+Gb/s Serial Links},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {28--29},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830421},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830421},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/DicksonDCKMCFBB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DoTR22,
author = {Nhan Do and
Hieu Tran and
Mark Reiten},
title = {Computing-in-Memory with SuperFlash{\textregistered} memBrain{\texttrademark}
Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {238--239},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830145},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830145},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/DoTR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/EnthovenSGBS22,
author = {Luc Enthoven and
Job van Staveren and
Jiang Gong and
Masoud Babaie and
Fabio Sebastiano},
title = {A 3V 15b 157{\(\mu\)}W Cryo-CMOS {DAC} for Multiplexed Spin-Qubit
Biasing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {228--229},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830309},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830309},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/EnthovenSGBS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FanA0X0TPCLLWLW22,
author = {Zichen Fan and
Hyochan An and
Qirui Zhang and
Boxun Xu and
Li Xu and
Chien{-}Wei Tseng and
Yimai Peng and
Ang Cao and
Bowen Liu and
Changwoo Lee and
Zhehong Wang and
Fanghao Liu and
Guanru Wang and
Shenghao Jiang and
Hun{-}Seok Kim and
David T. Blaauw and
Dennis Sylvester},
title = {Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with
Back-Propagation and Dynamic Power Gating},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {18--19},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830226},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830226},
timestamp = {Tue, 23 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/FanA0X0TPCLLWLW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FrutuosoGBBLSLF22,
author = {Tadeu Mota Frutuoso and
Xavier Garros and
Perrine Batude and
Laurent Brunet and
Joris Lacord and
Benoit Skl{\'{e}}nard and
V. Lapras and
Claire Fenouillet{-}B{\'{e}}ranger and
M. Ribotta and
A. Magalhaes{-}Lucas and
J. Kanyandekwe and
R. Kies and
G. Romano and
Edoardo Catapano and
Mika{\"{e}}l Cass{\'{e}} and
Jose Lugo{-}Alvarez and
Philippe Ferrari and
Fred Gaillard},
title = {Methodology for Active Junction Profile Extraction in thin film {FD-SOI}
Enabling performance driver identification in 500{\textdegree}C devices
for 3D sequential integration},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {332--333},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830504},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830504},
timestamp = {Tue, 29 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/FrutuosoGBBLSLF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FuLPY22,
author = {Zih{-}Sing Fu and
Yu{-}Chi Lee and
Alex Park and
Chia{-}Hsiang Yang},
title = {A 40-nm 646.6TOPS/W Sparsity-Scaling {DNN} Processor for On-Device
Training},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {40--41},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830487},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830487},
timestamp = {Mon, 08 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/FuLPY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FuketaAIKM22,
author = {Hiroshi Fuketa and
Ippei Akita and
Tomohiro Ishikawa and
Hanpei Koike and
Takahiro Mori},
title = {A Cryogenic {CMOS} Current Comparator for Spin Qubit Readout Achieving
Fast Readout Time and High Current Resolution},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {234--235},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830225},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830225},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/FuketaAIKM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/FukutomeSKMKEKY22,
author = {H. Fukutome and
K. Suh and
W. Kim and
Y. Moriyama and
S. Kang and
B. Eom and
J. Kim and
C. Yoon and
W. Kwon and
Y. Chung and
Y. Nam and
Y. Kim and
S. Park and
J. Park and
H.{-}J. Cho and
K. Rim and
S. D. Kwon},
title = {Comprehensive Feasibility Study of Single {FIN} Transistors for Scaling
Both Switching Energy and Device Footprint},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {369--370},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830184},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830184},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/FukutomeSKMKEKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GaoFHSSAB22,
author = {Zhong Gao and
Martin Fritz and
Jingchu He and
Gerd Spalink and
Robert Bogdan Staszewski and
Morteza S. Alavi and
Masoud Babaie},
title = {A DPLL-Based Phase Modulator Achieving -46dB {EVM} with {A} Fast Two-Step
{DCO} Nonlinearity Calibration and Non-Uniform Clock Compensation},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {14--15},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830398},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830398},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GaoFHSSAB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GeumLJAKSKPBJK22,
author = {Dae{-}Myeong Geum and
Jinha Lim and
Junho Jang and
Seungyeop Ahn and
SeongKwang Kim and
Joonsup Shim and
Bong Ho Kim and
Juhyuk Park and
Woo Jin Baek and
Jaeyong Jeong and
Sanghyeon Kim},
title = {A sub-micron-thick InGaAs broadband {(400-1700} nm) photodetectors
with a high external quantum efficiency ({\textgreater}70{\%})},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {413--414},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830388},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830388},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GeumLJAKSKPBJK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GhadamiLCTCLHRM22,
author = {Omid Ghadami and
Hongyu Lu and
Matthew R. Chan and
Mila Tan and
Saeromi Chung and
Sang Heon Lee and
Matthew T. Holden and
Ryan de Ridder and
Barry Merriman and
Drew A. Hall},
title = {Helix: An Electrochemical {CMOS} {DNA} Synthesizer},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {66--67},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830446},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830446},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GhadamiLCTCLHRM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GongZR22,
author = {Minxiang Gong and
Xin Zhang and
Arijit Raychowdhury},
title = {A 90.4{\%} Peak Efficiency 48V/1V Three-Level Hybrid Dickson Converter
with Gradient Descent Run-Time Optimizer and GaN/Si Hybrid Conversion},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {176--177},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830284},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830284},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GongZR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GulveSDSNRCXWGL22,
author = {Rahul Gulve and
Navid Sarhangnejad and
Gairik Dutta and
Motasem Sakr and
Don Nguyen and
Roberto Rangel and
Wenzheng Chen and
Zhengfan Xia and
Mian Wei and
Nikita Gusev and
Esther Y. H. Lin and
Xiaonong Sun and
Leo Hanxu and
Nikola Katic and
Ameer Abdelhadi and
Andreas Moshovos and
Kiriakos N. Kutulakos and
Roman Genov},
title = {A 39, 000 Subexposures/s {CMOS} Image Sensor with Dual-tap Coded-exposure
Data-memory Pixel for Adaptive Single-shot Computational Imaging},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {78--79},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830315},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830315},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GulveSDSNRCXWGL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/GuoSWDHWFCHXGJY22,
author = {Jingrui Guo and
Ying Sun and
Lingfei Wang and
Xinlv Duan and
Kailiang Huang and
Zhaogui Wang and
Junxiao Feng and
Qian Chen and
Shijie Huang and
Lihua Xu and
Di Geng and
Guangfan Jiao and
Shihui Yin and
Zhengbo Wang and
Weiliang Jing and
Ling Li and
Ming Liu},
title = {Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability
and {BTI} Impact on Device and Capacitor-less {DRAM} Retention Reliability},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {300--301},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830482},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830482},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/GuoSWDHWFCHXGJY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HaK22,
author = {Daewon Ha and
Hyoung{-}Sub Kim},
title = {Prospective Innovation of DRAM, Flash, and Logic Technologies for
Digital Transformation {(DX)} Era},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {417--418},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830465},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830465},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HaK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HanKCKKBK22,
author = {Hyun{-}Ki Han and
Min{-}Woo Ko and
Jeong{-}Hyun Cho and
Gyeong{-}Gu Kang and
Seok{-}Tae Koh and
Hong{-}Hyun Bae and
Hyun{-}Sik Kim},
title = {A Monolithic 48V-to-1V 10A Quadruple Step-Down {DC-DC} Converter with
Hysteretic Copied On-Time 4-Phase Control and 2{\texttimes} Slew Rate
All-Hysteretic Mode},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {182--183},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830233},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830233},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HanKCKKBK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HasebeEMIYTNWMK22,
author = {Kazunori Hasebe and
Shinichirou Etou and
Daisuke Miyazaki and
Taiki Iguchi and
Yuki Yagishita and
Mika Takasaki and
Takeru Nogamida and
Hiroyuki Watanabe and
Tomohiro Matsumoto and
Yasushi Katayama},
title = {A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping {SAR} {ADC} with Improved
Mismatch Error Shaping and Speed-Up Techniques},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {56--57},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830166},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830166},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HasebeEMIYTNWMK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HatakeyamaONMTA22,
author = {Kunihiro Hatakeyama and
Yu Okubo and
Tomohiro Nakagome and
Masahiro Makino and
Hiroshi Takashima and
Takahiro Akutsu and
Takehide Sawamoto and
Masanori Nagase and
Tatsuo Noguchi and
Shoji Kawahito},
title = {A Hybrid Indirect ToF Image Sensor for Long-Range 3D Depth Measurement
under High Ambient Light Conditions},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {46--47},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830139},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830139},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HatakeyamaONMTA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HongCHLCSCYWRLC22,
author = {Ming{-}Chun Hong and
Yao{-}Jen Chang and
Yu{-}Chen Hsin and
Liang{-}Ming Liu and
Kuan{-}Ming Chen and
Yi{-}Hui Su and
Guan{-}Long Chen and
Shan{-}Yi Yang and
I{-}Jung Wang and
Sk. Ziaur Rahaman and
Hsin{-}Han Lee and
Shih{-}Ching Chiu and
Chen{-}Yi Shih and
Chih{-}Yao Wang and
Fang{-}Ming Chen and
Jeng{-}Hua Wei and
Shyh{-}Shyuan Sheu and
Wei{-}Chung Lo and
Minn{-}Tsong Lin and
Chih{-}I Wu and
Tuo{-}Hung Hou},
title = {A 4K-400K Wide Operating-Temperature-Range {MRAM} Technology with
Ultrathin Composite Free Layer and Magnesium Spacer},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {379--380},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830503},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830503},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/HongCHLCSCYWRLC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HongLHHWCLC22,
author = {Zhong{-}Jie Hong and
Demin Liu and
Shu{-}Ting Hsieh and
Han{-}Wen Hu and
Ming{-}Wei Weng and
Chih{-}I Cho and
Jui{-}Han Liu and
Kuan{-}Neng Chen},
title = {Room Temperature Cu-Cu Direct Bonding Using Wetting/Passivation Scheme
for 3D Integration and Packaging},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {387--388},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830175},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830175},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HongLHHWCLC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HosseiniKSJCKLR22,
author = {Kaveh Hosseini and
Edwin Kok and
Sergey Y. Shumarayev and
Daniel Jeong and
Allen Chan and
Austin Katzin and
Songtao Liu and
Radek Roucka and
Manan Raval and
Minh Mac and
Chia{-}Pin Chiu and
Thungoc Tran and
Kumar Abhishek Singh and
Sangeeta Raman and
Yanjing Ke and
Chen Li and
Li{-}Fan Yang and
Paulo Chao and
Haiwei Lu and
Fernando Luna and
Xiaoqian Li and
Tim Tri Hoang and
Arnab Sarkar and
Asako Toda and
Ravi Mahajan and
Nitin Deshpande and
Conor O'Keeffe and
Uma Krishnamoorthy and
Vladimir Stojanovic and
Christopher Madden and
Chong Zhang and
Matthew Sysak and
Pavan Bhargava and
Chen Sun and
Mark Wade},
title = {5.12 Tbps Co-Packaged {FPGA} and Silicon Photonics Interconnect {I/O}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {260--261},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830221},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830221},
timestamp = {Tue, 20 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HosseiniKSJCKLR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HsiehCTLLLHSGC22,
author = {E. R. Hsieh and
J. K. Chang and
T. Y. Tang and
Y. J. Li and
C. W. Liang and
M. Y. Lin and
S. Y. Huang and
C. J. Su and
J. C. Guo and
Steve S. Chung},
title = {NVDimm-FE: {A} High-density 3D Architecture of 3-bit/c 2TnCFE to Break
Great Memory Wall with 10 ns of PGM-pulse, 10\({}^{\mbox{10}}\) Cycles
of Endurance, and Decade Lifetime at 103 {\textdegree}C},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {359--360},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830515},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830515},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HsiehCTLLLHSGC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Hsu00RSM0TD22,
author = {Steven Hsu and
Amit Agarwal and
Mark A. Anders and
Arnab Raha and
Raymond Sung and
Deepak Mathaikutty and
Ram Krishnamurthy and
James W. Tschanz and
Vivek De},
title = {2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with
Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {22--23},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830489},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830489},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Hsu00RSM0TD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuangDFSLCJLSYS22,
author = {Kailiang Huang and
Xinlv Duan and
Junxiao Feng and
Ying Sun and
Congyan Lu and
Chuanke Chen and
Guangfan Jiao and
Xinpeng Lin and
Jinhai Shao and
Shihui Yin and
Jiazhen Sheng and
Zhaogui Wang and
Wenqiang Zhang and
Xichen Chuai and
Jiebin Niu and
Wenwu Wang and
Ying Wu and
Weiliang Jing and
Zhengbo Wang and
Jeffrey Xu and
Guanhua Yang and
Di Geng and
Ling Li and
Ming Liu},
title = {Vertical Channel-All-Around {(CAA)} {IGZO} {FET} under 50 nm {CD}
with High Read Current of 32.8 {\(\mu\)}A/{\(\mu\)}m (Vth + 1 V),
Well-performed Thermal Stability up to 120 {\unicode{8451}} for Low
Latency, High-density 2T0C 3D {DRAM} Application},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {296--297},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830271},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830271},
timestamp = {Thu, 05 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/HuangDFSLCJLSYS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuangLCLCLCY22,
author = {Wen{-}Cong Huang and
I{-}Ting Lin and
Wen{-}Ching Chen and
Liang{-}Yi Lin and
Nian{-}Shyang Chang and
Chun{-}Pin Lin and
Chi{-}Shi Chen and
Chia{-}Hsiang Yang},
title = {A 28-nm 25.1 {TOPS/W} Sparsity-Aware {CNN-GCN} Deep Learning SoC for
Mobile Augmented Reality},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {42--43},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830261},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830261},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HuangLCLCLCY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuangRM22,
author = {Yuanqing Huang and
Yogesh Ramadass and
Dongsheng Brian Ma},
title = {A 90.7{\%} 4-W 3P4S Hybrid Switching Converter Using Adaptive {VCF}
Rebalancing Technique and Switching Node Dual-Edge tdead Modulation
for Extreme 48V/1V Direct {DC-DC} Conversion},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {178--179},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830419},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830419},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HuangRM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuhBLK22,
author = {Yeunhee Huh and
Chisung Bae and
Hankyu Lee and
Sang Joon Kim},
title = {A 0.7 mm\({}^{\mbox{2}}\) Power Management Unit for Implantable Electroceutical
Device with a 91.4 {\%} Peak Efficiency Buck-based Hybrid Step-up
and -down {MISIMO} Converter},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {198--199},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830197},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830197},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HuhBLK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HungSPHCHKJ22,
author = {Phan Dang Hung and
Hongseok Shin and
Yechan Park and
Kim{-}Hoang Nguyen and
Donghee Cho and
Sohmyung Ha and
Chul Kim and
Minkyu Je},
title = {A 96.5{\%}-Power-Efficiency Hybrid Buck-Boost Photovoltaic Energy
Harvester Employing Adaptive {FOCV} {MPPT} Control for {\textgreater}98{\%}
{MPPT} Efficiency Across a 10, 000{\texttimes} Dynamic Range},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {200--201},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830494},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830494},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HungSPHCHKJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HuoCY22,
author = {Zongliang Huo and
Weihua Cheng and
Simon Yang},
title = {Unleash Scaling Potential of 3D {NAND} with Innovative Xtacking{\textregistered}
Architecture},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {254--255},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830285},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830285},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HuoCY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/HutchinsLSCHBKK22,
author = {Stafford Hutchins and
Jiabo Li and
Atresh Sanne and
Zhanping Chen and
Mohammad M. Hasan and
Uddalak Bhattacharya and
Eric Karl and
Jaydeep P. Kulkarni},
title = {A High Output Power 1V Charge Pump and Power Switch for Configurable,
In-Field-Programmable Metal eFuse on Intel 4 Logic Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {136--137},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830275},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830275},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/HutchinsLSCHBKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/IdeKKYFPSO22,
author = {Michihiro Ide and
Yuasa Keito and
Sena Kato and
Dongwon You and
Ashbir Aviat Fadila and
Jian Pang and
Atsushi Shirane and
Kenichi Okada},
title = {A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering
Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power
Transfer},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {96--97},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830286},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830286},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/IdeKKYFPSO22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JainGRBMV22,
author = {Vikram Jain and
Juan Sebastian Piedrahita Giraldo and
Jaro De Roose and
Bert Boons and
Linyan Mei and
Marian Verhelst},
title = {TinyVers: {A} 0.8-17 TOPS/W, 1.7 {\(\mu\)}W-20 mW, Tiny Versatile
System-on-chip with State-Retentive eMRAM for Machine Learning Inference
at the Extreme Edge},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {20--21},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830409},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830409},
timestamp = {Wed, 02 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/JainGRBMV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JeongKKGLPK22,
author = {Jaeyong Jeong and
Seong Kwang Kim and
Jongmin Kim and
Dae{-}Myeong Geum and
Jisung Lee and
Seung{-}Young Park and
Sanghyeon Kim},
title = {3D stackable cryogenic InGaAs HEMTs for heterogeneous and monolithic
3D integrated highly scalable quantum computing systems},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {328--329},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830449},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830449},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/JeongKKGLPK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JeongYHJ22,
author = {Kyeongwon Jeong and
Gichan Yun and
Sohmyung Ha and
Minkyu Je},
title = {A 600mVPP-Input-Range 94.5dB-SNDR NS-SAR-Nested {DSM} with 4\({}^{\mbox{th}}\)-Order
Truncation-Error Shaping and Input-Impedance Boosting for Biosignal
Acquisition},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {52--53},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830401},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830401},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/JeongYHJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JianC22,
author = {Wei{-}Jhih Jian and
Wei{-}Zen Chen},
title = {A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs
Periodic Jitter Sensitivity and 275 fsrms Resolution with Background
Self-Calibration},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {8--9},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830159},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830159},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/JianC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JiangLHY22,
author = {Hongwu Jiang and
Wantong Li and
Shanshi Huang and
Shimeng Yu},
title = {A 40nm Analog-Input ADC-Free Compute-in-Memory {RRAM} Macro with Pulse-Width
Modulation between Sub-arrays},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {266--267},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830211},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830211},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/JiangLHY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JiangXCMDSBJCAN22,
author = {Zhouhang Jiang and
Yi Xiao and
Swetaki Chatterjee and
Halid Mulaosmanovic and
Stefan D{\"{u}}nkel and
Steven Soss and
Sven Beyer and
Rajiv V. Joshi and
Yogesh Singh Chauhan and
Hussam Amrouch and
Vijaykrishnan Narayanan and
Kai Ni},
title = {Asymmetric Double-Gate Ferroelectric {FET} to Decouple the Tradeoff
Between Thickness Scaling and Memory Window},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {395--396},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830172},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830172},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/JiangXCMDSBJCAN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JoLBLCKJPYLYSKK22,
author = {H.{-}B. Jo and
I.{-}G. Lee and
J.{-}M. Baek and
S. T. Lee and
S.{-}M. Choi and
H.{-}J. Kim and
H.{-}S. Jeong and
W.{-}S. Park and
J.{-}H. Yoo and
H.{-}Y. Lee and
D. Y. Yun and
SW. Son and
D.{-}H. Ko and
Tae{-}Woo Kim and
H.{-}M. Kwon and
S.{-}K. Kim and
Jun{-}Gyu Kim and
J. Yun and
T. Kim and
J. H. Lee and
J.{-}H. Lee and
C.{-}S. Shin and
K.{-}S. Seo and
Dae{-}Hyun Kim},
title = {Lg = 130 nm {GAA} MBCFETs with three-level stacked In0.53Ga0.47As
nanosheets},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {397--398},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830243},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830243},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/JoLBLCKJPYLYSKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/JoshiTTYC22,
author = {Rajiv V. Joshi and
John Timmerwilke and
Kevin Tien and
Mark Yeck and
Sudipto Chakraborty},
title = {A 0.31V Vmin Cryogenic {SRAM} in 14 nm FinFET for Quantum Computing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {232--233},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830190},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830190},
timestamp = {Wed, 02 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/JoshiTTYC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KamKL22,
author = {Dongyun Kam and
Byeong Yong Kong and
Youngjoo Lee},
title = {A 1.1{\(\mu\)}s 1.56Gb/s/mm\({}^{\mbox{2}}\) Cost-Efficient Large-List
{SCL} Polar Decoder Using Fully-Reusable {LLR} Buffers in 28nm {CMOS}
Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {204--205},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830317},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830317},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KamKL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KangLSCK22,
author = {Gyeong{-}Gu Kang and
Ji{-}Hun Lee and
Se{-}Un Shin and
Gyu{-}Hyeong Cho and
Hyun{-}Sik Kim},
title = {A 5.6W-Power 96.6{\%}-Efficiency Boost-Oriented {SIDO} Step-Up/Down
{DC-DC} Converter Embedding Buck Conversion with an Energy-Balancing
Capacitor},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {180--181},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830464},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830464},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KangLSCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KangPHCCK22,
author = {Jubin Kang and
Yongjae Park and
Jung{-}Hye Hwang and
Jung{-}Hoon Chun and
Jaehyuk Choi and
Seong{-}Jin Kim},
title = {A 640{\texttimes}480 Indirect Time-of-Flight Image Sensor with Tetra
Pixel Architecture for Tap Mismatch Calibration and Motion Artifact
Suppression},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {44--45},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830477},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830477},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KangPHCCK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KellerVDTZDGK22,
author = {Ben Keller and
Rangharajan Venkatesan and
Steve Dai and
Stephen G. Tell and
Brian Zimmer and
William J. Dally and
C. Thomas Gray and
Brucek Khailany},
title = {A 17-95.6 {TOPS/W} Deep Learning Inference Accelerator with Per-Vector
Scaled 4-bit Quantization for Transformers in 5nm},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {16--17},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830277},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830277},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KellerVDTZDGK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KhanPWWKKRNASLO22,
author = {Asir Intisar Khan and
Christopher Perez and
Xiangjin Wu and
Byoungjun Won and
Kangsik Kim and
Heungdong Kwon and
Pranav Ramesh and
Kathryn M. Neilson and
Mehdi Asheghi and
Krishna Saraswat and
Zonghoon Lee and
Il{-}Kwon Oh and
H.{-}S. Philip Wong and
Kenneth E. Goodson and
Eric Pop},
title = {First Demonstration of Ge2Sb2Te5-Based Superlattice Phase Change Memory
with Low Reset Current Density ({\textasciitilde}3 MA/cm\({}^{\mbox{2}}\))
and Low Resistance Drift ({\textasciitilde}0.002 at 105{\textdegree}C)},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {310--311},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830348},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830348},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/KhanPWWKKRNASLO22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KhannaYLBJCYFD22,
author = {Abhishek Khanna and
Huacheng Ye and
Y. Luo and
G. Bajpai and
M. San Jose and
Wriddhi Chakraborty and
Shimeng Yu and
Patrick Fay and
Suman Datta},
title = {{BEOL} Compatible Ferroelectric Routers for Run-time Reconfigurable
Compute-in-Memory Accelerators},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {240--241},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830498},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830498},
timestamp = {Tue, 14 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/KhannaYLBJCYFD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimKUKKY22,
author = {Sangyeob Kim and
Sangjin Kim and
Soyeon Um and
Soyeon Kim and
Kwantae Kim and
Hoi{-}Jun Yoo},
title = {Neuro-CIM: {A} 310.4 {TOPS/W} Neuromorphic Computing-in-Memory Processor
with Low {WL/BL} activity and Digital-Analog Mixed-mode Neuron Firing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {38--39},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830276},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830276},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KimKUKKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimKYKMSJ22,
author = {Ji{-}Young Kim and
Taeryeong Kim and
Jeonghyeok You and
Ki{-}Ryong Kim and
Byoung{-}Mo Moon and
Kyomin Sohn and
Seong{-}Ook Jung},
title = {A Low Power {TSV} {I/O} with Data Rate up to 10 Gb/s for Next Generation
{HBM}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {152--153},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830160},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830160},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KimKYKMSJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimLLLLJKNKKNPL22,
author = {Seki Kim and
Hyongmin Lee and
Yongjin Lee and
Dongha Lee and
Byeongbae Lee and
Jahoon Jin and
Susie Kim and
Miri Noh and
Kwonwoo Kang and
Sangho Kim and
Takahiro Nomiyama and
Ji{-}Seon Paek and
Jongwoo Lee},
title = {A 3nm {GAAFET} Analog Assisted Digital {LDO} with High Current Density
for Dynamic Voltage Scaling Mobile Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {190--191},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830252},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830252},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/KimLLLLJKNKKNPL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KimPLHY22,
author = {Youngmin Kim and
Hongjong Park and
Iljin Lee and
Joonhoi Hur and
Sangmin Yoo},
title = {High Efficiency 29-/38-GHz Hybrid Transceiver Front-Ends Utilizing
Si {CMOS} and GaAs {HEMT} for 5G {NR} Millimeter-Wave Mobile Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {124--125},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830256},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830256},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KimPLHY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KitamuraKHBKKTT22,
author = {Shota Kitamura and
Naohiko Kimizuka and
Akiko Honjo and
Koichi Baba and
Toshihiro Kurobe and
Hideomi Kumano and
Takuya Toyofuku and
Kouhei Takeuchi and
Shota Nishimura and
Akihiko Kato and
Tomoyuki Hirano and
Yusuke Oike},
title = {Low-Noise Multi-Gate Pixel Transistor for Sub-Micron Pixel {CMOS}
Image Sensors},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {347--348},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830386},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830386},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KitamuraKHBKKTT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KobinataFSMHAIH22,
author = {Kyosuke Kobinata and
Tatsuya Funaki and
Yoshiaki Satake and
Hitoshi Matsuno and
Seiji Hidaka and
Shunsuke Abe and
Hiroyuki Ito and
Chih{-}Cheng Hsiao and
Sheng Yi Li and
Young{-}Suk Kim and
Takayuki Ohba},
title = {Low-ESL ({\textless}1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded
in 3D Functional Interposer for Power Delivery Network},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {385--386},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830411},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830411},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KobinataFSMHAIH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KooDNSLOHLCCS22,
author = {Byeongwoo Koo and
Sunghan Do and
Sang{-}Pil Nam and
Heewook Shin and
Sungno Lee and
Eunhye Oh and
Jaemin Hong and
Jung{-}Ho Lee and
Youngjae Cho and
Michael Choi and
Jongshin Shin},
title = {A 12-bit 8GS/s {RF} Sampling {DAC} with Code-Dependent Nonlinearity
Compensation and Intersegmental Current-Mismatch Calibration in 5nm
FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {86--87},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830442},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830442},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KooDNSLOHLCCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KumarST0H0DM22,
author = {Raghavan Kumar and
Vikram B. Suresh and
Sachin Taneja and
Mark A. Anders and
Steven Hsu and
Amit Agarwal and
Vivek De and
Sanu Mathew},
title = {A 7Gbps SCA-Resistant Multiplicative-Masked {AES} Engine in Intel
4 {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {138--139},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830470},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830470},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KumarST0H0DM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KuoK22,
author = {Chia{-}Chi Kuo and
Rihito Kuroda},
title = {A 4-Tap {CMOS} Time-of-Flight Image Sensor with In-pixel Analog Memory
Array Achieving 10Kfps High-Speed Range Imaging and Depth Precision
Enhancement},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {48--49},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830420},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830420},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/KuoK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/KwonWKSCJKJJKEP22,
author = {Woohyun Kwon and
Hyosup Won and
Taeho Kim and
Ha{-}Il Song and
Hanho Choi and
Sejun Jeon and
Soon{-}Won Kwon and
Huxian Jin and
Jun{-}Gi Jo and
Tai Young Kim and
Jake Eu and
Jinho Park and
Hyeon{-}Min Bae},
title = {A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation
{(FPWM)} for Extended Reach Optical Links in 28nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {156--157},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830361},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830361},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/KwonWKSCJKJJKEP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Lee22,
author = {Seok{-}Hee Lee},
title = {The Rise of Memory in the Ever-Changing {AI} Era - From Memory to
More-Than-Memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {272--275},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830265},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830265},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Lee22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeKLBHLMH22,
author = {Jangseop Lee and
Seonghun Kim and
Sangmin Lee and
Sanghyun Ban and
Seongjae Heo and
Donghwa Lee and
Oleksandr Mosendz and
Hyunsang Hwang},
title = {Improving the SiGeAsTe Ovonic Threshold Switching {(OTS)} Characteristics
by Microwave Annealing for Excellent Endurance ({\textgreater} 10\({}^{\mbox{11}}\))
and Low Drift Characteristics},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {320--321},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830179},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830179},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LeeKLBHLMH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeKSKF22,
author = {Seungjong Lee and
Taewook Kang and
Seungheun Song and
Kyumin Kwon and
Michael P. Flynn},
title = {An 81.6dB {SNDR} 15.625MHz {BW} 3\({}^{\mbox{rd}}\) Order {CT} {SDM}
with a True {TI} {NS} Quantizer},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {54--55},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830207},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830207},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LeeKSKF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeLCLHHWLSC22,
author = {Shuenn{-}Yuh Lee and
Hao{-}Yun Lee and
Ding{-}Siang Ciou and
Zhan{-}Xian Liao and
Peng{-}Wei Huang and
Yi{-}Ting Hsieh and
Yi{-}Chieh Wei and
Chia{-}Yu Lin and
Meng{-}Dar Shieh and
Ju{-}Yi Chen},
title = {A Wireless Urine Detection System and Platform with Power-Efficient
Electrochemical Readout {ASIC} and {ABTS-CNT} Biosensor},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {246--247},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830325},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830325},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LeeLCLHHWLSC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeLLMFSCCC22,
author = {Chia{-}Fu Lee and
Cheng{-}Han Lu and
Cheng{-}En Lee and
Haruki Mori and
Hidehiro Fujiwara and
Yi{-}Chun Shih and
Tan{-}Li Chou and
Yu{-}Der Chih and
Tsung{-}Yung Jonathan Chang},
title = {A 12nm 121-TOPS/W 41.6-TOPS/mm2 All Digital Full Precision SRAM-based
Compute-in-Memory with Configurable Bit-width For {AI} Edge Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {24--25},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830438},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830438},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LeeLLMFSCCC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeLSSCJ22,
author = {Yunhee Lee and
Woonghee Lee and
Minkyo Shim and
Soyeong Shin and
Woo{-}Seok Choi and
Deog{-}Kyoon Jeong},
title = {0.41-pJ/b/dB Asymmetric Simultaneous Bidirectional Transceivers With
{PAM-4} Forward and {PAM-2} Back Channels for 5-m Automotive Camera
Link},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {30--31},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830299},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830299},
timestamp = {Mon, 30 Oct 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LeeLSSCJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeePPKDLLSOCCS22,
author = {Kyung{-}Hoon Lee and
Jinwoo Park and
Younghyo Park and
Byeongwoo Koo and
Sunghan Do and
Woongtaek Lim and
Sungno Lee and
Hyochul Shin and
Eunhye Oh and
Youngjae Cho and
Michael Choi and
Jongshin Shin},
title = {An Automotive {ASIL-D} Safety Mechanism in {ADC} and {DAC} for Communication
Application},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {142--143},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830347},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830347},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LeePPKDLLSOCCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LeeSLKB22,
author = {Inhak Lee and
Dongwook Seo and
Yunrong Li and
Mijoung Kim and
Sangyeop Baeck},
title = {4nm Voltage Auto-Tracking {SRAM} Pulse Generator with Fully {RC} Optimized
Row Auto-Tracking Write Assist Circuits},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {218--219},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830456},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830456},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LeeSLKB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiDF22,
author = {You Li and
David E. Duarte and
Yongping Fan},
title = {A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class
{CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {118--119},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830436},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830436},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LiDF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiHSCLCYCHCWLWL22,
author = {Ming{-}Yang Li and
Ching{-}Hao Hsu and
Shin{-}Wei Shen and
Ang{-}Sheng Chou and
Yuxuan Cosmi Lin and
Chih{-}Piao Chuu and
Ning Yang and
Sui{-}An Chou and
Lin{-}Yun Huang and
Chao{-}Ching Cheng and
Wei{-}Yen Woon and
Szuya Liao and
Chih{-}I Wu and
Lain{-}Jong Li and
Iuliana P. Radu and
H.{-}S. Philip Wong and
Han Wang},
title = {Wafer-Scale Bi-Assisted Semi-Auto Dry Transfer and Fabrication of
High-Performance Monolayer {CVD} {WS2} Transistor},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {290--291},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830376},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830376},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LiHSCLCYCHCWLWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiKMKGPLHPLLCHO22,
author = {Yunlong Li and
Gauri Karve and
Pawel E. Malinowski and
Joo Hyoung Kim and
Epimitheas Georgitzikis and
Vladimir Pejovic and
Myung{-}Jin Lim and
Luis Moreno Hagelsieb and
Renaud Puybaret and
Itai Lieberman and
Jiwon Lee and
David Cheyns and
Paul Heremans and
Haris Osman and
Deniz Sabuncuoglu Tezcan},
title = {Wafer Level Pixelation of Colloidal Quantum Dot Image Sensors},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {349--350},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830334},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830334},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LiKMKGPLHPLLCHO22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiPZYWLCLTGWFYO22,
author = {Zheng Li and
Jian Pang and
Yi Zhang and
Yudai Yamazaki and
Qiaoyu Wang and
Peng Luo and
Weichu Chen and
Yijing Liao and
Minzhe Tang and
Zhengyan Guo and
Yun Wang and
Xi Fu and
Dongwon You and
Naoki Oshima and
Shinichi Hori and
Kazuaki Kunihiro and
Atsushi Shirane and
Kenichi Okada},
title = {A 39-GHz {CMOS} Bi-Directional Doherty Phased-Array Beamformer Using
Shared-LUT {DPD} with Inter-Element Mismatch Compensation Technique
for 5G Base-Station},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {98--99},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830274},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830274},
timestamp = {Tue, 26 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LiPZYWLCLTGWFYO22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiSCH22,
author = {Hanyue Li and
Yuting Shen and
Eugenio Cantatore and
Pieter Harpe},
title = {A First-Order Continuous-Time Noise-Shaping {SAR} {ADC} with Duty-Cycled
Integrator},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {58--59},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830373},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830373},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LiSCH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiaoASZLNWSY22,
author = {Pai{-}Ying Liao and
Sami Alajlouni and
Mengwei Si and
Zhuocheng Zhang and
Zehao Lin and
Jinhyun Noh and
Calista Wilk and
Ali Shakouri and
Peide D. Ye},
title = {Thermal Studies of BEOL-compatible Top-Gated Atomically Thin {ALD}
In2O3 FETs},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {322--323},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830279},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830279},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LiaoASZLNWSY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LiaoHLTLLHWCRTC22,
author = {C.{-}Y. Liao and
K.{-}Y. Hsiang and
Z.{-}F. Lou and
H.{-}C. Tseng and
C.{-}Y. Lin and
Z.{-}X. Li and
F.{-}C. Hsieh and
C. C. Wang and
F.{-}S. Chang and
W.{-}C. Ray and
Y.{-}Y. Tseng and
Shu{-}Tong Chang and
T. C. Chen and
Min{-}Hung Lee},
title = {Endurance {\textgreater} 10\({}^{\mbox{11}}\) Cycling of 3D {GAA}
Nanosheet Ferroelectric {FET} with Stacked HfZrO2 to Homogenize Corner
Field Toward Mitigate Dead Zone for High-Density eNVM},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830345},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830345},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LiaoHLTLLHWCRTC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LinMA22,
author = {Xiaohui Lin and
Mohamed Megahed and
Tejasvi Anand},
title = {A Single-Clock-Phase Sense Amplifier Architecture with 9x Smaller
Clock-to-Q Delay Compared to the StrongARM {\&} 6.3dB Lower Noise
Compared to Double-Tail},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {188--189},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830355},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830355},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LinMA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LinSY22,
author = {Zehao Lin and
Mengwei Si and
Peide D. Ye},
title = {Ultra-Fast Operation of BEOL-Compatible Atomic-Layer-Deposited In2O3
Fe-FETs: Achieving Memory Performance Enhancement with Memory Window
of 2.5 {V} and High Endurance {\textgreater} 10\({}^{\mbox{9}}\) Cycles
without {VT} Drift Penalty},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830156},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830156},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LinSY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LivaneliogluCKL22,
author = {Can Livanelioglu and
Woojun Choi and
Donghwan Kim and
Jiawei Liao and
Rosario M. Incandela and
Giorgio Cristiano and
Taekwang Jang},
title = {A 0.0014 mm\({}^{\mbox{2}}\), 1.18 T{\(\Omega\)} Segmented Duty-Cycled
Resistor Replacing Pseudo-Resistor for Neural Recording Interface
Circuits},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {62--63},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830140},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830140},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LivaneliogluCKL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LoWY22,
author = {Yu{-}Chen Lo and
Yi{-}Chung Wu and
Chia{-}Hsiang Yang},
title = {A 44.3mW 62.4fps Hyperspectral Image Processor for {MAV} Remote Sensing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {74--75},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830370},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830370},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LoWY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LuoXFYYLHH22,
author = {Jin Luo and
Weikai Xu and
Boyi Fu and
Zheru Yu and
Mengxuan Yang and
Yiqing Li and
Qianqian Huang and
Ru Huang},
title = {A Novel Ambipolar Ferroelectric Tunnel FinFET based Content Addressable
Memory with Ultra-low Hardware Cost and High Energy Efficiency for
Machine Learning},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {226--227},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830413},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830413},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/LuoXFYYLHH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/LyuSSWLCYY22,
author = {Xiao Lyu and
Pragya R. Shrestha and
Mengwei Si and
Panni Wang and
Junkang Li and
Kin P. Cheung and
Shimeng Yu and
Peide D. Ye},
title = {Determination of Domain Wall Velocity and Nucleation Time by Switching
Dynamics Studies of Ferroelectric Hafnium Zirconium Oxide},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {338--339},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830501},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830501},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/LyuSSWLCYY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MaxeyNOPOMDRHTA22,
author = {Kirby Maxey and
C. H. Naylor and
K. P. O'Brien and
A. Penumatcha and
Adedapo Oni and
C. Mokhtarzadeh and
C. J. Dorow and
C. Rogan and
B. Holybee and
T. Tronic and
D. Adams and
N. Arefin and
A. Sen Gupta and
C.{-}C. Lin and
T. Zhong and
S. Lee and
A. Kitamura and
R. Bristol and
S. B. Clendenning and
U. Avci and
M. Metz},
title = {300 mm {MOCVD} 2D {CMOS} Materials for More (Than) Moore Scaling},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {419--420},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830457},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830457},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/MaxeyNOPOMDRHTA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/Mii22,
author = {Yuh{-}Jier Mii},
title = {Semiconductor Innovations, from Device to System},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {276--281},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830423},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830423},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/Mii22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MoonOPLPLHSCCS22,
author = {Kyoung{-}Jun Moon and
Dong{-}Ryeol Oh and
Young{-}Hyo Park and
Kyung{-}Hoon Lee and
Sun{-}Jae Park and
Sung{-}No Lee and
Hee{-}Chang Hwang and
Hyo{-}Chul Shin and
Young{-}Jae Cho and
Michael Choi and
Jongshin Shin},
title = {A 12-bit 10GS/s 16-Channel Time-Interleaved {ADC} with a Digital Processing
Timing-Skew Background Calibration in 5nm FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {172--173},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830208},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830208},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/MoonOPLPLHSCCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MorookaIKKKHSKA22,
author = {T. Morooka and
T. Ishikawa and
M. Komura and
T. Kato and
Y. Koyama and
Y. Han and
Y. Sugawara and
D. Kuwabara and
Y. Arayashiki and
A. Murayama and
K. Nishiyama and
K. Sugimae and
T. Ogura and
H. Takeda and
N. Kariya and
Y. Goki and
S. Konuma and
Y. Kamiya and
H. Yamashita and
H. Shiga and
K. Itagaki and
R. Tanaka and
T. Maeda and
N. Ohtani and
M. Fujiwara},
title = {Optimal Cell Structure/Operation Design of 3D Semicircular Split-gate
Cells for Ultra-high-density Flash Memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {308--309},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830513},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830513},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/MorookaIKKKHSKA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MorrisLWSABRB22,
author = {Daniel H. Morris and
Huichu Liu and
Tony F. Wu and
Huseyin Ekin Sumbul and
Elnaz Ansari and
Alexandre Barachant and
Jonathan Reid and
Edith Beign{\'{e}}},
title = {Co-Optimization of {SRAM} Circuits with Sequential Access Patterns
in a 7nm SoC Achieving 58{\%} Memory Energy Reduction for {AR} Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {216--217},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830251},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830251},
timestamp = {Mon, 01 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/MorrisLWSABRB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/MurdochOMPTDKOT22,
author = {Gayle Murdoch and
Matin O'Toole and
Giulio Marti and
Ankit Pokhrel and
Diana Tsvetanova and
Stefan Decoster and
Shreya Kundu and
Yusuke Oniki and
Arame Thiam and
Quoc Toan Le and
Olalla Varela Pedreira and
Alicja Lesniewska and
Gerardo Martinez{-}Alanis and
Seongho Park and
Zsolt Tokei},
title = {First demonstration of Two Metal Level Semi-damascene Interconnects
with Fully Self-aligned Vias at 18MP},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830150},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830150},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/MurdochOMPTDKOT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NakoTNTT22,
author = {Eishin Nako and
Kasidit Toprasertpong and
Ryosho Nakane and
Mitsuru Takenaka and
Shinichi Takagi},
title = {Experimental demonstration of novel scheme of HZO/Si FeFET reservoir
computing with parallel data processing for speech recognition},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {220--221},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830412},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830412},
timestamp = {Wed, 03 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/NakoTNTT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NiebojewskiBNBP22,
author = {Heimanu Niebojewski and
Benoit Bertrand and
E. Nowak and
Thomas Bedecarrats and
Bruna Cardoso Paz and
Lauriane Contamin and
Pierre{-}Andr{\'{e}} Mortemousque and
V. Labracherie and
L. Brevard and
H. Sahin and
Jean Charbonnier and
C. Thomas and
Myriam Assous and
Mika{\"{e}}l Cass{\'{e}} and
Matias Urdampilleta and
Yann{-}Michel Niquet and
Fran{\c{c}}ois Perruchot and
Fred Gaillard and
Silvano De Franceschi and
Tristan Meunier and
Maud Vinet},
title = {Specificities of linear Si {QD} arrays integration and characterization},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {415--416},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830352},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830352},
timestamp = {Fri, 04 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/NiebojewskiBNBP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NishiPCSZTTN0DG22,
author = {Yoshinori Nishi and
John W. Poulton and
Xi Chen and
Sanquan Song and
Brian Zimmer and
Walker J. Turner and
Stephen G. Tell and
Nikola Nedovic and
John M. Wilson and
William J. Dally and
C. Thomas Gray},
title = {A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous
Bidirectional Transceiver for Die-to-Die Interface in 5nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {154--155},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830174},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830174},
timestamp = {Fri, 05 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/NishiPCSZTTN0DG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NishimuraMBLBMM22,
author = {Naoaki Nishimura and
Atsushi Matamura and
Preston Birdsong and
Shaolong Liu and
Abhishek Bandyopadhyay and
Mariana T. Markova and
Rajeev Morajkar},
title = {Common-mode Stable Multilevel Output Stage with {EMI} Reduction Feedback
Loop for Class-D audio Amplifier},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {186--187},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830319},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830319},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/NishimuraMBLBMM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/NogamiGSNPHSLPS22,
author = {Takeshi Nogami and
Oleg Gluschenkov and
Yasir Sulehria and
Son Nguyen and
Brown Peethala and
Huai Huang and
Hosadurga Shobha and
Nick Lanzillo and
Raghuveer Patlolla and
Devika Sil and
Andrew Simon and
Daniel Edelstein and
Nelson Felix and
Junjun Liu and
Toshiyuki Tabata and
Fulvio Mazzamuto and
Sebastien Halty and
Fabien Roz{\'{e}} and
Yasutoshi Okuno and
Akira Uedono},
title = {Advanced {BEOL} Materials, Processes, and Integration to Reduce Line
Resistance of Damascene Cu, Co, and Subtractive Ru Interconnects},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {423--424},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830488},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830488},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/NogamiGSNPHSLPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/OkaIIAKM22,
author = {Hiroshi Oka and
Takumi Inaba and
Shota Iizuka and
Hidehiro Asai and
Kimihiko Kato and
Takahiro Mori},
title = {Effect of Conduction Band Edge States on Coulomb-Limiting Electron
Mobility in Cryogenic {MOSFET} Operation},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {334--335},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830505},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830505},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/OkaIIAKM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PaekLKBL22,
author = {Ji{-}Seon Paek and
Jeongkwang Lee and
Wan Kim and
Jun{-}Suk Bang and
Jongwoo Lee},
title = {Fully Integrated 2x2 {MIMO} Real Simultaneous Dual Band WiFi {CMOS}
Power Amplifiers With a Single Inductor Multiple Output Supply Modulation
Technique},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {104--105},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830469},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830469},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/PaekLKBL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkGBSK22,
author = {Juhyuk Park and
Dae{-}Myeong Geum and
Woojin Baek and
Johnson Shieh and
Sanghyeon Kim},
title = {Monolithic 3D sequential integration realizing 1600-PPI red micro-LED
display on Si {CMOS} driver {IC}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {383--384},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830425},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830425},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ParkGBSK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkLLSSLLCOKJ22,
author = {Jung{-}Hun Park and
Kwang{-}Hoon Lee and
Yongjae Lee and
Jung{-}Woo Sull and
Yoonho Song and
Sanghee Lee and
Hyeonseok Lee and
Hoyeon Cho and
Jonghyun Oh and
Han{-}Gon Ko and
Deog{-}Kyoon Jeong},
title = {A 68.7-fJ/b/mm 375-GB/s/mm Single-Ended {PAM-4} Interface with Per-Pin
Training Sequence for the Next-Generation {HBM} Controller},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {150--151},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830454},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830454},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ParkLLSSLLCOKJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ParkLPSLGJBKHKY22,
author = {Hye Yeon Park and
Yunki Lee and
Jonghoon Park and
Hyunseok Song and
Taesung Lee and
Hyung Keun Gweon and
Yunji Jung and
Jeongmin Bae and
Boseong Kim and
Junwon Han and
Seungwon Kim and
Cheolsang Yoon and
Jeongki Kim and
Changkeun Lee and
Sehoon Yoo and
Euiyeol Kim and
Hyunmin Baek and
Howoo Park and
Bumsuk Kim and
JungChak Ahn and
Joonseo Yim},
title = {Advanced novel optical stack technologies for high {SNR} in {CMOS}
Image Sensor},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {353--354},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830428},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830428},
timestamp = {Tue, 18 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ParkLPSLGJBKHKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PatrickSKNSPKSL22,
author = {Christopher Patrick and
S. C. Song and
Irfan Khan and
Nader Nikfar and
Matt Severson and
Shree Pandey and
Matt Kaiser and
Manav Shah and
Pat Lawlor and
Deb Marich and
Carina Affinito and
Rajeev Jain},
title = {From System-on-Chip (SoC) to System on Multi-Chip (SoMC) architectures:
Scaling integrated systems beyond the limitations of deep-submicron
single chip technologies},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830253},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830253},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/PatrickSKNSPKSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PeetersSSDGSBPW22,
author = {Micha{\"{e}}l Peeters and
S. Sinha and
Xiao Sun and
Claude Desset and
Giuseppe Gramegna and
John Slabbekoorn and
Pieter Bex and
N. Pinho and
Tomas Webers and
Dimitrios Velenis and
A. Miller and
Nadine Collaert and
Geert Van der Plas and
Eric Beyne and
M. Huynen and
R. Broucke},
title = {(Why do we need) Wireless Heterogeneous Integration (anyway?)},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {256--257},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830480},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830480},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/PeetersSSDGSBPW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PengCKCTPBBS22,
author = {Yimai Peng and
Gordy Carichner and
Yejoong Kim and
Li{-}Yu Chen and
R{\'{e}}my Tribhout and
Beno{\^{\i}}t Piranda and
Julien Bourgeois and
David T. Blaauw and
Dennis Sylvester},
title = {A 286nW, 103V High Voltage Generator and Multiplexer for Electrostatic
Actuation in Programmable Matter},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {158--159},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830205},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830205},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/PengCKCTPBBS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/PengJCKCR0GOTBH22,
author = {Yimai Peng and
Seokhyeon Jeong and
Kyojin Choo and
Yejoong Kim and
Li{-}Yu Chen and
Rohit Rothe and
Li Xu and
Ilya Gurin and
Omid Oliaei and
Vadim Tsinker and
Stephen Bart and
Peter Hartwell and
David T. Blaauw and
Dennis Sylvester},
title = {A 184nW, 121{\(\mathrm{\mu}\)}g/{\(\surd\)}Hz Noise Floor Triaxial
{MEMS} Accelerometer with Integrated {CMOS} Readout Circuit and Variation-Compensated
High Voltage {MEMS} Biasing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {84--85},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830230},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830230},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/PengJCKCR0GOTBH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/QinLYYWDZXZLLL22,
author = {Yuan Qin and
Congyan Lu and
Zhaoan Yu and
Zhihong Yao and
Feihong Wu and
Danian Dong and
Xiaolong Zhao and
Guangwei Xu and
Yuhao Zhang and
Shibing Long and
Ling Li and
Ming Liu},
title = {First Demonstration of High-Sensitivity {(NEP} 1fW\({}^{\mbox{1/2}}\))
Back-Illuminated Active-Matrix Deep {UV} Image Sensor by Monolithic
Integration of Ga2O3 Photodetectors and Oxide Thin-Film-Transistors},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {345--346},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830520},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830520},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/QinLYYWDZXZLLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/QinPPLZ22,
author = {Yuwei Qin and
Ruben Purdy and
Alec Probst and
Ching{-}Yi Lin and
Jian{-}Gang Jimmy Zhu},
title = {Non-linear CNN-based Read Channel for Hard Disk Drive with 30{\%}
Error Rate Reduction and Sequential 200Mbits/second Throughput in
28nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {206--207},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830238},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830238},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/QinPPLZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/QinTBLKCJWW22,
author = {Shengjun Qin and
Maryann C. Tung and
Emma Belliveau and
Shuhan Liu and
Jimin Kwon and
Wei{-}Chen Chen and
Zizhen Jiang and
S. Simon Wong and
H.{-}S. Philip Wong},
title = {8-Layer 3D Vertical Ru/AlOxNy/TiN {RRAM} with Mega-{\(\Omega\)} Level
{LRS} for Low Power and Ultrahigh-density Memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {314--315},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830164},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830164},
timestamp = {Fri, 05 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/QinTBLKCJWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RajannaRWA22,
author = {Viveka Konandur Rajanna and
Himadri Singh Raghav and
Tianqi Wang and
Massimo Alioto},
title = {Fully-Digital Broadband Calibration-Less Impedance Monitor for Probe
Insertion Detection against Power Analysis Attacks},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {144--145},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830158},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830158},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RajannaRWA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RamkajCMDST22,
author = {Athanasios Ramkaj and
Adalberto Cantoni and
Gabriele Manganaro and
Siddharth Devarajan and
Michiel Steyaert and
Filip Tavernier},
title = {A 30GHz-BW {\textless} -57dB-IM3 Direct {RF} Receiver Analog Front
End in 16nm FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {100--101},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830293},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830293},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RamkajCMDST22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RavsherGFDCDKHD22,
author = {Taras Ravsher and
Daniele Garbin and
Andrea Fantini and
Robin Degraeve and
Sergiu Clima and
Gabriele Luca Donadio and
Shreya Kundu and
Hubert Hody and
Wouter Devulder and
Jan Van Houdt and
Valeri Afanas'ev and
Romain Delhougne and
Gouri Sankar Kar},
title = {Enhanced performance and low-power capability of SiGeAsSe-GeSbTe 1S1R
phase-change memory operated in bipolar mode},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {312--313},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830199},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830199},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/RavsherGFDCDKHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RayK22,
author = {Subhajit Ray and
Peter R. Kinget},
title = {A 31-Feature, 80nW, 0.53mm\({}^{\mbox{2}}\) Audio Analog Feature Extractor
based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog
Rectification},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {184--185},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830455},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830455},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RayK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RieYBLKKPCUJSJC22,
author = {Hyunsub Norbert Rie and
Chang Soo Yoon and
Jindo Byun and
Sucheol Lee and
Garam Kim and
Joohwan Kim and
Junyoung Park and
Hyunyoon Cho and
Youngdo Um and
Hyungmin Jin and
Kwangseob Shin and
Minsu Jung and
Go{-}Eun Cha and
Minjae Lee and
YoungMin Kim and
Byeori Han and
Yuseong Jeon and
Jisun Lee and
EunSeok Shin and
Hyuk{-}Jun Kwon and
Youngdon Choi and
Jung{-}Hwan Choi and
Hyungjong Ko},
title = {A 40-Gb/s/pin Low-Voltage {POD} Single-Ended {PAM-4} Transceiver with
Timing Calibrated Reset-less Slicer and Bidirectional T-Coil for {GDDR7}
Application},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {148--149},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830507},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830507},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RieYBLKKPCUJSJC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RitzenthalerCDA22,
author = {Romain Ritzenthaler and
Elena Capogreco and
E. Dupuy and
Hiroaki Arimura and
J. P. Bastos and
P. Favia and
F. Sebaai and
D. Radisic and
V. T. H. Nguyen and
G. Mannaert and
B. T. Chan and
V. Machkaoutsan and
Y. Yoon and
H. Itokawa and
M. Yamaguchi and
Y. Chen and
Pierre Fazan and
S. Subramanian and
Alessio Spessot and
E. Dentoni Litta and
S. Samavedam and
Naoto Horiguchi},
title = {High Performance Thermally Resistant FinFETs {DRAM} Peripheral {CMOS}
FinFETs with {VTH} Tunability for Future Memories},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {306--307},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830186},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830186},
timestamp = {Fri, 16 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RitzenthalerCDA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RyuKLAPLCCK0LSR22,
author = {Yesin Ryu and
Young{-}Cheon Kwon and
Jae Hoon Lee and
Sung{-}Gi Ahn and
Jaewon Park and
Kijun Lee and
Yu Ho Choi and
Han{-}Won Cho and
Jae San Kim and
Jungyu Lee and
Haesuk Lee and
Seung Ho Song and
Je{-}Min Ryu and
Yeong Ho Yun and
Useung Shin and
Dajung Cho and
Jeong Hoan Park and
Jae{-}Seung Jeong and
Suk Han Lee and
Kyounghwan Lim and
Tae{-}Sung Kim and
Kyungmin Kim and
Yu Jin Cha and
Ik Joo Lee and
Tae Kyu Byun and
Han Sik Yoo and
Yeong Geol Song and
Myung{-}Kyu Lee and
Sunghye Cho and
Sung{-}Rae Kim and
Ji{-}Min Choi and
Hyoungmin Kim and
Soo Young Kim and
Jaeyoun Youn and
Myeong{-}O. Kim and
Kyomin Sohn and
SangJoon Hwang and
JooYoung Lee},
title = {A 16 {GB} 1024 GB/s {HBM3} {DRAM} with On-Die Error Control Scheme
for Enhanced {RAS} Features},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {130--131},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830391},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830391},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RyuKLAPLCCK0LSR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SafranskiHSHBBD22,
author = {C. Safranski and
Guohan Hu and
J. Z. Sun and
P. Hashemi and
S. L. Brown and
L. Buzi and
C. P. D'Emic and
E. R. J. Edwards and
Eileen A. Galligan and
M. G. Gottwald and
O. Gunawan and
S. Karimeddiny and
H. Jung and
J. Kim and
Kenneth F. Latzko and
Philip Louis Trouilloud and
S. Zare and
Daniel Christopher Worledge},
title = {Reliable Sub-nanosecond {MRAM} with Double Spin-torque Magnetic Tunnel
Junctions},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {288--289},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830306},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830306},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SafranskiHSHBBD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SchuddinckBXFMV22,
author = {Pieter Schuddinck and
Fabian M. Bufler and
Yang Xiang and
Anita Farokhnejad and
Gioele Mirabelli and
Anne Vandooren and
Bilal Chehab and
A. Gupta and
C{\'{e}}sar Roda Neve and
Geert Hellings and
Julien Ryckaert},
title = {{PPAC} of sheet-based {CFET} configurations for 4 track design with
16nm metal pitch},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {365--366},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830492},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830492},
timestamp = {Wed, 08 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/SchuddinckBXFMV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SeidelLHALRMBSW22,
author = {Konrad Seidel and
David Lehninger and
Raik Hoffmann and
Tarek Ali and
Maximilian Lederer and
Ricardo Revello and
Konstantin Mertens and
Kati Biedermann and
Yukai Shen and
Defu Wang and
Matthias Landwehr and
Andreas Heinig and
Thomas K{\"{a}}mpfe and
Hannes M{\"{a}}hne and
Kerstin Bernert and
Steffen Thiem},
title = {Memory Array Demonstration of fully integrated 1T-1C FeFET concept
with separated ferroelectric {MFM} device in interconnect layer},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {355--356},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830141},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830141},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SeidelLHALRMBSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SellAABBBBBBBBB22,
author = {Bernhard Sell and
S. An and
J. Armstrong and
D. Bahr and
B. Bains and
R. Bambery and
K. Bang and
D. Basu and
S. Bendapudi and
D. Bergstrom and
R. Bhandavat and
S. Bhowmick and
M. Buehler and
D. Caselli and
S. Cekli and
Vrsk. Chaganti and
Y. J. Chang and
K. Chikkadi and
T. Chu and
T. Crimmins and
G. Darby and
C. Ege and
P. Elfick and
Tyler Elko{-}Hansen and
S. Fang and
C. Gaddam and
M. Ghoneim and
H. Gomez and
S. Govindaraju and
Z. Guo and
Walid M. Hafez and
M. Haran and
M. Hattendorf and
S. Hu and
A. Jain and
S. Jaloviar and
M. Jang and
J. Kameswaran and
V. Kapinus and
A. Kennedy and
S. Klopcic and
D. Krishnan and
J. Leib and
Y.{-}T. Lin and
N. Lindert and
G. Liu and
O. Loh and
Y. Luo and
S. Mani and
M. Mleczko and
S. Mocherla and
P. Packan and
M. Paik and
A. Paliwal and
R. Pandey and
K. Patankar and
L. Pipes and
P. Plekhanov and
Chetan Prasad and
M. Prince and
G. Ramalingam and
R. Ramaswamy and
J. Riley and
J. R. Sanchez Perez and
Justin Sandford and
A. Sathe and
F. Shah and
H. Shim and
S. Subramanian and
S. Tandon and
M. Tanniru and
D. Thakurta and
T. Troeger and
X. Wang and
C. Ward and
A. Welsh and
S. Wickramaratne and
J. Wnuk and
S. Q. Xu and
P. Yashar and
J. Yaung and
K. Yoon and
N. Young},
title = {Intel 4 {CMOS} Technology Featuring Advanced FinFET Transistors optimized
for High Density and High-Performance Computing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {282--283},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830194},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830194},
timestamp = {Thu, 31 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SellAABBBBBBBBB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SerbulovaCHVJLB22,
author = {Kateryna Serbulova and
S.{-}H. Chen and
Geert Hellings and
Anabela Veloso and
Anne Jourdain and
Dimitri Linten and
J. De Boeck and
Guido Groeseneken and
Julien Ryckaert and
Geert Van der Plas and
Eric Beyne and
Eugenio Dentoni Litta and
Naoto Horiguchi},
title = {Enabling Active Backside Technology for {ESD} and {LU} Reliability
in {DTCO/STCO}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {431--432},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830146},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830146},
timestamp = {Wed, 24 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SerbulovaCHVJLB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ShankerWCLCHMS22,
author = {Nirmaan Shanker and
Li{-}Chen Wang and
Suraj S. Cheema and
Wenshen Li and
Nilotpal Choudhury and
Chenming Hu and
Souvik Mahapatra and
Sayeef S. Salahuddin},
title = {On the {PBTI} Reliability of Low {EOT} Negative Capacitance 1.8 nm
HfO2-ZrO2 Superlattice Gate Stack on Lg=90 nm nFETs},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {421--422},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830440},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830440},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ShankerWCLCHMS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SharmaGHM22,
author = {Sarthak Sharma and
Hao Gao and
Gernot Hueber and
Andrea Mazzanti},
title = {A Magnetically Coupled Dual-Core 154-GHz Class-F Oscillator with -177.1
FoM and -87 dBc/Hz {PN} at 1-MHz Offset in a 22-nm {FDSOI} with Third-Harmonic
Extraction},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {12--13},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830187},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830187},
timestamp = {Sun, 21 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/SharmaGHM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ShimoiMSOTKITMI22,
author = {Takahiro Shimoi and
Ken Matsubara and
Tomoya Saito and
Tomoya Ogawa and
Yasuhiko Taito and
Yoshinobu Kaneda and
Masayuki Izuna and
Koichi Takeda and
Hidenori Mitani and
Takashi Ito and
Takashi Kono},
title = {A 22nm 32Mb Embedded {STT-MRAM} Macro Achieving 5.9ns Random Read
Access and 5.8MB/s Write Throughput at up to Tj of 150 {\textdegree}C},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {134--135},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830273},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830273},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ShimoiMSOTKITMI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ShinWKCKO0K22,
author = {Hyunjin Shin and
Sangkyung Won and
Dohui Kim and
Byunghun Choi and
Gyusung Kim and
Myeonghee Oh and
Jaeseung Choi and
Jongwook Kye},
title = {A 32Mb Embedded Flash Memory based on 28nm with the best Cell Efficiency
and Robust Design achievement featuring 13.48Mb/mm\({}^{\mbox{2}}\)
at 0.85V},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {132--133},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830151},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830151},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ShinWKCKO0K22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SomeyaHAPM22,
author = {Teruki Someya and
Vincent Van Hoek and
Jan A. Angevare and
Sining Pan and
Kofi A. A. Makinwa},
title = {A 210nW BJT-based Temperature Sensor with an Inaccuracy of {\(\pm\)}0.15{\textdegree}C
(3{\(\sigma\)}) from -15{\textdegree}C to 85{\textdegree}C},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {120--121},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830266},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830266},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SomeyaHAPM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SonSLJSBLCOSHLH22,
author = {Kyunghyun Son and
Dongjae Shin and
Jisan Lee and
Bongyong Jang and
Dongsik Shim and
Hyunil Byun and
Chang{-}Bum Lee and
Yongchul Cho and
Tatsuhiro Otsuka and
Changgyun Shin and
Inoh Hwang and
Eunkyung Lee and
Kyoungho Ha and
Hyuck Choo},
title = {Palm-sized LiDAR module with III/V-on-Si optical phased array},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {166--167},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830467},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830467},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SonSLJSBLCOSHLH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SongLYCCWHCHLWL22,
author = {M. Y. Song and
C. M. Lee and
S. Y. Yang and
G. L. Chen and
K. M. Chen and
I J. Wang and
Y. C. Hsin and
K. T. Chang and
C. F. Hsu and
S. H. Li and
J. H. Wei and
T. Y. Lee and
M. F. Chang and
X. Y. Bao and
C. H. Diaz and
S. J. Lin},
title = {High speed (1ns) and low voltage {(1.5V)} demonstration of 8Kb {SOT-MRAM}
array},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {377--378},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830149},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830149},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SongLYCCWHCHLWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SongTZKNG22,
author = {Sanquan Song and
Stephen G. Tell and
Brian Zimmer and
Sudhir S. Kudva and
Nikola Nedovic and
C. Thomas Gray},
title = {An FLL-Based Clock Glitch Detector for Security Circuits in a 5nm
{FINFET} Process},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {146--147},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830157},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830157},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SongTZKNG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SuCHLPCWCWR22,
author = {Sheng{-}Kai Su and
Edward Chen and
Terry Y. T. Hung and
Meng{-}Zhan Li and
Gregory Pitner and
Chao{-}Ching Cheng and
Han Wang and
Jin Cai and
H.{-}S. Philip Wong and
Iuliana P. Radu},
title = {Perspective on Low-dimensional Channel Materials for Extremely Scaled
{CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {403--404},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830447},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830447},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SuCHLPCWCWR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SubhechhaRBHDSC22,
author = {S. Subhechha and
Nouredine Rassoul and
Attilio Belmonte and
Hubert Hody and
Harold Dekkers and
Michiel J. van Setten and
Adrian Vaisman Chasin and
Shamin H. Sharifi and
S. Sutar and
L. Magnarin and
Umberto Celano and
H. Puliyalil and
S. Kundu and
M. Pak and
Lieve Teugels and
D. Tsvetanova and
Nina Bazzazian and
Kevin Vandersmissen and
C. Biasotto and
D. Batuk and
J. Geypen and
J. Heijlen and
Romain Delhougne and
Gouri Sankar Kar},
title = {Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt {\textgreater}
0 {V} and Ion {\textgreater} 30 {\(\mathrm{\mu}\)}A/{\(\mathrm{\mu}\)}m},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {292--293},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830448},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830448},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/SubhechhaRBHDSC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SugimotoTKKIKOS22,
author = {Toshiki Sugimoto and
Tuan Thanh Ta and
Koichi Kokubun and
Satoshi Kondo and
Tetsuro Itakura and
Hisaaki Katagiri and
Yutaka Ota and
Mitsuhiro Sengoku and
Honam Kwon and
Keita Sasaki and
Hiroshi Kubota and
Kazuhiro Suzuki and
Katsuyuki Kimura and
Akihide Sai},
title = {1200x84-pixels 30fps 64cc Solid-State LiDAR {RX} with an {HV/LV} transistors
Hybrid Active-Quenching-SPAD Array and Background Digital {PT} Compensation},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {80--81},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830414},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830414},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SugimotoTKKIKOS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/SunZYLGLDZWFXSL22,
author = {Wenxuan Sun and
Woyu Zhang and
Jie Yu and
Yi Li and
Zeyu Guo and
Jinru Lai and
Danian Dong and
Xu Zheng and
Fei Wang and
Shaoyang Fan and
Xiaoxin Xu and
Dashan Shang and
Ming Liu},
title = {3D Reservoir Computing with High Area Efficiency {(5.12} TOPS/mm\({}^{\mbox{2}}\))
Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {222--223},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830310},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830310},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/SunZYLGLDZWFXSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TruesdellLBG0C22,
author = {Daniel S. Truesdell and
Xinjian Liu and
Jacob Breiholz and
Shourya Gupta and
Shuo Li and
Benton H. Calhoun},
title = {NanoWattch: {A} Self-Powered 3-nW {RISC-V} SoC Operable from 160mV
Photovoltaic Input with Integrated Temperature Sensing and Adaptive
Performance Scaling},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {210--211},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830206},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830206},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/TruesdellLBG0C22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TsaiCHLCTLJCHCC22,
author = {Chung{-}En Tsai and
Chun{-}Yi Cheng and
Bo{-}Wei Huang and
Hsin{-}Cheng Lin and
Tao Chou and
Chien{-}Te Tu and
Yi{-}Chun Liu and
Sun{-}Rong Jan and
Yu{-}Rui Chen and
Wan{-}Hsuan Hsieh and
Kung{-}Ying Chiu and
Shee{-}Jier Chueh and
Chee Wee Liu},
title = {Nearly Ideal Subthreshold Swing and Delay Reduction of Stacked Nanosheets
Using Ultrathin Bodies},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {401--402},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830357},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830357},
timestamp = {Wed, 03 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/TsaiCHLCTLJCHCC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/TsengLLBLLHWL22,
author = {Po{-}Hao Tseng and
Yu{-}Hsuan Lin and
Feng{-}Ming Lee and
Tian{-}Cig Bo and
Yung{-}Chun Li and
Ming{-}Hsiu Lee and
Kuang{-}Yeu Hsieh and
Keh{-}Chung Wang and
Chih{-}Yuan Lu},
title = {In-Memory Approximate Computing Architecture Based on 3D-NAND Flash
Memories},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {270--271},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830405},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830405},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/TsengLLBLLHWL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/UrteagaGACRHB22,
author = {Miguel Urteaga and
Zach Griffith and
A. Arias{-}Purdue and
A. Carter and
Petra Rowell and
J. Hacker and
B. Brar},
title = {InP {HBT} Technologies for sub-THz Communications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {122--123},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830311},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830311},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/UrteagaGACRHB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VandoorenPFLARS22,
author = {A. Vandooren and
N. Parihar and
Jacopo Franco and
Roger Loo and
Hiroaki Arimura and
R. Rodriguez and
F. Sebaai and
S. Iacovo and
Kevin Vandersmissen and
W. Li and
G. Mannaert and
D. Radisic and
E. Rosseel and
Andriy Hikavyy and
Anne Jourdain and
O. Mourey and
G. Gaudin and
S. Reboh and
L. Le Van{-}Jodin and
Guillaume Besnard and
C. Roda Neve and
Bich{-}Yen Nguyen and
Iuliana P. Radu and
E. Dentoni Litta and
N. Horiguchi},
title = {Demonstration of 3D sequential {FD-SOI} on {CMOS} FinFET stacking
featuring low temperature Si layer transfer and top tier device fabrication
with tier interconnections},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {330--331},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830400},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830400},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VandoorenPFLARS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VarzaghaniBLGYE22,
author = {Aida Varzaghani and
Bardia Bozorgzadeh and
Jack Lam and
Ankush Goel and
Xiaobin Yuan and
Mohamed Elzeftawi and
Mehran Izad and
Sudipta Sarkar and
Alberto Baldisserotto and
Seong{-}Ryong Ryu and
Steven Mikes and
Jeffrey Hwang and
Varun Joshi and
Shahrzad Naraghi and
Darshan Kadia and
Mohammad Ranjbar and
Paul Lee and
Dimitri Loizos and
Sotirios Zogopoulos and
Shwetabh Verma and
Stefanos Sidiropoulos},
title = {A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking
Scheme in 5nm FinFET},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {26--27},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830304},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830304},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VarzaghaniBLGYE22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VaziriDAKKWHGLW22,
author = {S. Vaziri and
I. M. Datye and
Elia Ambrosi and
Asir Intisar Khan and
H. Kwon and
C. H. Wu and
C. F. Hsu and
J. Guy and
T. Y. Lee and
H.{-}S. Philip Wong and
X. Y. Bao},
title = {First Fire-free, Low-voltage ({\textasciitilde}1.2 V), and Low Off-current
({\textasciitilde}3 nA) SiOxTey Selectors},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {324--325},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830395},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830395},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VaziriDAKKWHGLW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VelosoJRCAOASKH22,
author = {Anabela Veloso and
Anne Jourdain and
D. Radisic and
Rongmei Chen and
G. Arutchelvan and
B. O'Sullivan and
Hiroaki Arimura and
Michele Stucchi and
An De Keersgieter and
M. Hosseini and
T. Hopf and
K. D'Have and
S. Wang and
E. Dupuy and
G. Mannaert and
Kevin Vandersmissen and
S. Iacovo and
P. Marien and
S. Choudhury and
F. Schleicher and
F. Sebaai and
Y. Oniki and
X. Zhou and
A. Gupta and
Tom Schram and
B. Briggs and
C. Lorant and
E. Rosseel and
Andriy Hikavyy and
Roger Loo and
J. Geypen and
D. Batuk and
G. T. Martinez and
J. P. Soulie and
Katia Devriendt and
B. T. Chan and
S. Demuynck and
Gaspard Hiblot and
Geert Van der Plas and
Julien Ryckaert and
Gerald Beyer and
E. Dentoni Litta and
Eric Beyne and
Naoto Horiguchi},
title = {Scaled FinFETs Connected by Using Both Wafer Sides for Routing via
Buried Power Rails},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {284--285},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830177},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830177},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VelosoJRCAOASKH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VenkatesanLGPMM22,
author = {Suresh Venkatesan and
James Lee and
Simon Chun Kiat Goh and
Brian Pile and
Daniel Meerovich and
Jinyu Mo and
Yang Jing and
Lucas Soldano and
Baochang Xu and
Yu Zhang and
Aaron Voon{-}Yew Thean and
Yeow Kheng Lim},
title = {A Wafer Scale Hybrid Integration Platform for Co-packaged Photonics
using a {CMOS} based Optical Interposer\({}^{\mbox{TM}}\)},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {381--382},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830432},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830432},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VenkatesanLGPMM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VermeerschBXSBH22,
author = {Bjorn Vermeersch and
Erik Bury and
Yang Xiang and
Pieter Schuddinck and
Krishna K. Bhuwalka and
Geert Hellings and
Julien Ryckaert},
title = {Self-Heating in iN8-iN2 {CMOS} Logic Cells: Thermal Impact of Architecture
(FinFET, Nanosheet, Forksheet and {CFET)} and Scaling Boosters},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {371--372},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830228},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830228},
timestamp = {Wed, 05 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/VermeerschBXSBH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WagtPWCSCSG22,
author = {Paul van der Wagt and
Allan Parks and
Greg Warwar and
Lawrence Choi and
Bradley Salz and
Shih{-}Tun Chen and
Ron Sartschev and
Divyesh Gajjar},
title = {A 9 Gb/s 1.1 Vpp Precision Single-Ended Pin Electronics Driver in
40nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {32--33},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830287},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830287},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WagtPWCSCSG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangCKLYLPBHDA22,
author = {Zhongkai Wang and
Minsoo Choi and
Paul Kwon and
Kyoungtae Lee and
Bozhi Yin and
Zhaokai Liu and
Kwanseo Park and
Ayan Biswas and
Jaeduk Han and
Sijun Du and
Elad Alon},
title = {A 200Gb/s {PAM-4} Transmitter with Hybrid Sub-Sampling {PLL} in 28nm
{CMOS} Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {34--35},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830237},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830237},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WangCKLYLPBHDA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangKHSXZKKZWG22,
author = {Chengkuan Wang and
Annie Kumar and
Kaizhen Han and
Chen Sun and
Haiwen Xu and
Jishen Zhang and
Yuye Kang and
Qiwen Kong and
Zijie Zheng and
Yuxuan Wang and
Xiao Gong},
title = {Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning
Technique Achieving Record High Gm of 479.5 {\(\mu\)}S/{\(\mu\)}m
{(VDS} of 1 {V)} and fT of 18.3 GHz {(VDS} of 3 {V)}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {294--295},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830393},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830393},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/WangKHSXZKKZWG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangLDDLLCW22,
author = {Hechen Wang and
Renzhi Liu and
Richard Dorrance and
Deepak Dasalukunte and
Xiaosen Liu and
Dan Lake and
Brent R. Carlton and
May Wu},
title = {A 32.2 {TOPS/W} {SRAM} Compute-in-Memory Macro Employing a Linear
8-bit {C-2C} Ladder for Charge Domain Computation in 22nm for Edge
Inference},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {36--37},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830322},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830322},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WangLDDLLCW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangLK22,
author = {Jia{-}Ching Wang and
Bing{-}Yang Li and
Tai{-}Haur Kuo},
title = {A 9.8-fJ/conv.-step FoMW 8b 2.5-GS/s Single-Channel CDAC-Assisted
Subranging {ADC} with Reference-Embedded Comparators},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {92--93},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830239},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830239},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WangLK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangLLCTY22,
author = {Chuei{-}Tang Wang and
Chia{-}Chai Lin and
Chih{-}Hsin Lu and
Wei{-}Ting Chen and
Chung{-}Hao Tsai and
Douglas C. H. Yu},
title = {SoIC{\_}H Technology for Heterogenous System Integration},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {258--259},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830182},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830182},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WangLLCTY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WangZCZHHG22,
author = {Haibo Wang and
Gong Zhang and
Yue Chen and
Jishen Zhang and
Kaizhen Han and
Yi{-}Chiau Huang and
Xiao Gong},
title = {First Monolithic Integration of Group {IV} Waveguide Photodetectors
and Modulators on 300 mm Si Substrates for 2-{\(\mu\)}m Wavelength
Optoelectronic Integrated Circuit},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {407--408},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830294},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830294},
timestamp = {Wed, 29 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/WangZCZHHG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WeiKWHJZH22,
author = {Z. Wei and
W. Kim and
Z. Wang and
L. Hu and
D. Jung and
J. Zhang and
Y. Huai},
title = {Accurate and Fast {STT-MRAM} Endurance Evaluation Using a Novel Metric
for Asymmetric Bipolar Stress and Deep Learning},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {373--374},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830351},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830351},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WeiKWHJZH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/WhitcombeLTKTAC22,
author = {Amy Whitcombe and
Chun C. Lee and
Asma Kuriparambil Thekkumpate and
Somnath Kundu and
Jaykant Timbadiya and
Abhishek Agrawal and
Brent R. Carlton and
Peter Sagazio and
Stefano Pellerano and
Christopher D. Hull},
title = {A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved {SAR} {ADC} with 13GHz
{ERBW}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {170--171},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830329},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830329},
timestamp = {Mon, 03 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/WhitcombeLTKTAC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XieNJHK22,
author = {Shanshan Xie and
Can Ni and
Pulkit Jain and
Fatih Hamzaoglu and
Jaydeep P. Kulkarni},
title = {Gain-Cell {CIM:} Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM
Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt
Trigger ADCs},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {112--113},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830338},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830338},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/XieNJHK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XinZCDWGSZZLHDS22,
author = {Tianjiao Xin and
Yonghui Zheng and
Yan Cheng and
Kai Du and
Yiwei Wang and
Zhaomeng Gao and
Diqing Su and
Yunzhe Zheng and
Qilan Zhong and
Cheng Liu and
Rong Huang and
Chungang Duan and
Sannian Song and
Zhitang Song and
Hangbing Lyu},
title = {Atomic visualization of the emergence of orthorhombic phase in Hf0.5Zr0.5O2
ferroelectric film with in-situ rapid thermal annealing},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {343--344},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830185},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830185},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/XinZCDWGSZZLHDS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/XuKZZCG22,
author = {Haiwen Xu and
Rami Khazaka and
Jishen Zhang and
Zijie Zheng and
Yue Chen and
Xiao Gong},
title = {300 mm Wafer-scale In-situ {CVD} Growth Achieving 5.1{\texttimes}10\({}^{\mbox{-10}}\)
{\(\Omega\)}-cm\({}^{\mbox{2}}\) P-Type Contact Resistivity: Record
2.5{\texttimes}10\({}^{\mbox{21}}\) cm\({}^{\mbox{-3}}\) Active Doping
and Demonstration on Highly-Scaled 3D Structures},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {367--368},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830220},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830220},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/XuKZZCG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangBSHWPL22,
author = {Xiaolin Yang and
Marco Ballini and
Chutham Sawigun and
Wen{-}Yang Hsu and
Jan{-}Willem Weijers and
Jan Putzeys and
Carolina Mora Lopez},
title = {A 128-Channel AC-Coupled 1\({}^{\mbox{st}}\)-order {\(\Delta\)}-{\(\Delta\)}{\(\sum\)}
{IC} for Neural Signal Acquisition},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {60--61},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830236},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830236},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YangBSHWPL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangJLSKYYKKJPA22,
author = {Giyoung Yang and
Hakchul Jung and
Jinyoung Lim and
Jaewoo Seo and
Ingyum Kim and
Jisu Yu and
Hyeoungyu You and
Jeongsoon Kong and
Garoom Kim and
Minjae Jeong and
Chanhee Park and
Sera An and
Woojin Rim and
Hayoung Kim and
Dalhee Lee and
Sanghoon Baek and
Jonghoon Jung and
Taejoong Song and
Jongwook Kye},
title = {Standard Cell Design Optimization with Advanced {MOL} Technology in
3nm {GAA} Process},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {363--364},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830450},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830450},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YangJLSKYYKKJPA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangWSYYWCLTCH22,
author = {Chang{-}Feng Yang and
Chun{-}Yu Wu and
Meng{-}Chun Shih and
Ming{-}Ta Yang and
Ming{-}Han Yang and
Yu{-}Tien Wu and
Ta{-}Chun Chien and
Chih{-}Wei Lai and
Shih{-}Chi Tsai and
Wen{-}Ting Chu and
Arthur Hung},
title = {Demonstration of High Endurance Capability on Mega-Bit {RRAM} Macro
and Model of ppm Level Failures},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {318--319},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830374},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830374},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YangWSYYWCLTCH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangXOI22,
author = {Zunsong Yang and
Zule Xu and
Masaru Osada and
Tetsuya Iizuka},
title = {A 10-GHz Inductorless Cascaded {PLL} with Zero-ISF Subsampling Phase
Detector Achieving -63-dBc Reference Spur, 175-fs {RMS} Jitter and
-240-dB FOMjitter},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {10--11},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830382},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830382},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YangXOI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangYC22,
author = {Fu{-}Bin Yang and
Dao{-}Han Yao and
Po{-}Hung Chen},
title = {A Shared-Inductor Structure-Reconfigurable Regulating Rectifier {(SR-RR)}
Enabling 6.78-MHz {AC-DC} Rectification and 1-MHz {DC-DC} Energy Recycling},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {160--161},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830263},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830263},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YangYC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YangZCLZLZX0Z22,
author = {Changgui Yang and
Yunshan Zhang and
Ziyi Chang and
Zhuhao Li and
Tianyu Zheng and
Yuxuan Luo and
Shaomin Zhang and
Kedi Xu and
Gang Pan and
Bo Zhao},
title = {A 0.4mm\({}^{\mbox{3}}\) Battery-Less Crystal-Less Neural-Recording
SoC Achieving 1.6cm Backscattering Range with 2mm{\texttimes}2mm On-Chip
Antenna},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {164--165},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830235},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830235},
timestamp = {Thu, 02 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/YangZCLZLZX0Z22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YonarFBKMPRACDD22,
author = {Serdar S. Yonar and
Pier Andrea Francese and
Matthias Br{\"{a}}ndli and
Marcel A. Kossel and
Thomas Morf and
Jonathan E. Proesel and
Sergey V. Rylov and
Herschel A. Ainspan and
Martin Cochet and
Zeynep Toprak Deniz and
Timothy O. Dickson and
Troy J. Beukema and
Christian W. Baks and
Michael P. Beakes and
John F. Bulzacchelli and
Young{-}Ho Choi and
Byoung{-}Joo Yoo and
Hyoungbae Ahn and
Dong{-}Hyuk Lim and
Gunil Kang and
Sang{-}Hune Park and
Mounir Meghelli and
Hyo{-}Gyuem Rhew and
Daniel J. Friedman and
Michael Choi and
Mehmet Soyuer and
Jongshin Shin},
title = {An 8-bit 56GS/s 64x Time-Interleaved {ADC} with Bootstrapped Sampler
and Class-AB Buffer in 4nm {CMOS}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {168--169},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830308},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830308},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YonarFBKMPRACDD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YooBKKPL22,
author = {Honam Yoo and
Jong{-}Won Back and
Nam{-}Hun Kim and
Dongseok Kwon and
Byung{-}Gook Park and
Jong{-}Ho Lee},
title = {First Demonstration of 1-bit Erase in Vertical {NAND} Flash Memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {304--305},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830445},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830445},
timestamp = {Thu, 03 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/YooBKKPL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YoonKKC22,
author = {Hyunchul Yoon and
Teawoong Kim and
Yigi Kwon and
Youngcheol Chae},
title = {A 50 MS/s 65 dB-SNDR Pipelined {SAR} {ADC} using Capacitively Degenerated
Two-Stage Dynamic Amplifier},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {88--89},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830300},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830300},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YoonKKC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YuCHSALWKSCLFLW22,
author = {X.{-}R. Yu and
Wen Hsin Chang and
T.{-}C. Hong and
P.{-}J. Sung and
A. Agarwal and
G.{-}L. Luo and
C.{-}T. Wu and
K.{-}H. Kao and
C.{-}J. Su and
S.{-}W. Chang and
W.{-}H. Lu and
P.{-}Y. Fu and
J.{-}H. Lin and
P.{-}H. Wu and
T.{-}C. Cho and
William Cheng{-}Yu Ma and
Darsen D. Lu and
T.{-}S. Chao and
Tatsuro Maeda and
Yao{-}Jen Lee and
W.{-}F. Wu and
W.{-}K. Yeh and
Yeong{-}Her Wang},
title = {First Demonstration of Vertical Stacked Hetero-Oriented n-Ge (111)/p-Ge
{(100)} {CFET} toward Mobility Balance Engineering},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {399--400},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830316},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830316},
timestamp = {Sat, 06 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/YuCHSALWKSCLFLW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YuTTCGHMRHLRRBK22,
author = {Qiang Yu and
Han Wui Then and
Derek Thomson and
Jessica C. Chou and
Jeffrey Garrett and
Iwen Huang and
Ibukunoluwa Momson and
Surej Ravikumar and
Seahee Hwangbo and
Alvaro Latorre{-}Rey and
Ananda Roy and
Marko Radosavljevic and
Michael Beumer and
Pratik Koirala and
Nicole Thomas and
Nityan Nair and
Heli Vora and
Samuel Bader and
Johann Rode and
Jonathan Jensen and
Said Rami},
title = {5G mmWave Power Amplifier and Low-Noise Amplifier in 300mm GaN-on-Si
Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {126--127},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830383},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830383},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/YuTTCGHMRHLRRBK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/YunLCKLKLKHKHKK22,
author = {Jungbin Yun and
Seungjoon Lee and
Seungwon Cha and
Jihun Kim and
Jeongho Lee and
Hanseok Kim and
Eungkyu Lee and
Seonok Kim and
Seunghan Hong and
Hyungchae Kim and
Jinsuk Huh and
Sungchul Kim and
Kazunori Kakehi and
Jae{-}Ho Kim and
June{-}Mo Koo and
Eunsang Cho and
Heegeun Jeong and
Howoo Park and
Kyungho Lee and
JungChak Ahn and
Joonseo Yim},
title = {A 0.6 {\unicode{13211}} Small Pixel for High Resolution {CMOS} Image
Sensor with Full Well Capacity of 10, 000e- by Dual Vertical Transfer
Gate Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {351--352},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830254},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830254},
timestamp = {Tue, 18 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/YunLCKLKLKHKHKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZaitsuMNTYSWANN22,
author = {Koichiro Zaitsu and
Akira Matsumoto and
Mizuki Nishida and
Yusuke Tanaka and
Hirofumi Yamashita and
Yosuke Satake and
Takashi Watanabe and
Kunihiko Araki and
Naoki Nei and
Keiichi Nakazawa and
Junpei Yamamoto and
Mutsuo Uehara and
Hiroyuki Kawashima and
Yusaku Kobayashi and
Tomoyuki Hirano and
Keiji Tatani},
title = {A 2-Layer Transistor Pixel Stacked {CMOS} Image Sensor with Oxide-Based
Full Trench Isolation for Large Full Well Capacity and High Quantum
Efficiency},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {286--287},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830372},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830372},
timestamp = {Wed, 31 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZaitsuMNTYSWANN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangLFA22,
author = {Hui Zhang and
Longyang Lin and
Qiang Fang and
Massimo Alioto},
title = {On-Chip Laser Voltage Probing Attack Detection with 100{\%} Area Coverage
at Above/Below the Bandgap Wavelength and Fully-Automated Design},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {140--141},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830144},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830144},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhangLFA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangLHLHWDCCWS22,
author = {Jie Zhang and
Wei Lu and
Po{-}Tsang Huang and
Sih{-}Han Li and
Tsung{-}Yi Hung and
Shih{-}Hsien Wu and
Ming{-}Ji Dai and
I{-}Shan Chung and
Wen{-}Chao Chen and
Chin{-}Hung Wang and
Shyh{-}Shyuan Sheu and
Hung{-}Ming Chen and
Kuan{-}Neng Chen and
Wei{-}Chung Lo and
Chih{-}I Wu},
title = {An Embedded Multi-Die Active Bridge {(EMAB)} Chip for Rapid-Prototype
Programmable 2.5D/3D Packaging Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {262--263},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830188},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830188},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhangLHLHWDCCWS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangN22,
author = {Luya Zhang and
Ali M. Niknejad},
title = {A Galvanically Coupled Electron Paramagnetic Resonance Spectrometer
for Deep Tissue Hypoxia Diagnosis},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {250--251},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830508},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830508},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhangN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangWLXDJWGFDN22,
author = {Woyu Zhang and
Shaocong Wang and
Yi Li and
Xiaoxin Xu and
Danian Dong and
Nanjia Jiang and
Fei Wang and
Zeyu Guo and
Renrui Fang and
Chunmeng Dou and
Kai Ni and
Zhongrui Wang and
Dashan Shang and
Ming Liu},
title = {Few-shot graph learning with robust and energy-efficient memory-augmented
graph neural network {(MAGNN)} based on homogeneous computing-in-memory},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {224--225},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830418},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830418},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhangWLXDJWGFDN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhangXTWKZCSWWZ22,
author = {Jishen Zhang and
Haiwen Xu and
Kian Hua Tan and
Satrio Wicaksono and
Qiwen Kong and
Gong Zhang and
Yue Chen and
Chen Sun and
Haibo Wang and
Chao Wang and
Zijie Zheng and
Leming Jiao and
Zuopu Zhou and
Charles Ci Wen Lim and
Soon{-}Fatt Yoon and
Xiao Gong},
title = {First Si-Waveguide-Integrated InGaAs/InAlAs Avalanche Photodiodes
on {SOI} Platform},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {409--410},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830481},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830481},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ZhangXTWKZCSWWZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhaoCMLLZSL22,
author = {Liang Zhao and
Z. Chen and
Dan Manea and
S. Li and
J. Li and
Y. Zhu and
Z. Sui and
Zhichao Lu},
title = {Highly Reliable 40nm Embedded Dual-Interface-Switching {RRAM} Technology
for Display Driver {IC} Applications},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {316--317},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830289},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830289},
timestamp = {Tue, 22 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhaoCMLLZSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhaoLFZLWYWOBVL22,
author = {Yang Zhao and
Ziyun Li and
Yonggan Fu and
Yongan Zhang and
Chaojian Li and
Cheng Wan and
Haoran You and
Shang Wu and
Xu Ouyang and
Vivek Boominathan and
Ashok Veeraraghavan and
Yingyan Lin},
title = {i-FlatCam: {A} 253 FPS, 91.49 {\(\mathrm{\mu}\)}J/Frame Ultra-Compact
Intelligent Lensless Camera for Real-Time and Efficient Eye Tracking
in {VR/AR}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {108--109},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830458},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830458},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhaoLFZLWYWOBVL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhaoZFOWWBJPRCA22,
author = {Yang Zhao and
Yongan Zhang and
Yonggan Fu and
Xu Ouyang and
Cheng Wan and
Shang Wu and
Anton Banta and
Mathews M. John and
Allison Post and
Mehdi Razavi and
Joseph R. Cavallaro and
Behnaam Aazhang and
Yingyan Lin},
title = {e-G2C: {A} 0.14-to-8.31 {\(\mathrm{\mu}\)}J/Inference NN-based Processor
with Continuous On-chip Adaptation for Anomaly Detection and {ECG}
Conversion from {EGM}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {252--253},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830335},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830335},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/ZhaoZFOWWBJPRCA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhengSJZZWLKCNG22,
author = {Zijie Zheng and
Chen Sun and
Leming Jiao and
Dong Zhang and
Zuopu Zhou and
Xiaolin Wang and
Gan Liu and
Qiwen Kong and
Yue Chen and
Kai Ni and
Xiao Gong},
title = {Boosting the Memory Window of the BEOL-Compatible {MFMIS} Ferroelectric/
Anti-Ferroelectric FETs by Charge Injection},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {389--390},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830466},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830466},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ZhengSJZZWLKCNG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhouLZZCHKG22,
author = {Zuopu Zhou and
Leming Jiao and
Jiuren Zhou and
Zijie Zheng and
Yue Chen and
Kaizhen Han and
Yuye Kang and
Xiao Gong},
title = {Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive
Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast
Speed, and Long Retention},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {357--358},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830291},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830291},
timestamp = {Wed, 03 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ZhouLZZCHKG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhuWZWL022,
author = {Wei Zhu and
Ruitao Wang and
Jian Zhang and
Jiawen Wang and
Chenguang Li and
Yan Wang},
title = {An Ultra-compact Bidirectional {T/R} Folded 25.8-39.2GHz Phased-Array
Transceiver Front-End with Embedded {TX} Power Detection/Self-calibration
Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm
{CMOS} Technology},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {102--103},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830312},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830312},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ZhuWZWL022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/ZhuZWWLWW22,
author = {Wei Zhu and
Jian Zhang and
Jiawen Wang and
Ruitao Wang and
Chenguang Li and
Kai Wang and
Yan Wang},
title = {A Packaged 90-to-96GHz 16-Element Phased Array with 18.8/15.8dBm Psat/OP1dB,
14.8{\%} {TX} {PAE} in 65nm {CMOS} Process and +51dBm Array {EIRP}},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {128--129},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830350},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830350},
timestamp = {Mon, 06 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsit/ZhuZWWLWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsit/2022,
title = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022},
isbn = {978-1-6654-9772-5},
timestamp = {Thu, 04 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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