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@inproceedings{DBLP:conf/mtv/AminRIFMA16,
  author       = {Omar Amin and
                  Youssef Ramzy and
                  Omar Ibrahem and
                  Ahmed Fouad and
                  Khaled Mohamed and
                  Mohamed Abdelsalam},
  title        = {System Verilog Assertions Synthesis Based Compiler},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {65--70},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.22},
  doi          = {10.1109/MTV.2016.22},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/AminRIFMA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/DarwishED16,
  author       = {Amr B. Darwish and
                  Magdy A. El{-}Moursy and
                  Mohamed Dessouky},
  title        = {Transaction Level Power Modeling {(TLPM)} Methodology},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {61--64},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.21},
  doi          = {10.1109/MTV.2016.21},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/DarwishED16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/El-Yamany16,
  author       = {Ahmed El{-}Yamany},
  title        = {Echoing the "Generality Concept" through the Bus Functional Model
                  Architecture in Universal Verification Environments},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {77--80},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.18},
  doi          = {10.1109/MTV.2016.18},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/El-Yamany16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/El-YamanyES16,
  author       = {Ahmed El{-}Yamany and
                  Sameh El{-}Ashry and
                  Khaled Salah},
  title        = {Coverage Closure Efficient {UVM} Based Generic Verification Architecture
                  for Flash Memory Controllers},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {30--34},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.10},
  doi          = {10.1109/MTV.2016.10},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/El-YamanyES16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/FathyS16,
  author       = {Khaled Fathy and
                  Khaled Salah},
  title        = {An Efficient Scenario Based Testing Methodology Using {UVM}},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {57--60},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.14},
  doi          = {10.1109/MTV.2016.14},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/FathyS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/GuoDMJ16,
  author       = {Xiaolong Guo and
                  Raj Gautam Dutta and
                  Prabhat Mishra and
                  Yier Jin},
  title        = {Automatic RTL-to-Formal Code Converter for {IP} Security Formal Verification},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {35--38},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.23},
  doi          = {10.1109/MTV.2016.23},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/GuoDMJ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/HuAAK16,
  author       = {Wei Hu and
                  Alric Althoff and
                  Armita Ardeshiricham and
                  Ryan Kastner},
  title        = {Towards Property Driven Hardware Security},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {51--56},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.12},
  doi          = {10.1109/MTV.2016.12},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/HuAAK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/KanLPD16,
  author       = {Senwen Kan and
                  Matthew Lam and
                  Tyler Porter and
                  Jennifer Dworak},
  title        = {A Case Study: Pre-Silicon SoC {RAS} Validation for NoC Server Processor},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {19--24},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.26},
  doi          = {10.1109/MTV.2016.26},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/KanLPD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/KarlapalemV16,
  author       = {Sainath Karlapalem and
                  Shashank Venugopal},
  title        = {Scalable, Constrained Random Software Driven Verification},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {71--76},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.19},
  doi          = {10.1109/MTV.2016.19},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/KarlapalemV16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/QuiremS16,
  author       = {Saddam Jamil Quirem and
                  Prasad Krishna Saravu},
  title        = {Fake {CPU:} {A} Flexible and Simulation Cost-Effective {UVC} for Testing
                  Shared Caches},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.13},
  doi          = {10.1109/MTV.2016.13},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/QuiremS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/SaafanES16,
  author       = {Haytham Saafan and
                  M. Watheq El{-}Kharashi and
                  Ashraf Salem},
  title        = {Formal Based Methodology for Inferring Memory Mapped Registers},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {15--18},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.11},
  doi          = {10.1109/MTV.2016.11},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/SaafanES16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/Saravu16,
  author       = {Prasad Krishna Saravu},
  title        = {Multi-processor Memory Scoreboard: {A} Multi-processor Memory Ordering
                  and Data Consistency Checker},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {7--14},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.16},
  doi          = {10.1109/MTV.2016.16},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/Saravu16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ViswanathanRRZ16,
  author       = {Vibarajan Viswanathan and
                  Juliet Runhaar and
                  Doug Reed and
                  Jun Zhao},
  title        = {Tough Bugs vs. Smart Tools - {L2/L3} Cache Verification Using System
                  Verilog, {UVM} and Verdi Transaction Debugging},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {25--29},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.15},
  doi          = {10.1109/MTV.2016.15},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/ViswanathanRRZ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/XieBLS16,
  author       = {Yang Xie and
                  Chongxi Bao and
                  Yuntao Liu and
                  Ankur Srivastava},
  title        = {2.5D/3D Integration Technologies for Circuit Obfuscation},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {39--44},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.17},
  doi          = {10.1109/MTV.2016.17},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/XieBLS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ZhouM16,
  author       = {Liwei Zhou and
                  Yiorgos Makris},
  title        = {Hardware-Based Workload Forensics and Malware Detection in Microprocessors},
  booktitle    = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  pages        = {45--50},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/MTV.2016.20},
  doi          = {10.1109/MTV.2016.20},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/ZhouM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtv/2016,
  title        = {17th International Workshop on Microprocessor and {SOC} Test and Verification,
                  {MTV} 2016, Austin, TX, USA, December 12-13, 2016},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/7879785/proceeding},
  isbn         = {978-1-4673-8924-2},
  timestamp    = {Wed, 16 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/2016.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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