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@inproceedings{DBLP:conf/isqed/AlawadL17, author = {Mohammed Alawad and Mingjie Lin}, title = {Stochastic-based multi-stage streaming realization of deep convolutional neural network}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {13--18}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918285}, doi = {10.1109/ISQED.2017.7918285}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isqed/AlawadL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/AlladiT17, author = {Phaninder Alladi and Spyros Tragoudas}, title = {Aging-aware critical paths for process related validation in the presence of {NBTI}}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {445--448}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918356}, doi = {10.1109/ISQED.2017.7918356}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/AlladiT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/AnEZ017, author = {Hongyu An and M. Amimul Ehsan and Zhen Zhou and Yang Yi}, title = {Electrical modeling and analysis of 3D synaptic array using vertical {RRAM} structure}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {1--6}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918283}, doi = {10.1109/ISQED.2017.7918283}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/AnEZ017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/AngiziHDF17, author = {Shaahin Angizi and Zhezhi He and Ronald F. DeMara and Deliang Fan}, title = {Composite spintronic accuracy-configurable adder for low power Digital Signal Processing}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {391--396}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918347}, doi = {10.1109/ISQED.2017.7918347}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/AngiziHDF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/AsharSV17, author = {Pranav Ashar and Vikas Sachdeva and Vinod Viswanath}, title = {Failures and verification solutions related to untimed paths in SOCs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {460--465}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918359}, doi = {10.1109/ISQED.2017.7918359}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/AsharSV17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BalefJGG17, author = {Hadi Ahmadi Balef and Hailong Jiao and Jos{\'{e}} Pineda de Gyvez and Kees Goossens}, title = {An analytical model for interdependent setup/hold-time characterization of flip-flops}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {209--214}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918318}, doi = {10.1109/ISQED.2017.7918318}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/BalefJGG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BaquetaMPNRR17, author = {Jeferson Jos{\'{e}} Baqueta and Felipe S. Marranghello and Vinicius N. Possani and Augusto Neutzling and Andr{\'{e}} In{\'{a}}cio Reis and Renato P. Ribas}, title = {Binary adder circuit design using emerging {MIGFET} devices}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {125--130}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918304}, doi = {10.1109/ISQED.2017.7918304}, timestamp = {Fri, 10 Jul 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/BaquetaMPNRR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BeheiryMIS17, author = {Maha Beheiry and Hassan Mostafa and Yehea Ismail and Ahmed M. Soliman}, title = {3D-NOCET: {A} tool for implementing 3D-NoCs based on the Direct-Elevator algorithm}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {144--148}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918307}, doi = {10.1109/ISQED.2017.7918307}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/BeheiryMIS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BerzTH17, author = {Everton Lu{\'{\i}}s Berz and Deivid Antunes Tesch and Fabiano Passuelo Hessel}, title = {A hybrid {RFID} and {CV} system for item-level localization of stationary objects}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {331--336}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918337}, doi = {10.1109/ISQED.2017.7918337}, timestamp = {Mon, 01 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/BerzTH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BhattacharjeePC17, author = {Debjyoti Bhattacharjee and Vikramkumar Pudi and Anupam Chattopadhyay}, title = {{SHA-3} implementation using ReRAM based in-memory computing architecture}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {325--330}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918336}, doi = {10.1109/ISQED.2017.7918336}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/BhattacharjeePC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/BreierBH17, author = {Jakub Breier and Shivam Bhasin and Wei He}, title = {An electromagnetic fault injection sensor using Hogge phase-detector}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {307--312}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918333}, doi = {10.1109/ISQED.2017.7918333}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/BreierBH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/Chaparro-Baquero17, author = {Gustavo A. Chaparro{-}Baquero and Shi Sha and Soamar Homsi and Wujie Wen and Gang Quan}, title = {Processor/memory Co-Scheduling using periodic resource server for real-time systems under peak temperature constraints}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {360--366}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918342}, doi = {10.1109/ISQED.2017.7918342}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/Chaparro-Baquero17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ChenK17, author = {Yiting Chen and Dae Hyun Kim}, title = {A legalization algorithm for multi-tier gate-level monolithic three-dimensional integrated circuits}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {277--282}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918328}, doi = {10.1109/ISQED.2017.7918328}, timestamp = {Fri, 06 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ChenK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ChenKLLLL0WYC17, author = {Wei{-}Hao Chen and Win{-}San Khwa and Jun{-}Yi Li and Wei{-}Yu Lin and Huan{-}Ting Lin and Yongpan Liu and Yu Wang and Huaqiang Wu and Huazhong Yang and Meng{-}Fan Chang}, title = {Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {23--28}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918287}, doi = {10.1109/ISQED.2017.7918287}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ChenKLLLL0WYC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ChenL0XY17, author = {Xiaoming Chen and Qiaoyi Liu and Yu Wang and Qiang Xu and Huazhong Yang}, title = {Low-overhead implementation of logic encryption using gate replacement techniques}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {257--263}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918325}, doi = {10.1109/ISQED.2017.7918325}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/ChenL0XY17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ChenQCD17, author = {Xi Chen and Gang Qu and Aijiao Cui and Carson Dunbar}, title = {Scan chain based {IP} fingerprint and identification}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {264--270}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918326}, doi = {10.1109/ISQED.2017.7918326}, timestamp = {Tue, 14 Dec 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/ChenQCD17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ClarkAH17, author = {Lawrence T. Clark and James Adams and Keith E. Holbert}, title = {Integrated circuit identification and true random numbers using 1.5-transistor flash memory}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {244--249}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918323}, doi = {10.1109/ISQED.2017.7918323}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ClarkAH17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/DasD17, author = {Subrata Das and Debesh Kumar Das}, title = {A technique to construct global routing trees for graphene nanoribbon {(GNR)}}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {111--118}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918302}, doi = {10.1109/ISQED.2017.7918302}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/DasD17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/DasP17, author = {Abhijit Das and Joonsung Park}, title = {High precision yet wide range on-chip oscillator with dual charge-discharge technique}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {409--412}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918350}, doi = {10.1109/ISQED.2017.7918350}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/DasP17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/DuttS17, author = {Shantanu Dutt and Ouwen Shi}, title = {Power-delay product based resource library construction for effective power optimization in {HLS}}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {229--236}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918321}, doi = {10.1109/ISQED.2017.7918321}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/DuttS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/FanSL17, author = {Qianqian Fan and Sachin S. Sapatnekar and David J. Lilja}, title = {Cost-quality trade-offs of approximate memory repair mechanisms for image data}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {438--444}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918355}, doi = {10.1109/ISQED.2017.7918355}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/FanSL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/FanSWLG17, author = {Xin Fan and Jan Stuijt and Rui Wang and Bo Liu and Tobias Gemmeke}, title = {Re-addressing {SRAM} design and measurement for sub-threshold operation in view of classic 6T vs. standard cell based implementations}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {65--70}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918294}, doi = {10.1109/ISQED.2017.7918294}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/FanSWLG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/FilippiniLKT17, author = {Leo Filippini and Diane Lim and Lunal Khuon and Baris Taskin}, title = {Wireless charge recovery system for implanted electroencephalography applications in mice}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {342--345}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918339}, doi = {10.1109/ISQED.2017.7918339}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/FilippiniLKT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/FuISAM17, author = {Yuhan Fu and Masayuki Ikebe and Takeshi Shimada and Tetsuya Asai and Masato Motomura}, title = {Low latency divider using ensemble of moving average curves}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {397--402}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918348}, doi = {10.1109/ISQED.2017.7918348}, timestamp = {Tue, 29 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/FuISAM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/FurumiIK17, author = {Kaoru Furumi and Masashi Imai and Atsushi Kurokawa}, title = {Cooling architectures using thermal sidewalls, interchip plates, and bottom plate for 3D ICs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {283--288}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918329}, doi = {10.1109/ISQED.2017.7918329}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/FurumiIK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/GharehbaghiF17, author = {Amir Masoud Gharehbaghi and Masahiro Fujita}, title = {A new approach for selecting inputs of logic functions during debug}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {166--173}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918311}, doi = {10.1109/ISQED.2017.7918311}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/GharehbaghiF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/GolanbariKOGT17, author = {Mohammad Saber Golanbari and Saman Kiamehr and Fabian Oboril and Anteneh Gebregiorgis and Mehdi Baradaran Tahoori}, title = {Post-fabrication calibration of Near-Threshold circuits for energy efficiency}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {385--390}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918346}, doi = {10.1109/ISQED.2017.7918346}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/GolanbariKOGT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/GuneysuO17, author = {Tim G{\"{u}}neysu and Tobias Oder}, title = {Towards lightweight Identity-Based Encryption for the post-quantum-secure Internet of Things}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {319--324}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918335}, doi = {10.1109/ISQED.2017.7918335}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/GuneysuO17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/GuptaMVAA17, author = {Navneet Gupta and Adam Makosiej and Andrei Vladimirescu and Amara Amara and Costin Anghel}, title = {Tunnel {FET} based ultra-low-leakage compact 2T1C {SRAM}}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {71--75}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918295}, doi = {10.1109/ISQED.2017.7918295}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/GuptaMVAA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/GuptaWGALDN17, author = {Sumeet Kumar Gupta and Danni Wang and Sumitha George and Ahmedullah Aziz and Xueqing Li and Suman Datta and Vijaykrishnan Narayanan}, title = {Harnessing ferroelectrics for non-volatile memories and logic}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {29--34}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918288}, doi = {10.1109/ISQED.2017.7918288}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/GuptaWGALDN17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/HanKLW17, author = {Kwangsoo Han and Andrew B. Kahng and Hyein Lee and Lutong Wang}, title = {Performance- and energy-aware optimization of {BEOL} interconnect stack geometry in advanced technology nodes}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {104--110}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918301}, doi = {10.1109/ISQED.2017.7918301}, timestamp = {Fri, 10 Jul 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/HanKLW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/Heinrich-BarnaD17, author = {Stephen K. Heinrich{-}Barna and Clyde Dunn and Doug Verret}, title = {Low temperature endurance failures on flash memory}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {87--92}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918298}, doi = {10.1109/ISQED.2017.7918298}, timestamp = {Thu, 30 Jul 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/Heinrich-BarnaD17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/HolstJG17, author = {Alexander Holst and Jae{-}Won Jang and Swaroop Ghosh}, title = {Investigation of magnetic field attacks on commercial Magneto-Resistive Random Access Memory}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {155--160}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918309}, doi = {10.1109/ISQED.2017.7918309}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/HolstJG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/HyunPS17, author = {Daijoon Hyun and Wachirawit Ponghiran and Youngsoo Shin}, title = {Clock tree optimization through selective airgap insertion}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {203--208}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918317}, doi = {10.1109/ISQED.2017.7918317}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/HyunPS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ImaniR17, author = {Mohsen Imani and Tajana Rosing}, title = {{CAP:} Configurable resistive associative processor for near-data computing}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {346--352}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918340}, doi = {10.1109/ISQED.2017.7918340}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ImaniR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/IsgencPLP17, author = {Mehmet Meric Isgenc and Samuel Pagliarini and Renzhi Liu and Larry T. Pileggi}, title = {Evaluating the benefits of relaxed {BEOL} pitch for deeply scaled ICs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {180--185}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918313}, doi = {10.1109/ISQED.2017.7918313}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/IsgencPLP17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/IslamPK17, author = {Md. Nazmul Islam and Vinay C. Patil and Sandip Kundu}, title = {Determining proximal geolocation of IoT edge devices via covert channel}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {196--202}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918316}, doi = {10.1109/ISQED.2017.7918316}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/IslamPK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/JiangLZW17, author = {Xin Jiang and Xiangyang Lei and Lian Zeng and Takahiro Watanabe}, title = {High performance virtual channel based fully adaptive thermal-aware routing for 3D NoC}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {289--295}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918330}, doi = {10.1109/ISQED.2017.7918330}, timestamp = {Tue, 26 Jul 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/JiangLZW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/KalargarisCP17, author = {Harry Kalargaris and Yi{-}Chung Chen and Vasilis F. Pavlidis}, title = {{STA} compatible backend design flow for TSV-based 3-D ICs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {186--190}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918314}, doi = {10.1109/ISQED.2017.7918314}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/KalargarisCP17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/KalyanamSA17, author = {Vijay Kiran Kalyanam and Peter G. Sassone and Jacob A. Abraham}, title = {Power prediction of embedded scalar and vector processor: Challenges and solutions}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {221--228}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918320}, doi = {10.1109/ISQED.2017.7918320}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/KalyanamSA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/KhoshaviSD17, author = {Navid Khoshavi and Soheil Salehi and Ronald F. DeMara}, title = {Variation-immune resistive Non-Volatile Memory using self-organized sub-bank circuit designs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {52--57}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918292}, doi = {10.1109/ISQED.2017.7918292}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/KhoshaviSD17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/KuFCR17, author = {Sungkwan Ku and Elliott Forbes and Rangeen Basu Roy Chowdhury and Eric Rotenberg}, title = {A case for standard-cell based RAMs in highly-ported superscalar processor structures}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {131--137}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918305}, doi = {10.1109/ISQED.2017.7918305}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/KuFCR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LeeDP17, author = {Dongjin Lee and Sourav Das and Partha Pratim Pande}, title = {Performance-thermal trade-offs for a VFI-enabled 3D NoC architecture}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {271--276}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918327}, doi = {10.1109/ISQED.2017.7918327}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LeeDP17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LernerT17, author = {Scott Lerner and Baris Taskin}, title = {Workload-aware {ASIC} flow for lifetime improvement of multi-core IoT processors}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {379--384}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918345}, doi = {10.1109/ISQED.2017.7918345}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LernerT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LiLYNLW17, author = {Hongjia Li and Ji Li and Wang Yao and Shahin Nazarian and Xue Lin and Yanzhi Wang}, title = {Fast and energy-aware resource provisioning and task scheduling for cloud systems}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {174--179}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918312}, doi = {10.1109/ISQED.2017.7918312}, timestamp = {Fri, 24 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LiLYNLW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LimSKK17, author = {Hyeonchan Lim and Sungyoul Seo and Soyeon Kang and Sungho Kang}, title = {Broadcast scan compression based on deterministic pattern generation algorithm}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {449--453}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918357}, doi = {10.1109/ISQED.2017.7918357}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LimSKK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LinHWC17, author = {Chia{-}Chun Lin and Chiao{-}Wei Huang and Chun{-}Yao Wang and Yung{-}Chih Chen}, title = {In{\&}Out: Restructuring for threshold logic network optimization}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {413--418}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918351}, doi = {10.1109/ISQED.2017.7918351}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LinHWC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LiuLW17, author = {Ning Liu and Xue Lin and Yanzhi Wang}, title = {Data center power management for regulation service using neural network-based power prediction}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {367--372}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918343}, doi = {10.1109/ISQED.2017.7918343}, timestamp = {Thu, 05 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LiuLW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LiuW17, author = {Tao Liu and Wujie Wen}, title = {A fast and ultra low power time-based spiking neuromorphic architecture for embedded applications}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {19--22}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918286}, doi = {10.1109/ISQED.2017.7918286}, timestamp = {Wed, 07 Aug 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LiuW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LiuXLZM17, author = {Shanshan Liu and Liyi Xiao and Jie Li and Yihan Zhou and Zhigang Mao}, title = {Low redundancy matrix-based codes for adjacent error correction with parity sharing}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {76--80}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918296}, doi = {10.1109/ISQED.2017.7918296}, timestamp = {Wed, 10 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LiuXLZM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LoLB17, author = {Sam C. Lo and Taylor T. Lee and Aaron J. Barker}, title = {High sigma statistical hold time analysis in FinFET sequential circuits}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {215--220}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918319}, doi = {10.1109/ISQED.2017.7918319}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LoLB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/MaLLHS17, author = {Kaisheng Ma and Minli Julie Liao and Xueqing Li and Zhixuan Huan and Jack Sampson}, title = {Evaluating tradeoffs in granularity and overheads in supporting nonvolatile execution semantics}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {39--44}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918290}, doi = {10.1109/ISQED.2017.7918290}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/MaLLHS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ManeMDR17, author = {Pravin Mane and Sudeep Mishra and Ravish Deliwala and C. K. Ramesha}, title = {Adder implementation in reconfigurable resistive switching crossbar}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {403--408}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918349}, doi = {10.1109/ISQED.2017.7918349}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ManeMDR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/MoritaBSHS17, author = {Shumpei Morita and Song Bian and Michihiro Shintani and Masayuki Hiromoto and Takashi Sato}, title = {Comparative study of path selection and objective function in replacing {NBTI} mitigation logic}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {426--431}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918353}, doi = {10.1109/ISQED.2017.7918353}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/MoritaBSHS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/PagliariniMP17, author = {Samuel Pagliarini and Mayler G. A. Martins and Lawrence T. Pileggi}, title = {Virtual characterization for exhaustive {DFM} evaluation of logic cell libraries}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {93--98}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918299}, doi = {10.1109/ISQED.2017.7918299}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/PagliariniMP17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/PangZZGQT17, author = {Zihan Pang and Jiliang Zhang and Qiang Zhou and Shuqian Gong and Xu Qian and Bin Tang}, title = {Crossover Ring Oscillator {PUF}}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {237--243}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918322}, doi = {10.1109/ISQED.2017.7918322}, timestamp = {Thu, 01 Feb 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/PangZZGQT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/PujariR17, author = {Ruturaj Pujari and Shaloo Rakheja}, title = {Performance evaluation of copper and graphene nanoribbons in 2-D NoC structures}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {353--359}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918341}, doi = {10.1109/ISQED.2017.7918341}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/PujariR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/QiXHWZC17, author = {Chunhua Qi and Liyi Xiao and Mingxue Huo and Tianqi Wang and Rongsheng Zhang and Xuebing Cao}, title = {A 13T radiation-hardened memory cell for low-voltage operation and ultra-low power space applications}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {161--165}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918310}, doi = {10.1109/ISQED.2017.7918310}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/QiXHWZC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/Rakheja17, author = {Shaloo Rakheja}, title = {Communication limits of on-chip graphene plasmonic interconnects}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {45--51}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918291}, doi = {10.1109/ISQED.2017.7918291}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/Rakheja17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/SafayenikooAFM17, author = {Pooneh Safayenikoo and Arghavan Asad and Mahmood Fathy and Farah Mohammadi}, title = {An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {373--378}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918344}, doi = {10.1109/ISQED.2017.7918344}, timestamp = {Wed, 15 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/SafayenikooAFM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/SalamatAAF17, author = {Sahand Salamat and Mehrnaz Ahmadi and Bijan Alizadeh and Masahiro Fujita}, title = {Systematic approximate logic optimization using don't care conditions}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {419--425}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918352}, doi = {10.1109/ISQED.2017.7918352}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/SalamatAAF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/SeoLKK17, author = {Sungyoul Seo and Hyeonchan Lim and Soyeon Kang and Sungho Kang}, title = {Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {191--195}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918315}, doi = {10.1109/ISQED.2017.7918315}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/SeoLKK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ShaerKJMC17, author = {Lama Shaer and Rouwaida Kanj and Rajiv V. Joshi and Maria Malik and Ali Chehab}, title = {Regularized logistic regression for fast importance sampling based {SRAM} yield analysis}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {119--124}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918303}, doi = {10.1109/ISQED.2017.7918303}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/ShaerKJMC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ShekharJN17, author = {Sameer Shekhar and Amit K. Jain and Pooja Nukala}, title = {Data interface buffer compensation scheme for fast calibration}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {296--300}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918331}, doi = {10.1109/ISQED.2017.7918331}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ShekharJN17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/SinghGJD17, author = {Wazir Singh and Yatharth Gupta and Paritosh Jivani and Sujay Deb}, title = {Energy efficient biopotential acquisition unit for wearable health monitoring applications}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {337--341}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918338}, doi = {10.1109/ISQED.2017.7918338}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/SinghGJD17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/TorresFKMGKMKA17, author = {J. Andres Torres and Germain Fenger and Daman Khaira and Yuansheng Ma and Yuri Granik and Chris Kapral and Joydeep Mitra and Polina Krasnova and Dehia Ait{-}Ferhat}, title = {Overview and development of {EDA} tools for integration of {DSA} into patterning solutions}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {99--103}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918300}, doi = {10.1109/ISQED.2017.7918300}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/TorresFKMGKMKA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/TsurumiTT17, author = {Kota Tsurumi and Masahiro Tanaka and Ken Takeuchi}, title = {0.6 {V} operation, 16 {\%} faster set/reset ReRAM boost converter with adaptive buffer voltage for ReRAM and {NAND} flash hybrid solid-state drives}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {81--86}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918297}, doi = {10.1109/ISQED.2017.7918297}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/TsurumiTT17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/VashishthaDMC17, author = {Vinay Vashishtha and Ankita Dosi and Lovish Masand and Lawrence T. Clark}, title = {Design technology co-optimization of back end of line design rules for a 7 nm predictive process design kit}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {149--154}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918308}, doi = {10.1109/ISQED.2017.7918308}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/VashishthaDMC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/VontelaG17, author = {Deepakreddy Vontela and Swaroop Ghosh}, title = {Methodologies to exploit {ATPG} tools for de-camouflaging}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {250--256}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918324}, doi = {10.1109/ISQED.2017.7918324}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/VontelaG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/WangKF17, author = {Qinhao Wang and Yusuke Kimura and Masahiro Fujita}, title = {Methods of equivalence checking and {ECO} support under C-based design through reproduction of {C} descriptions from implementation designs}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {432--437}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918354}, doi = {10.1109/ISQED.2017.7918354}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/WangKF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/YangM17, author = {Lita Yang and Boris Murmann}, title = {{SRAM} voltage scaling for energy-efficient convolutional neural networks}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {7--12}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918284}, doi = {10.1109/ISQED.2017.7918284}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/YangM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/Yli-MayryHA17, author = {Ville Yli{-}M{\"{a}}yry and Naofumi Homma and Takafumi Aoki}, title = {Chosen-input side-channel analysis on unrolled light-weight cryptographic hardware}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {301--306}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918332}, doi = {10.1109/ISQED.2017.7918332}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/Yli-MayryHA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/YoonR17, author = {Insik Yoon and Arijit Raychowdhury}, title = {Test challenges in embedded {STT-MRAM} arrays}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {35--38}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918289}, doi = {10.1109/ISQED.2017.7918289}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/YoonR17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ZalivakaIC17, author = {Siarhei S. Zalivaka and Alexander A. Ivaniuk and Chip{-}Hong Chang}, title = {{FPGA} implementation of modeling attack resistant arbiter {PUF} with enhanced reliability}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {313--318}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918334}, doi = {10.1109/ISQED.2017.7918334}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ZalivakaIC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ZhangG17, author = {Jizhe Zhang and Sandeep K. Gupta}, title = {Wordline overdriving test: An effective predictive testing method for SRAMs against {BTI} aging}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {454--459}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918358}, doi = {10.1109/ISQED.2017.7918358}, timestamp = {Tue, 26 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/ZhangG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/Zhao0ZX017, author = {Lei Zhao and Lei Jiang and Youtao Zhang and Nong Xiao and Jun Yang}, title = {Constructing fast and energy efficient 1TnR based ReRAM crossbar memory}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {58--64}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918293}, doi = {10.1109/ISQED.2017.7918293}, timestamp = {Thu, 11 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/Zhao0ZX017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/ZhaoLA017, author = {Chenyuan Zhao and Jialing Li and Hongyu An and Yang Yi}, title = {Energy efficient analog spiking temporal encoder with verification and recovery scheme for neuromorphic computing systems}, booktitle = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, pages = {138--143}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/ISQED.2017.7918306}, doi = {10.1109/ISQED.2017.7918306}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/ZhaoLA017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/isqed/2017, title = {18th International Symposium on Quality Electronic Design, {ISQED} 2017, Santa Clara, CA, USA, March 14-15, 2017}, publisher = {{IEEE}}, year = {2017}, url = {https://ieeexplore.ieee.org/xpl/conhome/7910185/proceeding}, isbn = {978-1-5090-5404-6}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isqed/2017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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