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@proceedings{DBLP:conf/ifip10-5/2001,
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
publisher = {Kluwer},
year = {2002},
isbn = {1-4020-7148-5},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/AraujoB01,
author = {Cristiano C. de Ara{\'{u}}jo and
Edna Barros},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Abstract Communication Model and Automatic Interface generation for
{IP} integration in Hardware/Software Co-design},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {145--156},
publisher = {Kluwer},
year = {2001},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/AraujoB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/AsciaCP01,
author = {Giuseppe Ascia and
Vincenzo Catania and
Maurizio Palesi},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {An Evolutionary Approach for Pareto-optimal Configurations in {SOC}
Platforms},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {157--168},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/AsciaCP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/AzaisBBR01,
author = {Florence Aza{\"{\i}}s and
Serge Bernard and
Yves Bertrand and
Michel Renovell},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {On-chip Generator of a Saw-Tooth Test Stimulus for {ADC} {BIST}},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {425--436},
publisher = {Kluwer},
year = {2001},
timestamp = {Fri, 10 Nov 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-5/AzaisBBR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/AzemardAMA01,
author = {Nadine Az{\'{e}}mard and
M. Aline and
Philippe Maurine and
Daniel Auvergne},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Feasible Delay Bound Definition},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {325--335},
publisher = {Kluwer},
year = {2001},
timestamp = {Thu, 12 Feb 2004 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-5/AzemardAMA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/BernardLN01,
author = {David Bernard and
Christian Landrault and
Pascal Nouet},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Interconnect Capacitance Modelling in a {VDSM} {CMOS} Technology},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {133--144},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/BernardLN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/BeroulleBLN01,
author = {Vincent Beroulle and
Yves Bertrand and
Laurent Latorre and
Pascal Nouet},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Noise optimisation of a piezoresistive {CMOS} {MEMS} for magnetic
field sensing},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {461--472},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/BeroulleBLN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/BeroulleLDOPPN01,
author = {Vincent Beroulle and
Laurent Latorre and
M. Dardalhon and
Coumar Oud{\'{e}}a and
Guy Perez and
Francis Pressecq and
Pascal Nouet},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Impact of Technology Spreading on {MEMS} design Robustness},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {241--251},
publisher = {Kluwer},
year = {2001},
timestamp = {Wed, 04 Feb 2015 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-5/BeroulleLDOPPN01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/CamposanoM01,
author = {Raul Camposano and
Don MacMillen},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Design Technology for Systems-on-Chip},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {87--96},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/CamposanoM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/CarroNJL01,
author = {Luigi Carro and
Andr{\'{e}} C. N{\'{a}}cul and
Daniel Janner and
Marcelo Lubaszewski},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Built-in Test of Analog Non-Linear Circuits in a {SOC} Environment},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {437--448},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/CarroNJL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/CasadeiNHC01,
author = {Bruno Casadei and
Jean{-}Piere Le Normand and
Yann Hu and
Bernard Cunin},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Design of a Fast {CMOS} {APS} Imager for High Speed Laser Detections},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {449--460},
publisher = {Kluwer},
year = {2001},
timestamp = {Wed, 15 Jun 2011 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/CasadeiNHC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/ChoiB01,
author = {Jung Hyun Choi and
Sergio Bampi},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {{CMOS} Mixed-signal Circuits Design on a Digital Array Using Minimum
Transistors},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {337--347},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/ChoiB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/CurranGMBMA01,
author = {Brian W. Curran and
Mary Gifaldi and
Jason Martin and
Alper Buyuktosunoglu and
Martin Margala and
David H. Albonesi},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Low-Voltage 0, 25 {\(\mathrm{\mu}\)}m {CMOS} Improved Power Adaptive
Issue Queue for Embedded Microprocessors},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {289--300},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/CurranGMBMA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/DavidCPS01,
author = {Rapha{\"{e}}l David and
Daniel Chillet and
S{\'{e}}bastien Pillement and
Olivier Sentieys},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {A Dynamically Reconfigurable Architecture for Low-Power Multimedia
Terminals},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {51--62},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/DavidCPS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/DavidGLPV01,
author = {Ren{\'{e}} David and
Patrick Girard and
Christian Landrault and
Serge Pravossoudovitch and
Arnaud Virazel},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Random Adjacent Sequences: An Efficient Solution for Logic {BIST}},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {413--424},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 06 Sep 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/DavidGLPV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/DemignyKP01,
author = {Didier Demigny and
Lounis Kessal and
J. Pons},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Fast Recursive Implementation of the Gaussian Filter},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {39--49},
publisher = {Kluwer},
year = {2001},
timestamp = {Mon, 25 Jul 2005 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/DemignyKP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/DutertreRC01,
author = {Jean{-}Max Dutertre and
F. M. Roche and
Guy Cath{\'{e}}bras},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Integration of Robustness in the Design of a Cell},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {229--239},
publisher = {Kluwer},
year = {2001},
timestamp = {Thu, 16 Apr 2015 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/DutertreRC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/FlottesPR01,
author = {Marie{-}Lise Flottes and
Julien Pouget and
Bruno Rouzeyre},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Power-Constrained Test Scheduling for SoCs Under a "no session" Scheme},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {401--412},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/FlottesPR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/GebotysM01,
author = {Catherine H. Gebotys and
Radu Muresan},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Modeling Power Dynamics for an Embedded {DSP} Processor Core. An Empirical
Model},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {205--216},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/GebotysM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/Guitton-OuhamouBA01,
author = {Patricia Guitton{-}Ouhamou and
C{\'{e}}cile Belleudy and
Michel Auguin},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Power Consumption Model for the {DSP} {OAK} Processor},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {217--228},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/Guitton-OuhamouBA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/IndrusiakBGR01,
author = {Leandro Soares Indrusiak and
J{\"{u}}rgen Becker and
Manfred Glesner and
Ricardo Augusto da Luz Reis},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Distributed Collaborative Design over Cave2 Framework},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {97--108},
publisher = {Kluwer},
year = {2001},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/IndrusiakBGR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/ItohM01,
author = {Kiyoo Itoh and
Hiroyuki Mizuno},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Low-Voltage Embedded-RAM Technology: Present and Future},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {277--288},
publisher = {Kluwer},
year = {2001},
timestamp = {Thu, 07 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/ItohM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/JohannsenD01,
author = {Peer Johannsen and
Rolf Drechsler},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Speeding Up Verification of {RTL} Designs by Computing One-to-one
Abstractions with Reduced Signal Widths},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {361--374},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/JohannsenD01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/KessalBDBK01,
author = {Lounis Kessal and
R. Bourguiba and
Didier Demigny and
N. Boudouani and
Si Mahmoud Karabernou},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Reconfigurable Architecture Using High Speed {FPGA}},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {75--86},
publisher = {Kluwer},
year = {2001},
timestamp = {Wed, 14 Jul 2010 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/KessalBDBK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/KomuroI01,
author = {Takashi Komuro and
Masatoshi Ishikawa},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {64{\texttimes}64 Pixels General Purpose Digital Vision Chip},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {15--26},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/KomuroI01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/LallementPH01,
author = {Christophe Lallement and
Fran{\c{c}}ois P{\^{e}}cheux and
Yannick Herv{\'{e}}},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {A {VHDL-AMS} Case Study: The Incremental Design of an Efficient 3\({}^{\mbox{rd}}\)
Generation {MOS} Model of a Deep Sub Micron Transistor},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {349--360},
publisher = {Kluwer},
year = {2001},
timestamp = {Wed, 19 Apr 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/LallementPH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/LamatyMDKK01,
author = {P. Lamaty and
B. Mazar and
Didier Demigny and
Lounis Kessal and
Si Mahmoud Karabernou},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Two {ASIC} for Low and Middle Levels of Real Time Image Processing},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {3--14},
publisher = {Kluwer},
year = {2001},
timestamp = {Wed, 14 Jul 2010 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/LamatyMDKK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/Marinissen01,
author = {Erik Jan Marinissen},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {An Industrial Approach to Core-Based System Chip Testing},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {389--400},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/Marinissen01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/MaurineAA01,
author = {Philippe Maurine and
Nadine Az{\'{e}}mard and
Daniel Auvergne},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Gate Sizing for Low Power Design},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {301--312},
publisher = {Kluwer},
year = {2001},
timestamp = {Thu, 12 Feb 2004 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-5/MaurineAA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/MeftaliGRJ01,
author = {Samy Meftali and
Ferid Gharsalli and
Fr{\'{e}}d{\'{e}}ric Rousseau and
Ahmed Amine Jerraya},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Automatic Code-Transformation and Architecture Refinement for Application-Specific
Multiprocessor SoCs with Shared Memory},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {193--204},
publisher = {Kluwer},
year = {2001},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/MeftaliGRJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/MelloW01,
author = {Braulio Adriano de Mello and
Fl{\'{a}}vio Rech Wagner},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {A Standardized Co-simulation Backbone},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {181--192},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/MelloW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/MikiKOS01,
author = {Morgan Hirosuke Miki and
Motoki Kimura and
Takao Onoye and
Isao Shirakawa},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {High Performance Java Hardware Engine and Software Kernel for Embedded
Systems},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {109--120},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/MikiKOS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/NeveF01,
author = {Amaury N{\`{e}}ve and
Denis Flandre},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Design of a Branch-Based Carry-Select Adder {IP} Portable in 0.25
{\(\mathrm{\mu}\)}m Bulk and Silicon-On-Insulator {CMOS} Technologies},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {169--180},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/NeveF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/OteroW01,
author = {Jo{\~{a}}o Cl{\'{a}}udio Soares Otero and
Fl{\'{a}}vio Rech Wagner},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {An Object-Oriented Methodology for Modeling the Precise Behavior of
Processor Architectures},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {121--132},
publisher = {Kluwer},
year = {2001},
timestamp = {Sun, 20 May 2007 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/OteroW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/PisukW01,
author = {Stephen M. Pisuk and
Peter Hsin{-}Yu Wu},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Design Considerations of a Low-Complexity, Low-Power Integer Turbo
Decoder},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {265--276},
publisher = {Kluwer},
year = {2001},
timestamp = {Thu, 08 Aug 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/PisukW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/RigaudQFR01,
author = {Jean{-}Baptiste Rigaud and
Jerome Quartana and
Laurent Fesquet and
Marc Renaudin},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Modeling and Design of Asynchronous Priority Arbiters for On-Chip
Communication Systems},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {313--324},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/RigaudQFR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/RomaS01,
author = {Nuno Roma and
Leonel Sousa},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {A New Efficient {VLSI} Architecture for Full Search Block Matching
Motion Estimation},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {253--264},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/RomaS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/SassatelliTBCRG01,
author = {Gilles Sassatelli and
Lionel Torres and
Pascal Benoit and
Gaston Cambon and
Michel Robert and
J{\'{e}}r{\^{o}}me Galy},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Dynamically Reconfigurable Architectures for Digital Signal Processing
Applications},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {63--74},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/SassatelliTBCRG01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/SennM01,
author = {Eric Senn and
Eric Martin},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {A Vision System on Chip for Industrial Control},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {27--38},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 05 Jun 2012 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/SennM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/ZengCR01,
author = {Zhihong Zeng and
Maciej J. Ciesielski and
Bruno Rouzeyre},
editor = {Michel Robert and
Bruno Rouzeyre and
Christian Piguet and
Marie{-}Lise Flottes},
title = {Functional Test Generation using Constraint Logic Programming},
booktitle = {{SOC} Design Methodologies, {IFIP} {TC10/WG10.5} Eleventh International
Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01),
December 3-5, 2001, Montpellier, France},
series = {{IFIP} Conference Proceedings},
volume = {218},
pages = {375--387},
publisher = {Kluwer},
year = {2001},
timestamp = {Tue, 13 Aug 2002 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/ZengCR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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