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@inproceedings{DBLP:conf/heart/AmagasakiMKIS17, author = {Motoki Amagasaki and Futoshi Murase and Morihiro Kuga and Masahiro Iida and Toshinori Sueyoshi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{FPGA} based {ASIC} Emulator with High Speed Optical Serial Links}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {18:1--18:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120913}, doi = {10.1145/3120895.3120913}, timestamp = {Wed, 28 Apr 2021 16:06:55 +0200}, biburl = {https://dblp.org/rec/conf/heart/AmagasakiMKIS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/ArndtSWPNB17, author = {Oliver Jakob Arndt and Christian Spindeldreier and Kevin Wohnrade and Daniel Pfefferkorn and Martin Neuenhahn and Holger Blume}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{FPGA} Accelerated NoC-Simulation: {A} Case Study on the Intel Xeon Phi Ringbus Topology}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {21:1--21:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120916}, doi = {10.1145/3120895.3120916}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/ArndtSWPNB17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/BaileyMS17, author = {Donald G. Bailey and Faisal Mahmood and Ulf Skoglund}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Reducing the Cost of Removing Border Artefacts in Fourier Transforms}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {11:1--11:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120899}, doi = {10.1145/3120895.3120899}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/BaileyMS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/EngelhardtS17, author = {Nina Engelhardt and Hayden Kwok{-}Hay So}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Towards Flexible Automatic Generation of Graph Processing Gateware}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {5:1--5:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120896}, doi = {10.1145/3120895.3120896}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/EngelhardtS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/FukudaI17, author = {Masahiro Fukuda and Yasushi Inoguchi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Probabilistic Strategies Based on Staged {LSH} for Speedup of Audio Fingerprint Searching with Ten Million Scale Database}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {26:1--26:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120921}, doi = {10.1145/3120895.3120921}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/FukudaI17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/IshikawaYKMN17, author = {Yuto Ishikawa and Keitaro Yanai and Keisuke Koike and Takefumi Miyoshi and Hironori Nakajo}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Hardware Acceleration with Multi-Threading of Java-Based High Level Synthesis Tool}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {8:1--8:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120912}, doi = {10.1145/3120895.3120912}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/IshikawaYKMN17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KalmsMG17, author = {Lester Kalms and Khaled Mohamed and Diana G{\"{o}}hringer}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Accelerated Embedded {AKAZE} Feature Detection Algorithm on {FPGA}}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {10:1--10:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120898}, doi = {10.1145/3120895.3120898}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/KalmsMG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KamasakaSO17, author = {Ryo Kamasaka and Yuichiro Shibata and Kiyoshi Oguri}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{FPGA} Implementation of {A} Graph Cut Algorithm For Stereo Vision}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {14:1--14:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120907}, doi = {10.1145/3120895.3120907}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/KamasakaSO17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KanedaSNHTA17, author = {Takahiro Kaneda and Ryotaro Sakai and Naoki Nishikawa and Toshihiro Hanawa and Chiharu Tsuruta and Hideharu Amano}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Performance Evaluation of {PEACH3:} Field-Programmable Gate Array Switch for Tightly Coupled Accelerators}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {9:1--9:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120911}, doi = {10.1145/3120895.3120911}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/KanedaSNHTA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KhanGHG17, author = {Habib ul Hasan Khan and Thomas Grimm and Michael H{\"{u}}bner and Diana G{\"{o}}hringer}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Access Network Generation for Efficient Debugging of FPGAs}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {25:1--25:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120920}, doi = {10.1145/3120895.3120920}, timestamp = {Wed, 28 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/KhanGHG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KoraeiJF17, author = {Mostafa Koraei and Magnus Jahre and S. Omid Fatemi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{DTP:} Enabling Exhaustive Exploration of {FPGA} Temporal Partitions for Streaming {HPC} Applications}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {7:1--7:11}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120901}, doi = {10.1145/3120895.3120901}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/KoraeiJF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/KugaFAIS17, author = {Morihiro Kuga and Kansuke Fukuda and Motoki Amagasaki and Masahiro Iida and Toshinori Sueyoshi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {High-level Synthesis based on Parallel Design Patterns using a Functional Language}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {23:1--23:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120918}, doi = {10.1145/3120895.3120918}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/KugaFAIS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/LiL17, author = {Jiajun Li and Qiang Liu}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Neural Network Training Acceleration with {PSO} Algorithm on a {GPU} Using OpenCL}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {17:1--17:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120910}, doi = {10.1145/3120895.3120910}, timestamp = {Tue, 21 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/LiL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/MiyajimaKF17, author = {Takaaki Miyajima and Kenichi Kubota and Naoyuki Fujita}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {A porting and optimization of search for neighbour-particle in {MPS} method for {GPU} by using OpenACC}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {12:1--12:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120903}, doi = {10.1145/3120895.3120903}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/MiyajimaKF17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/MorishimaOM17, author = {Shin Morishima and Masahiro Okazaki and Hiroki Matsutani}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {A Case for Remote GPUs over 10GbE Network for {VR} Applications}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {19:1--19:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120914}, doi = {10.1145/3120895.3120914}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/MorishimaOM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/NodaSMFA17, author = {Hiroyuki Noda and Ryotaro Sakai and Takaaki Miyajima and Naoyuki Fujita and Hideharu Amano}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Acceleration of the aggregation process in a Hall-thruster simulation using Intel {FPGA} {SDK} for OpenCL}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {20:1--20:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120915}, doi = {10.1145/3120895.3120915}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/NodaSMFA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/NouriRGN17, author = {Sajjad Nouri and Jens Rettkowski and Diana G{\"{o}}hringer and Jari Nurmi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{HW/SW} Co-design of an {IEEE} 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {15:1--15:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120908}, doi = {10.1145/3120895.3120908}, timestamp = {Wed, 16 Mar 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/NouriRGN17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/OrdazK17, author = {Jose Raul Garcia Ordaz and Dirk Koch}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {{HLS} Compilation for {CPU} Interlays}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {27:1--27:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120922}, doi = {10.1145/3120895.3120922}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/OrdazK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/OsanaS17, author = {Yasunori Osana and Yohei Sakamoto}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Performance Evaluation of a {CPU-FPGA} Hybrid Cluster Platform Prototype}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {22:1--22:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120917}, doi = {10.1145/3120895.3120917}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/OsanaS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/SakakibaraNM17, author = {Yuma Sakakibara and Kohei Nakamura and Hiroki Matsutani}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {An {FPGA} {NIC} Based Hardware Caching for Blockchain}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {1:1--1:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120897}, doi = {10.1145/3120895.3120897}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/SakakibaraNM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/SanoAU17, author = {Kentaro Sano and Shin Abiko and Tomohiro Ueno}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {FPGA-based Stream Computing for High-Performance N-Body Simulation using Floating-Point {DSP} Blocks}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {16:1--16:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120909}, doi = {10.1145/3120895.3120909}, timestamp = {Sun, 12 Nov 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/SanoAU17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/ShelorK17, author = {Charles Shelor and Krishna M. Kavi}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Dataflow based Near Data Computing Achieves Excellent Energy Efficiency}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {6:1--6:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120900}, doi = {10.1145/3120895.3120900}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/ShelorK17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/StamouliasMMSKS17, author = {Ioannis Stamoulias and Matthias M{\"{o}}ller and Rene Miedema and Christos Strydis and Christoforos Kachris and Dimitrios Soudris}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {High-Performance Hardware Accelerators for Solving Ordinary Differential Equations}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {24:1--24:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120919}, doi = {10.1145/3120895.3120919}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/StamouliasMMSKS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/SugataOOY17, author = {Yuhei Sugata and Takeshi Ohkawa and Kanemitsu Ootsu and Takashi Yokota}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Acceleration of Publish/Subscribe Messaging in ROS-compliant {FPGA} Component}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {13:1--13:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120904}, doi = {10.1145/3120895.3120904}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/SugataOOY17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/TadaSE17, author = {Jubee Tada and Masayuki Sato and Ryusuke Egawa}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {An Adaptive Demotion Policy for High-Associativity Caches}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {4:1--4:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120906}, doi = {10.1145/3120895.3120906}, timestamp = {Fri, 27 Dec 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/TadaSE17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/WijesunderaIPS17, author = {Deshya Wijesundera and Achintha Ihalage and Alok Prakash and Thambipillai Srikanthan}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {High Speed Performance Estimation of Embedded Hard-core Processors in FPGA-based SoCs}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {2:1--2:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120902}, doi = {10.1145/3120895.3120902}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/WijesunderaIPS17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/heart/YamamotoHTIAM17, author = {Kasho Yamamoto and Weiqiang Huang and Shinya Takamaeda{-}Yamazaki and Masayuki Ikebe and Tetsuya Asai and Masato Motomura}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {A Time-Division Multiplexing Ising Machine on FPGAs}, booktitle = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, pages = {3:1--3:6}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895.3120905}, doi = {10.1145/3120895.3120905}, timestamp = {Tue, 29 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/heart/YamamotoHTIAM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/heart/2017, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner}, title = {Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, {HEART} 2017, Bochum, Germany, June 7-9, 2017}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3120895}, doi = {10.1145/3120895}, isbn = {978-1-4503-5316-8}, timestamp = {Wed, 28 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/heart/2017.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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