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@article{DBLP:journals/tcad/AghilinasabAYP20,
author = {Homa Aghilinasab and
Waqar Ali and
Heechul Yun and
Rodolfo Pellizzoni},
title = {Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3348--3360},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012210},
doi = {10.1109/TCAD.2020.3012210},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AghilinasabAYP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AgostaBP20,
author = {Giovanni Agosta and
Alessandro Barenghi and
Gerardo Pelosi},
title = {Compiler-Based Techniques to Secure Cryptographic Embedded Software
Against Side-Channel Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1550--1554},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912924},
doi = {10.1109/TCAD.2019.2912924},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AgostaBP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AhmadAHHS20,
author = {Hazoor Ahmad and
Tabasher Arif and
Muhammad Abdullah Hanif and
Rehan Hafiz and
Muhammad Shafique},
title = {SuperSlash: {A} Unified Design Space Exploration and Model Compression
Methodology for Design of Deep Learning Accelerators With Reduced
Off-Chip Memory Access Volume},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4191--4204},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012865},
doi = {10.1109/TCAD.2020.3012865},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AhmadAHHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AkbariKAPS20,
author = {Omid Akbari and
Mehdi Kamal and
Ali Afzali{-}Kusha and
Massoud Pedram and
Muhammad Shafique},
title = {{X-CGRA:} An Energy-Efficient Approximate Coarse-Grained Reconfigurable
Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2558--2571},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2937738},
doi = {10.1109/TCAD.2019.2937738},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AkbariKAPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Al-dalooSY20,
author = {Mohammed Al{-}daloo and
Ahmed Soltan and
Alex Yakovlev},
title = {Advance Interconnect Circuit Modeling Design Using Fractional-Order
Elements},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2722--2734},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962779},
doi = {10.1109/TCAD.2019.2962779},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Al-dalooSY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AlimARG20,
author = {Mohammad Abdul Alim and
Mayahsa M. Ali and
Ali A. Rezazadeh and
Christophe Gaqui{\`{e}}re},
title = {Temperature Dependence of the Taylor Series Coefficients and Intermodulation
Distortion Characteristics of GaN {HEMT}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {552--559},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897696},
doi = {10.1109/TCAD.2019.2897696},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AlimARG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AmrouchZSKAH20,
author = {Hussam Amrouch and
Georgios Zervakis and
Sami Salamin and
Hammam Kattan and
Iraklis Anagnostopoulos and
J{\"{o}}rg Henkel},
title = {{NPU} Thermal Management},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3842--3855},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012753},
doi = {10.1109/TCAD.2020.3012753},
timestamp = {Wed, 06 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AmrouchZSKAH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AndradeGPS20,
author = {Gabriel A. G. Andrade and
Marleson Graf and
N{\'{\i}}colas Pfeifer and
Luiz C. V. dos Santos},
title = {A Directed Test Generator for Shared-Memory Verification of Multicore
Chip Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5295--5303},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2974343},
doi = {10.1109/TCAD.2020.2974343},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AndradeGPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AndradeGS20,
author = {Gabriel A. G. Andrade and
Marleson Graf and
Luiz C. V. dos Santos},
title = {Chaining and Biasing: Test Generation Techniques for Shared-Memory
Verification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {728--741},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894376},
doi = {10.1109/TCAD.2019.2894376},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AndradeGS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AngiziHAF20,
author = {Shaahin Angizi and
Zhezhi He and
Amro Awad and
Deliang Fan},
title = {{MRIMA:} An MRAM-Based In-Memory Accelerator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1123--1136},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907886},
doi = {10.1109/TCAD.2019.2907886},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AngiziHAF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AnkitISR20,
author = {Aayush Ankit and
Timur Ibrayev and
Abhronil Sengupta and
Kaushik Roy},
title = {TraNNsformer: Clustered Pruning on Crossbar-Based Architectures for
Energy-Efficient Neural Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2361--2374},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2946820},
doi = {10.1109/TCAD.2019.2946820},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AnkitISR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AnsariYSE20,
author = {Mohsen Ansari and
Amir Yeganeh{-}Khaksar and
Sepideh Safari and
Alireza Ejlali},
title = {Peak-Power-Aware Energy Management for Periodic Real-Time Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {779--788},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2901244},
doi = {10.1109/TCAD.2019.2901244},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AnsariYSE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ArdesiWTPG20,
author = {Yuri Ardesi and
Ruiyu Wang and
Giovanna Turvani and
Gianluca Piccinini and
Mariagrazia Graziano},
title = {{SCERPA:} {A} Self-Consistent Algorithm for the Evaluation of the
Information Propagation in Molecular Field-Coupled Nanocomputing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2749--2760},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960360},
doi = {10.1109/TCAD.2019.2960360},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ArdesiWTPG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AriasSSJ20,
author = {Orlando Arias and
Dean Sullivan and
Haoqi Shan and
Yier Jin},
title = {SaeCAS: Secure Authenticated Execution Using CAM-Based Vector Storage},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4078--4089},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013075},
doi = {10.1109/TCAD.2020.3013075},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/AriasSSJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BairamkulovXPOS20,
author = {Rassul Bairamkulov and
Kan Xu and
Mikhail Popovich and
Juan Ochoa and
Vaishnav Srinivas and
Eby G. Friedman},
title = {Power Delivery Exploration Methodology Based on Constrained Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1916--1924},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925397},
doi = {10.1109/TCAD.2019.2925397},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BairamkulovXPOS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Balasubramanian20,
author = {Mahesh Balasubramanian and
Aviral Shrivastava},
title = {{CRIMSON:} Compute-Intensive Loop Acceleration by Randomized Iterative
Modulo Scheduling and Optimized Mapping on CGRAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3300--3310},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3022015},
doi = {10.1109/TCAD.2020.3022015},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Balasubramanian20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BarenghiFPZ20,
author = {Alessandro Barenghi and
William Fornaciari and
Gerardo Pelosi and
Davide Zoni},
title = {Scramble Suit: {A} Profile Differentiation Countermeasure to Prevent
Template Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1778--1791},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926389},
doi = {10.1109/TCAD.2019.2926389},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BarenghiFPZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BartocciDGMNQ20,
author = {Ezio Bartocci and
Jyotirmoy Deshmukh and
Felix Gigler and
Cristinel Mateis and
Dejan Nickovic and
Xin Qin},
title = {Mining Shape Expressions From Positive Examples},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3809--3820},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012240},
doi = {10.1109/TCAD.2020.3012240},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BartocciDGMNQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BeigMohammadiA20,
author = {Siamack BeigMohammadi and
Bijan Alizadeh},
title = {Combinational Hybrid Signal Selection With Updated Reachability Lists
for Post-Silicon Debug},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {272--276},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883969},
doi = {10.1109/TCAD.2018.2883969},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BeigMohammadiA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BelkhoujaD20,
author = {Taha Belkhouja and
Janardhan Rao Doppa},
title = {Analyzing Deep Learning for Time-Series Data Through Adversarial Lens
in Mobile and IoT Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3190--3201},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012171},
doi = {10.1109/TCAD.2020.3012171},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/BelkhoujaD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BellevilleCHMO20,
author = {Nicolas Belleville and
Damien Courouss{\'{e}} and
Karine Heydemann and
Quentin L. Meunier and
In{\`{e}}s Ben El Ouahma},
title = {Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial
Interpolation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3774--3786},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012237},
doi = {10.1109/TCAD.2020.3012237},
timestamp = {Sat, 02 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BellevilleCHMO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BernardoGFLB20,
author = {Paul Palomero Bernardo and
Christoph Gerum and
Adrian Frischknecht and
Konstantin L{\"{u}}beck and
Oliver Bringmann},
title = {UltraTrail: {A} Configurable Ultralow-Power TC-ResNet {AI} Accelerator
for Efficient Keyword Spotting},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4240--4251},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012320},
doi = {10.1109/TCAD.2020.3012320},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/BernardoGFLB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BhattacharjeeWH20,
author = {Sukanta Bhattacharjee and
Robert Wille and
Juinn{-}Dar Huang and
Bhargab B. Bhattacharya},
title = {Storage-Aware Algorithms for Dilution and Mixture Preparation With
Flow-Based Lab-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {816--829},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907911},
doi = {10.1109/TCAD.2019.2907911},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BhattacharjeeWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BhuiyanRFG20,
author = {Ashikahmed Bhuiyan and
Federico Reghenzani and
William Fornaciari and
Zhishan Guo},
title = {Optimizing Energy in Non-Preemptive Mixed-Criticality Scheduling by
Exploiting Probabilistic Information},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3906--3917},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012231},
doi = {10.1109/TCAD.2020.3012231},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BhuiyanRFG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BogomolovFFPS20,
author = {Sergiy Bogomolov and
Marcelo Forets and
Goran Frehse and
Kostiantyn Potomkin and
Christian Schilling},
title = {Reachability Analysis of Linear Hybrid Systems via Block Decomposition},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4018--4029},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012859},
doi = {10.1109/TCAD.2020.3012859},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/BogomolovFFPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BounceurMEB20,
author = {Ahc{\`{e}}ne Bounceur and
Salvador Mir and
Reinhardt Euler and
Kamel Beznia},
title = {Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate
Extreme Value Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {966--976},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907923},
doi = {10.1109/TCAD.2019.2907923},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BounceurMEB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BuWRXL20,
author = {Lei Bu and
Qixin Wang and
Xinyue Ren and
Shaopeng Xing and
Xuandong Li},
title = {Scenario-Based Online Reachability Validation for {CPS} Fault Prediction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2081--2094},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935062},
doi = {10.1109/TCAD.2019.2935062},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BuWRXL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BukhariKH0H20,
author = {Syed Ali Asadullah Bukhari and
Faiq Khalid and
Osman Hasan and
Muhammad Shafique and
J{\"{o}}rg Henkel},
title = {Toward Model Checking-Driven Fair Comparison of Dynamic Thermal Management
Techniques Under Multithreaded Workloads},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1725--1738},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2921313},
doi = {10.1109/TCAD.2019.2921313},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BukhariKH0H20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CabodiCPPV20,
author = {Gianpiero Cabodi and
Paolo Camurati and
Marco Palena and
Paolo Pasini and
Danilo Vendraminetto},
title = {Reducing Interpolant Circuit Size Through SAT-Based Weakening},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1524--1531},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915317},
doi = {10.1109/TCAD.2019.2915317},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CabodiCPPV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaiLXCHWY20,
author = {Yi Cai and
Yujun Lin and
Lixue Xia and
Xiaoming Chen and
Song Han and
Yu Wang and
Huazhong Yang},
title = {Long Live {TIME:} Improving Lifetime and Security for NVM-Based Training-in-Memory
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4707--4720},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977079},
doi = {10.1109/TCAD.2020.2977079},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaiLXCHWY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaiTXLWY20,
author = {Yi Cai and
Tianqi Tang and
Lixue Xia and
Boxun Li and
Yu Wang and
Huazhong Yang},
title = {Low Bit-Width Convolutional Neural Network on {RRAM}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1414--1427},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917852},
doi = {10.1109/TCAD.2019.2917852},
timestamp = {Tue, 24 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaiTXLWY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CamposanoB20,
author = {Ra{\'{u}}l Camposano and
Oliver Bringmann},
title = {Wolfgang Rosenstiel},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4308},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3026564},
doi = {10.1109/TCAD.2020.3026564},
timestamp = {Mon, 23 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CamposanoB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CanelasPMLGCH20,
author = {Ant{\'{o}}nio Canelas and
Ricardo P{\'{o}}voa and
Ricardo Martins and
Nuno Louren{\c{c}}o and
Jorge Guilherme and
Jo{\~{a}}o Paulo Carvalho and
Nuno Horta},
title = {{FUZYE:} {A} Fuzzy \emph{c}-Means Analog {IC} Yield Optimization Using
Evolutionary-Based Algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {1--13},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883978},
doi = {10.1109/TCAD.2018.2883978},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CanelasPMLGCH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaoHCZ20,
author = {Weidong Cao and
Xin He and
Ayan Chakrabarti and
Xuan Zhang},
title = {NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1841--1854},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925391},
doi = {10.1109/TCAD.2019.2925391},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaoHCZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaoZXWH20,
author = {Kun Cao and
Junlong Zhou and
Guo Xu and
Tongquan Wei and
Shiyan Hu},
title = {Exploring Renewable-Adaptive Computation Offloading for Hierarchical
QoS Optimization in Fog Computing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2095--2108},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2957374},
doi = {10.1109/TCAD.2019.2957374},
timestamp = {Thu, 17 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CaoZXWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChakrabortyJLRS20,
author = {Abhishek Chakraborty and
Nithyashankari Gummidipoondi Jayasankaran and
Yuntao Liu and
Jeyavijayan Rajendran and
Ozgur Sinanoglu and
Ankur Srivastava and
Yang Xie and
Muhammad Yasin and
Michael Zuzak},
title = {Keynote: {A} Disquisition on Logic Locking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {1952--1972},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944586},
doi = {10.1109/TCAD.2019.2944586},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChakrabortyJLRS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChangCCC20,
author = {Li{-}Pin Chang and
Chia{-}Hsiang Cheng and
Shu{-}Ting Chang and
Po{-}Han Chou},
title = {Current-Aware Flash Scheduling for Current Capping in Solid State
Disks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {321--334},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887046},
doi = {10.1109/TCAD.2018.2887046},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChangCCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChangJ20,
author = {Wei{-}Chun Chang and
Iris Hui{-}Ru Jiang},
title = {iClaire: {A} Fast and General Layout Pattern Classification Algorithm
With Clip Shifting and Centroid Recreation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1662--1673},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917849},
doi = {10.1109/TCAD.2019.2917849},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChangJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CharlesLM20,
author = {Subodha Charles and
Yangdi Lyu and
Prabhat Mishra},
title = {Real-Time Detection and Localization of Distributed DoS Attacks in
NoC-Based SoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4510--4523},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2972524},
doi = {10.1109/TCAD.2020.2972524},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CharlesLM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenCCWS20,
author = {Shuo{-}Han Chen and
Tseng{-}Yi Chen and
Yuan{-}Hao Chang and
Hsin{-}Wen Wei and
Wei{-}Kuan Shih},
title = {A Partial Page Cache Strategy for NVRAM-Based Storage Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {373--386},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887045},
doi = {10.1109/TCAD.2018.2887045},
timestamp = {Tue, 05 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenCCWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenGLHXW20,
author = {Song Chen and
Mengke Ge and
Zhigang Li and
Jinglei Huang and
Qi Xu and
Feng Wu},
title = {Generalized Fault-Tolerance Topology Generation for Application-Specific
Network-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1191--1204},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2952134},
doi = {10.1109/TCAD.2019.2952134},
timestamp = {Tue, 25 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenGLHXW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenHXDX20,
author = {Song Chen and
Jinglei Huang and
Xiaodong Xu and
Bo Ding and
Qi Xu},
title = {Integrated Optimization of Partitioning, Scheduling, and Floorplanning
for Partially Dynamically Reconfigurable Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {199--212},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883982},
doi = {10.1109/TCAD.2018.2883982},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenHXDX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenKH20,
author = {Wei{-}Ming Chen and
Tei{-}Wei Kuo and
Pi{-}Cheng Hsiu},
title = {Enabling Failure-Resilient Intermittent Systems Without Runtime Checkpointing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4399--4412},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977078},
doi = {10.1109/TCAD.2020.2977078},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenL20,
author = {Yuechen Chen and
Ahmed Louri},
title = {Learning-Based Quality Management for Approximate Communication in
Network-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3724--3735},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012235},
doi = {10.1109/TCAD.2020.3012235},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenLGSWP20,
author = {Ying Chen and
Yibo Lin and
Tianyang Gai and
Yajuan Su and
Yayi Wei and
David Z. Pan},
title = {Semisupervised Hotspot Detection With Self-Paced Multitask Learning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1511--1523},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912948},
doi = {10.1109/TCAD.2019.2912948},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenLGSWP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenLHMHZH20,
author = {Gang Chen and
Yehua Ling and
Tao He and
Haitao Meng and
Shengyu He and
Yu Zhang and
Kai Huang},
title = {StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality
Stereo Estimation With Binary Neural Network},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4179--4190},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012864},
doi = {10.1109/TCAD.2020.3012864},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenLHMHZH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenLKHCCCK20,
author = {Jianli Chen and
Zhifeng Lin and
Yun{-}Chih Kuo and
Chau{-}Chin Huang and
Yao{-}Wen Chang and
Shih{-}Chun Chen and
Chun{-}Han Chiang and
Sy{-}Yen Kuo},
title = {Clock-Aware Placement for Large-Scale Heterogeneous FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5042--5055},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968892},
doi = {10.1109/TCAD.2020.2968892},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenLKHCCCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenPLY20,
author = {Gengjie Chen and
Chak{-}Wa Pui and
Haocheng Li and
Evangeline F. Y. Young},
title = {Dr. {CU:} Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured
Path Search},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1902--1915},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927542},
doi = {10.1109/TCAD.2019.2927542},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenPLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenTC20,
author = {Shuo{-}Han Chen and
Che{-}Wei Tsao and
Yuan{-}Hao Chang},
title = {Beyond Address Mapping: {A} User-Oriented Multiregional Space Management
Design for 3-D {NAND} Flash Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1286--1299},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912937},
doi = {10.1109/TCAD.2019.2912937},
timestamp = {Tue, 05 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenTC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenWCXFYWD20,
author = {Xuanqi Chen and
Zhifei Wang and
Yi{-}Shing Chang and
Jiang Xu and
Jun Feng and
Peng Yang and
Zhehui Wang and
Luan H. K. Duong},
title = {Modeling and Analysis of Optical Modulators Based on Free-Carrier
Plasma Dispersion Effect},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {977--990},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907907},
doi = {10.1109/TCAD.2019.2907907},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenWCXFYWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenY20,
author = {Gengjie Chen and
Evangeline F. Y. Young},
title = {{SALT:} Provably Good Routing Topology by a Novel Steiner Shallow-Light
Tree Algorithm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1217--1230},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894653},
doi = {10.1109/TCAD.2019.2894653},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChengLBN20,
author = {Mingxi Cheng and
Ji Li and
Paul Bogdan and
Shahin Nazarian},
title = {H{\unicode{8322}}O-Cloud: {A} Resource and Quality of Service-Aware
Task Scheduling Framework for Warehouse-Scale Data Centers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2925--2937},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2930575},
doi = {10.1109/TCAD.2019.2930575},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChengLBN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CheongLK20,
author = {Minho Cheong and
Ingeol Lee and
Sungho Kang},
title = {A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for
Clustering Faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1925--1934},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927485},
doi = {10.1109/TCAD.2019.2927485},
timestamp = {Tue, 27 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CheongLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChernLHHVTC20,
author = {Mason Chern and
Shih{-}Wei Lee and
Shi{-}Yu Huang and
Yu Huang and
Gaurav Veda and
Kun{-}Han Tsai and
Wu{-}Tung Cheng},
title = {Diagnosis of Intermittent Scan Chain Faults Through a Multistage Neural
Network Reasoning Process},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3044--3055},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2957356},
doi = {10.1109/TCAD.2019.2957356},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChernLHHVTC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChiangCJYLW20,
author = {Hsiao{-}Yu Chiang and
Yung{-}Chih Chen and
De{-}Xuan Ji and
Xiang{-}Min Yang and
Chia{-}Chun Lin and
Chun{-}Yao Wang},
title = {LOOPLock: Logic Optimization-Based Cyclic Logic Locking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2178--2191},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960351},
doi = {10.1109/TCAD.2019.2960351},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChiangCJYLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChoiCWC20,
author = {Young{-}kyu Choi and
Yuze Chi and
Jie Wang and
Jason Cong},
title = {{FLASH:} Fast, Parallel, and Accurate Simulator for {HLS}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4828--4841},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2970597},
doi = {10.1109/TCAD.2020.2970597},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChoiCWC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChongalaGGKMSKN20,
author = {S. R. Swamy Saranam Chongala and
Sumitha George and
Hariram Thirucherai Govindarajan and
Jagadish Kotra and
Madhu Mutyam and
John Sampson and
Mahmut T. Kandemir and
Vijaykrishnan Narayanan},
title = {Optimization of Intercache Traffic Entanglement in Tagless Caches
With Tiling Opportunities},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3881--3892},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012789},
doi = {10.1109/TCAD.2020.3012789},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChongalaGGKMSKN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChuSXWM20,
author = {Zhufei Chu and
Mathias Soeken and
Yinshui Xia and
Lun{-}Yao Wang and
Giovanni De Micheli},
title = {Advanced Functional Decomposition Using Majority and Its Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1621--1634},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925392},
doi = {10.1109/TCAD.2019.2925392},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChuSXWM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CiesielskiSYY20,
author = {Maciej J. Ciesielski and
Tiankai Su and
Atif Yasin and
Cunxi Yu},
title = {Understanding Algebraic Rewriting for Arithmetic Circuit Verification:
{A} Bit-Flow Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1346--1357},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912944},
doi = {10.1109/TCAD.2019.2912944},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CiesielskiSYY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CleeffHSW20,
author = {Pascal Van Cleeff and
Stefan Hougardy and
Jannik Silvanus and
Tobias Werner},
title = {BonnCell: Automatic Cell Layout in the 7-nm Era},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2872--2885},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962782},
doi = {10.1109/TCAD.2019.2962782},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CleeffHSW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CoramMGK20,
author = {Geoffrey J. Coram and
Colin C. McAndrew and
Kiran K. Gullapalli and
Kenneth S. Kundert},
title = {Flicker Noise Formulations in Compact Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2812--2821},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966444},
doi = {10.1109/TCAD.2020.2966444},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CoramMGK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CordeiroGLAKT20,
author = {Renato Cordeiro and
Dhruv Gajaria and
Ankur Limaye and
Tosiron Adegbija and
Nima Karimian and
Fatemeh Tehranipoor},
title = {ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3373--3384},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012169},
doi = {10.1109/TCAD.2020.3012169},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CordeiroGLAKT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CoskunEJKMNS20,
author = {Ayse K. Coskun and
Furkan Eris and
Ajay Joshi and
Andrew B. Kahng and
Yenai Ma and
Aditya Narayan and
Vaishnav Srinivas},
title = {Cross-Layer Co-Optimization of Network Design and Chiplet Placement
in 2.5-D Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5183--5196},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2970019},
doi = {10.1109/TCAD.2020.2970019},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CoskunEJKMNS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/tcad/Cui020,
author = {Chunfeng Cui and
Zheng Zhang},
title = {High-Dimensional Uncertainty Quantification of Electronic and Photonic
{IC} With Non-Gaussian Correlated Process Variations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1649--1661},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925340},
doi = {10.1109/TCAD.2019.2925340},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Cui020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/tcad/CuiCLZWH20,
author = {Yangguang Cui and
Kun Cao and
Liying Li and
Junlong Zhou and
Tongquan Wei and
Shiyan Hu},
title = {Augmented Cross-Entropy-Based Joint Temperature Optimization of Real-Time
3-D MPSoC Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {1987--1999},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2939328},
doi = {10.1109/TCAD.2019.2939328},
timestamp = {Thu, 17 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/CuiCLZWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CuiLQL20,
author = {Aijiao Cui and
Mengyang Li and
Gang Qu and
Huawei Li},
title = {A Guaranteed Secure Scan Design Based on Test Data Obfuscation by
Cryptographic Hash},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4524--4536},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2979458},
doi = {10.1109/TCAD.2020.2979458},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CuiLQL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CuiLZ20,
author = {Chunfeng Cui and
Kaikai Liu and
Zheng Zhang},
title = {Chance-Constrained and Yield-Aware Optimization of Photonic ICs With
Non-Gaussian Correlated Process Variations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4958--4970},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968582},
doi = {10.1109/TCAD.2020.2968582},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CuiLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DeBGJ20,
author = {Asmit De and
Aditya Basu and
Swaroop Ghosh and
Trent Jaeger},
title = {Hardware Assisted Buffer Protection Mechanisms for Embedded {RISC-V}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4453--4465},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2984407},
doi = {10.1109/TCAD.2020.2984407},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DeBGJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DemirCO20,
author = {H. Seckin Demir and
Jennifer Blain Christen and
Sule Ozev},
title = {Energy-Efficient Image Recognition System for Marine Life},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3458--3466},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012745},
doi = {10.1109/TCAD.2020.3012745},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DemirCO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DengSZ20,
author = {Jianing Deng and
Zhiguo Shi and
Cheng Zhuo},
title = {Energy-Efficient Real-Time {UAV} Object Detection on Embedded Platforms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3123--3127},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2957724},
doi = {10.1109/TCAD.2019.2957724},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DengSZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DengWG20,
author = {Ding Deng and
Yaohua Wang and
Yang Guo},
title = {Novel Design Strategy Toward {A2} Trojan Detection Based on Built-In
Acceleration Structure},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4496--4509},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977069},
doi = {10.1109/TCAD.2020.2977069},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DengWG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DengXLWCHMLPL20,
author = {Lei Deng and
Yuan Xie and
Ling Liang and
Guanrui Wang and
Liang Chang and
Xing Hu and
Xin Ma and
Liu Liu and
Jing Pei and
Guoqi Li},
title = {SemiMap: {A} Semi-Folded Convolution Mapping for Speed-Overhead Balance
on Crossbars},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {117--130},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883959},
doi = {10.1109/TCAD.2018.2883959},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DengXLWCHMLPL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DengZZZZY20,
author = {Quan Deng and
Youtao Zhang and
Zhenyu Zhao and
Shuzheng Zhang and
Minxuan Zhang and
Jun Yang},
title = {{FRF:} Toward Warp-Scheduler Friendly {STT-RAM/SRAM} Fine-Grained
Hybrid {GPGPU} Register File Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2396--2409},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2946808},
doi = {10.1109/TCAD.2019.2946808},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DengZZZZY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DerrienMRY20,
author = {Steven Derrien and
Thibaut Marty and
Simon Rokicki and
Tomofumi Yuki},
title = {Toward Speculative Loop Pipelining for High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4229--4239},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012866},
doi = {10.1109/TCAD.2020.3012866},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DerrienMRY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DewanK20,
author = {Monzurul Islam Dewan and
Dae Hyun Kim},
title = {NP-Separate: {A} New {VLSI} Design Methodology for Area, Power, and
Performance Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5111--5122},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966551},
doi = {10.1109/TCAD.2020.2966551},
timestamp = {Tue, 29 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DewanK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DeyatiMC20,
author = {Sabyasachi Deyati and
Barry J. Muldrey and
Abhijit Chatterjee},
title = {Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized
Models Extracted From Hardware},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2006--2019},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2948902},
doi = {10.1109/TCAD.2019.2948902},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DeyatiMC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DingBHG20,
author = {Ye X. Ding and
Florin Burcea and
Husni M. Habal and
Helmut E. Graeb},
title = {{PASTEL:} Parasitic Matching-Driven Placement and Routing of Capacitor
Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1372--1385},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912921},
doi = {10.1109/TCAD.2019.2912921},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DingBHG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DingY20,
author = {Jingwen Ding and
Shigeru Yamashita},
title = {Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in
2-D Architecture and Its Application to Large-Scale Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1045--1058},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907919},
doi = {10.1109/TCAD.2019.2907919},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DingY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DoiYH20,
author = {Ryutaro Doi and
Jaehoon Yu and
Masanori Hashimoto},
title = {Sneak Path Free Reconfiguration With Minimized Programming Steps for
Via-Switch Crossbar-Based {FPGA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2572--2587},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960331},
doi = {10.1109/TCAD.2019.2960331},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DoiYH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DuraiRM20,
author = {Suresh Durai and
Srinivasan Raj and
Anbarasu Manivannan},
title = {Impact of Thermal Boundary Resistance on the Performance and Scaling
of Phase-Change Memory Device},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1834--1840},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927502},
doi = {10.1109/TCAD.2019.2927502},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DuraiRM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EbrahimiN20,
author = {Mohammad Ebrahimi and
Zainalabedin Navabi},
title = {Selecting Representative Critical Paths for Sensor Placement Provides
Early {FPGA} Aging Information},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2976--2989},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2953174},
doi = {10.1109/TCAD.2019.2953174},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EbrahimiN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EddelandCSRMA20,
author = {Johan Lid{\'{e}}n Eddeland and
Koen Claessen and
Nicholas Smallbone and
Zahra Ramezani and
Sajed Miremadi and
Knut {\AA}kesson},
title = {Enhancing Temporal Logic Falsification With Specification Transformation
and Valued Booleans},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5247--5260},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966480},
doi = {10.1109/TCAD.2020.2966480},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/EddelandCSRMA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/El-AshryKISAE20,
author = {Sameh El{-}Ashry and
Mostafa Khamis and
Hala Ibrahim and
Ahmed Shalaby and
Mohamed Abdelsalam and
M. Watheq El{-}Kharashi},
title = {On Error Injection for NoC Platforms: {A} UVM-Based Generic Verification
Environment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1137--1150},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2908921},
doi = {10.1109/TCAD.2019.2908921},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/El-AshryKISAE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EslahiAMK20,
author = {Hossein Eslahi and
Sayed Ali Albahrani and
Dhawal Mahajan and
Sourabh Khandelwal},
title = {An Analytical Model for Hot Carrier Induced Long-Term Degradation
in Power Amplifiers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2000--2005},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2952554},
doi = {10.1109/TCAD.2019.2952554},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EslahiAMK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FangZCF20,
author = {Guan{-}Qi Fang and
Yong Zhong and
Yi{-}Hao Cheng and
Shao{-}Yun Fang},
title = {Obstacle-Avoiding Open-Net Connector With Precise Shortest Distance
Estimation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1096--1108},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907901},
doi = {10.1109/TCAD.2019.2907901},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FangZCF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FatemiKLG20,
author = {Hamed Fatemi and
Andrew B. Kahng and
Hyein Lee and
Jos{\'{e}} Pineda de Gyvez},
title = {Heuristic Methods for Fine-Grain Exploitation of {FDSOI}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2860--2871},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935053},
doi = {10.1109/TCAD.2019.2935053},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FatemiKLG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FelzmannFW20,
author = {Isa{\'{\i}}as B. Felzmann and
Jo{\~{a}}o Fabr{\'{\i}}cio Filho and
Lucas Francisco Wanner},
title = {Risk-5: Controlled Approximations for {RISC-V}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4052--4063},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012312},
doi = {10.1109/TCAD.2020.3012312},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FelzmannFW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Feng20,
author = {Zhuo Feng},
title = {{GRASS:} Graph Spectral Sparsification Leveraging Scalable Spectral
Perturbation Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4944--4957},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968543},
doi = {10.1109/TCAD.2020.2968543},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Feng20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FengFTLL20,
author = {Yazhi Feng and
Dan Feng and
Wei Tong and
Jingning Liu and
Shuai Li},
title = {Multiple Subpage Writing {FTL} in {MLC} by Exploiting Dual Mode Operations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {599--612},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890689},
doi = {10.1109/TCAD.2018.2890689},
timestamp = {Wed, 20 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/FengFTLL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FengXHTLLC20,
author = {Dan Feng and
Jie Xu and
Yu Hua and
Wei Tong and
Jingning Liu and
Chunyan Li and
Yiran Chen},
title = {A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile
Memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2516--2529},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962127},
doi = {10.1109/TCAD.2019.2962127},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FengXHTLLC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FerrettiKAGCP20,
author = {Lorenzo Ferretti and
Jihye Kwon and
Giovanni Ansaloni and
Giuseppe Di Guglielmo and
Luca P. Carloni and
Laura Pozzi},
title = {Leveraging Prior Knowledge for Effective Design-Space Exploration
in High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3736--3747},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012750},
doi = {10.1109/TCAD.2020.3012750},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FerrettiKAGCP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FettesKBLS20,
author = {Quintin Fettes and
Avinash Karanth and
Razvan C. Bunescu and
Ahmed Louri and
Kyle Shiflett},
title = {Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via
Reinforcement Learning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3638--3649},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012650},
doi = {10.1109/TCAD.2020.3012650},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FettesKBLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FinkGHHW20,
author = {Gerold Fink and
Andreas Grimmer and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Robustness Analysis for Droplet-Based Microfluidic Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2696--2707},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962777},
doi = {10.1109/TCAD.2019.2962777},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FinkGHHW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FuggerNNS20,
author = {Matthias F{\"{u}}gger and
Robert Najvirt and
Thomas Nowak and
Ulrich Schmid},
title = {A Faithful Binary Circuit Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2784--2797},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2937748},
doi = {10.1109/TCAD.2019.2937748},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FuggerNNS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GanfureWCS20,
author = {Gaddisa Olani Ganfure and
Chun{-}Feng Wu and
Yuan{-}Hao Chang and
Wei{-}Kuan Shih},
title = {DeepPrefetcher: {A} Deep Learning Framework for Data Prefetching in
Flash Storage Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3311--3322},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012173},
doi = {10.1109/TCAD.2020.3012173},
timestamp = {Thu, 07 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GanfureWCS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoQ20,
author = {Mingze Gao and
Gang Qu},
title = {Estimate and Recompute: {A} Novel Paradigm for Approximate Computing
on Data Flow Graphs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {335--345},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889662},
doi = {10.1109/TCAD.2018.2889662},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GaoQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoRHZ20,
author = {Di Gao and
Dayane Reis and
Xiaobo Sharon Hu and
Cheng Zhuo},
title = {Eva-CiM: {A} System-Level Performance and Energy Evaluation Framework
for Computing-in-Memory Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5011--5024},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966484},
doi = {10.1109/TCAD.2020.2966484},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GaoRHZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoSLLXYZ20,
author = {Congming Gao and
Liang Shi and
Qiao Li and
Kai Liu and
Chun Jason Xue and
Jun Yang and
Youtao Zhang},
title = {Aging Capacitor Supported Cache Management Scheme for Solid-State
Drives},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2230--2239},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2949541},
doi = {10.1109/TCAD.2019.2949541},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GaoSLLXYZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoTSZZL20,
author = {Zhengqi Gao and
Jun Tao and
Yangfeng Su and
Dian Zhou and
Xuan Zeng and
Xin Li},
title = {Efficient Rare Failure Analysis Over Multiple Corners via Correlated
Bayesian Inference},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2029--2041},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2949524},
doi = {10.1109/TCAD.2019.2949524},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GaoTSZZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoTZZ20,
author = {Zhengqi Gao and
Jun Tao and
Dian Zhou and
Xuan Zeng},
title = {Efficient Parametric Yield Estimation Over Multiple Process Corners
via Bayesian Inference Based on Bernoulli Distribution},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3144--3148},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2940682},
doi = {10.1109/TCAD.2019.2940682},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GaoTZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaoXJLCJS20,
author = {Jian Gao and
Yiwen Xu and
Yu Jiang and
Zhe Liu and
Wanli Chang and
Xun Jiao and
Jiaguang Sun},
title = {EM-Fuzz: Augmented Firmware Fuzzing via Memory Checking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3420--3432},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013046},
doi = {10.1109/TCAD.2020.3013046},
timestamp = {Sat, 06 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GaoXJLCJS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GebreyohannesPL20,
author = {Fikre Tsigabu Gebreyohannes and
Jacky Porte and
Marie{-}Minerve Lou{\"{e}}rat and
Hassan Aboushady},
title = {A g\({}_{\mbox{m}}\)/I\({}_{\mbox{D}}\) Methodology Based Data-Driven
Search Algorithm for the Design of Multistage Multipath Feed-Forward-Compensated
Amplifiers Targeting High Speed Continuous-Time {\(\Sigma\)}{\(\Delta\)}-Modulators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4311--4324},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966998},
doi = {10.1109/TCAD.2020.2966998},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GebreyohannesPL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GengZYMMY20,
author = {Hao Geng and
Wei Zhong and
Haoyu Yang and
Yuzhe Ma and
Joydeep Mitra and
Bei Yu},
title = {{SRAF} Insertion via Supervised Dictionary Learning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2849--2859},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2943568},
doi = {10.1109/TCAD.2019.2943568},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GengZYMMY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GiovanniMDMQBRB20,
author = {Elisabetta De Giovanni and
Fabio Montagna and
Beno{\^{\i}}t W. Denkinger and
Simone Machetti and
Miguel Pe{\'{o}}n Quir{\'{o}}s and
Simone Benatti and
Davide Rossi and
Luca Benini and
David Atienza},
title = {Modular Design and Optimization of Biomedical Applications for Ultralow
Power Heterogeneous Platforms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3821--3832},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012652},
doi = {10.1109/TCAD.2020.3012652},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GiovanniMDMQBRB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Gnanasambandapillai20,
author = {Vikkitharan Gnanasambandapillai and
Jorgen Peddersen and
Roshan G. Ragel and
Sri Parameswaran},
title = {{FINDER:} Find Efficient Parallel Instructions for ASIPs to Improve
Performance of Large Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3577--3588},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012211},
doi = {10.1109/TCAD.2020.3012211},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Gnanasambandapillai20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GolanbariKET20,
author = {Mohammad Saber Golanbari and
Saman Kiamehr and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Selective Flip-Flop Optimization for Reliable Digital Circuit Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1484--1497},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917848},
doi = {10.1109/TCAD.2019.2917848},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GolanbariKET20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GoliSD20,
author = {Mehran Goli and
Jannis Stoppe and
Rolf Drechsler},
title = {Automated Nonintrusive Analysis of Electronic System Level Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {492--505},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889665},
doi = {10.1109/TCAD.2018.2889665},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GoliSD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GonzalezN20,
author = {Yilian Ribot Gonz{\'{a}}lez and
Geoffrey Nelissen},
title = {HopliteRT*: Real-Time NoC for {FPGA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3650--3661},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012748},
doi = {10.1109/TCAD.2020.3012748},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GonzalezN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrimmerHW20,
author = {Andreas Grimmer and
Werner Haselmayr and
Robert Wille},
title = {Automatic Droplet Sequence Generation for Microfluidic Networks With
Passive Droplet Routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {387--396},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887055},
doi = {10.1109/TCAD.2018.2887055},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrimmerHW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GunzelBC20,
author = {Mario G{\"{u}}nzel and
Georg von der Br{\"{u}}ggen and
Jian{-}Jia Chen},
title = {Suspension-Aware Earliest-Deadline-First Scheduling Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4205--4216},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013095},
doi = {10.1109/TCAD.2020.3013095},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GunzelBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GuoHZ20,
author = {Yuncheng Guo and
Yu Hua and
Pengfei Zuo},
title = {A Latency-Optimized and Energy-Efficient Write Scheme in NVM-Based
Main Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {62--74},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883981},
doi = {10.1109/TCAD.2018.2883981},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GuoHZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GuoTPLY20,
author = {Zhipeng Guo and
Ming Tang and
Emmanuel Prouff and
Maixing Luo and
Fei Yan},
title = {Table Recomputation-Based Higher-Order Masking Against Horizontal
Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {34--44},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883900},
doi = {10.1109/TCAD.2018.2883900},
timestamp = {Fri, 13 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GuoTPLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GuoZW20,
author = {Daifeng Guo and
Hongbo Zhang and
Martin D. F. Wong},
title = {On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning
and {DSA} Lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1205--1216},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915326},
doi = {10.1109/TCAD.2019.2915326},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GuoZW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HaaswijkSMM20,
author = {Winston Haaswijk and
Mathias Soeken and
Alan Mishchenko and
Giovanni De Micheli},
title = {SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {871--884},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897703},
doi = {10.1109/TCAD.2019.2897703},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HaaswijkSMM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HanCQR20,
author = {Xueyu Han and
Jiajia Chen and
Boyu Qin and
Susanto Rahardja},
title = {A Novel Area-Power Efficient Design for Approximated Small-Point {FFT}
Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4816--4827},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2978839},
doi = {10.1109/TCAD.2020.2978839},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/HanCQR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HanKL20,
author = {Kwangsoo Han and
Andrew B. Kahng and
Jiajia Li},
title = {Optimal Generalized H-Tree Topology and Buffering for High-Performance
and Low-Power Clock Distribution},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {478--491},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889756},
doi = {10.1109/TCAD.2018.2889756},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HanKL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HosseinabadyN20,
author = {Mohammad Hosseinabady and
Jos{\'{e}} Luis N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {A Streaming Dataflow Engine for Sparse Matrix-Vector Multiplication
Using High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1272--1285},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912923},
doi = {10.1109/TCAD.2019.2912923},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HosseinabadyN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HsiehHCCKYS20,
author = {Yun{-}Shan Hsieh and
Po{-}Chun Huang and
Ping{-}Xiang Chen and
Yuan{-}Hao Chang and
Wang Kang and
Ming{-}Chang Yang and
Wei{-}Kuan Shih},
title = {Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4115--4128},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012880},
doi = {10.1109/TCAD.2020.3012880},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiehHCCKYS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuDZWC20,
author = {Ming Hu and
Wenxue Duan and
Min Zhang and
Tongquan Wei and
Mingsong Chen},
title = {Quantitative Timing Analysis for Cyber-Physical Systems Using Uncertainty-Aware
Scenario-Based Specifications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4006--4017},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012843},
doi = {10.1109/TCAD.2020.3012843},
timestamp = {Thu, 05 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuDZWC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangCL20,
author = {Po{-}Hao Huang and
Ya{-}Shu Chen and
Jian{-}He Liao},
title = {QT-Adaptation Engine: Adaptive QoS-Aware Scheduling and Governing
in Thermally Constrained Mobile Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {585--598},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897697},
doi = {10.1109/TCAD.2019.2897697},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangFCLZ20,
author = {Chao Huang and
Jiameng Fan and
Xin Chen and
Wenchao Li and
Qi Zhu},
title = {Divide and Slide: Layer-Wise Refinement for Output Range Analysis
of Deep Neural Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3323--3335},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013071},
doi = {10.1109/TCAD.2020.3013071},
timestamp = {Wed, 01 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/HuangFCLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangHCG20,
author = {Xing Huang and
Tsung{-}Yi Ho and
Krishnendu Chakrabarty and
Wenzhong Guo},
title = {Timing-Driven Flow-Channel Network Construction for Continuous-Flow
Microfluidic Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1314--1327},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912936},
doi = {10.1109/TCAD.2019.2912936},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangHCG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangLJJC20,
author = {Jing Huang and
Renfa Li and
Xun Jiao and
Yu Jiang and
Wanli Chang},
title = {Dynamic {DAG} Scheduling on Multiprocessor Systems: Reliability, Energy,
and Makespan},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3336--3347},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013045},
doi = {10.1109/TCAD.2020.3013045},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/HuangLJJC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangMRTW20,
author = {Yu Huang and
Sylwester Milewski and
Janusz Rajski and
Jerzy Tyszer and
Chen Wang},
title = {Low Cost Hypercompression of Test Data},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2964--2975},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2945760},
doi = {10.1109/TCAD.2019.2945760},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HuangMRTW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HurRABEPK20,
author = {Rotem Ben Hur and
Ronny Ronen and
Ameer Haj Ali and
Debjyoti Bhattacharjee and
Adi Eliahu and
Natan Peled and
Shahar Kvatinsky},
title = {{SIMPLER} {MAGIC:} Synthesis and Mapping of In-Memory Logic Executed
in a Single Row to Improve Throughput},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2434--2447},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2931188},
doi = {10.1109/TCAD.2019.2931188},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HurRABEPK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Ibrahim20,
author = {Atef Ibrahim},
title = {Unified and Scalable Digit-Serial Systolic Array for Multiplication
and Division Over {GF} (2m)},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1546--1549},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917843},
doi = {10.1109/TCAD.2019.2917843},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Ibrahim20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ImaniBDRSRR20,
author = {Mohsen Imani and
Samuel Bosch and
Sohum Datta and
Sharadhi Ramakrishna and
Sahand Salamat and
Jan M. Rabaey and
Tajana Rosing},
title = {QuantHD: {A} Quantization Framework for Hyperdimensional Computing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2268--2278},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2954472},
doi = {10.1109/TCAD.2019.2954472},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ImaniBDRSRR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ImaniYMGNHR20,
author = {Mohsen Imani and
Xunzhao Yin and
John Messerly and
Saransh Gupta and
Michael T. Niemier and
Xiaobo Sharon Hu and
Tajana Rosing},
title = {SearcHD: {A} Memory-Centric Hyperdimensional Computing With Stochastic
Training},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2422--2433},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2952544},
doi = {10.1109/TCAD.2019.2952544},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ImaniYMGNHR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JangDVNGI20,
author = {Jae{-}Won Jang and
Asmit De and
Deepak Vontela and
Ithihasa Reddy Nirmala and
Swaroop Ghosh and
Anirudh Iyengar},
title = {Threshold-Defined Logic and Interconnect for Protection Against Reverse
Engineering},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {308--320},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887056},
doi = {10.1109/TCAD.2018.2887056},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JangDVNGI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JeonKAC20,
author = {Seunghyeok Jeon and
Jiwon Kim and
Junick Ahn and
Hojung Cha},
title = {Optimizing Discharge Efficiency of Reconfigurable Battery With Deep
Reinforcement Learning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3893--3905},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012230},
doi = {10.1109/TCAD.2020.3012230},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/JeonKAC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiHWY20,
author = {Weiqing Ji and
Tsung{-}Yi Ho and
Junchao Wang and
Hailong Yao},
title = {Microfluidic Design for Concentration Gradient Generation Using Artificial
Neural Network},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2544--2557},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944588},
doi = {10.1109/TCAD.2019.2944588},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JiHWY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiaYDLCZ20,
author = {Xiaotao Jia and
Jianlei Yang and
Pengcheng Dai and
Runze Liu and
Yiran Chen and
Weisheng Zhao},
title = {{SPINBIS:} Spintronics-Based Bayesian Inference System With Stochastic
Computing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {789--802},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897631},
doi = {10.1109/TCAD.2019.2897631},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JiaYDLCZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiangGLW20,
author = {Xu Jiang and
Nan Guan and
Xiang Long and
Han Wan},
title = {Decomposition-Based Real-Time Scheduling of Parallel Tasks on Multicores
Platforms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2319--2332},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2937820},
doi = {10.1109/TCAD.2019.2937820},
timestamp = {Mon, 23 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/JiangGLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiangSSWX20,
author = {Jiaqing Jiang and
Xiaoming Sun and
Yuan Sun and
Kewen Wu and
Zhiyu Xia},
title = {Structured Decomposition for Reversible Boolean Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2410--2421},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2928974},
doi = {10.1109/TCAD.2019.2928974},
timestamp = {Wed, 26 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JiangSSWX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiangYDHS20,
author = {Weiwen Jiang and
Lei Yang and
Sakyasingha Dasgupta and
Jingtong Hu and
Yiyu Shi},
title = {Standing on the Shoulders of Giants: Hardware and Neural Architecture
Co-Search With Hot Start},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4154--4165},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012863},
doi = {10.1109/TCAD.2020.3012863},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/JiangYDHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiangYSZGDSH20,
author = {Weiwen Jiang and
Lei Yang and
Edwin Hsing{-}Mean Sha and
Qingfeng Zhuge and
Shouzhen Gu and
Sakyasingha Dasgupta and
Yiyu Shi and
Jingtong Hu},
title = {Hardware/Software Co-Exploration of Neural Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4805--4815},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2986127},
doi = {10.1109/TCAD.2020.2986127},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/JiangYSZGDSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JiaoMCJ20,
author = {Xun Jiao and
Dongning Ma and
Wanli Chang and
Yu Jiang},
title = {{LEVAX:} An Input-Aware Learning-Based Error Model of Voltage-Scaled
Functional Units},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5032--5041},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2983127},
doi = {10.1109/TCAD.2020.2983127},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/JiaoMCJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JinCLLGZ20,
author = {Hai Jin and
Di Chen and
Haikun Liu and
Xiaofei Liao and
Rentong Guo and
Yu Zhang},
title = {Miss Penalty Aware Cache Replacement for Hybrid Memory Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4669--4682},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966482},
doi = {10.1109/TCAD.2020.2966482},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JinCLLGZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JinZCG20,
author = {Shi Jin and
Zhaobo Zhang and
Krishnendu Chakrabarty and
Xinli Gu},
title = {Hierarchical Symbol-Based Health-Status Analysis Using Time-Series
Data in a Core Router System},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {700--713},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890681},
doi = {10.1109/TCAD.2018.2890681},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JinZCG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JinZCG20a,
author = {Shi Jin and
Zhaobo Zhang and
Krishnendu Chakrabarty and
Xinli Gu},
title = {Self-Learning and Efficient Health-Status Analysis for a Core Router
System},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1935--1948},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926506},
doi = {10.1109/TCAD.2019.2926506},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JinZCG20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JindalGRPS20,
author = {Neetu Jindal and
Shubhani Gupta and
Divya Praneetha Ravipati and
Preeti Ranjan Panda and
Smruti R. Sarangi},
title = {Enhancing Network-on-Chip Performance by Reusing Trace Buffers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {922--935},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907909},
doi = {10.1109/TCAD.2019.2907909},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JindalGRPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JoshiRLBSSZ20,
author = {Prachi Joshi and
S. S. Ravi and
Qingyu Liu and
Unmesh D. Bordoloi and
Soheil Samii and
Sandeep Kumar Shukla and
Haibo Zeng},
title = {Approaches for Assigning Offsets to Signals for Improving Frame Packing
in {CAN-FD}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1109--1122},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907921},
doi = {10.1109/TCAD.2019.2907921},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JoshiRLBSSZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JungCKSYK20,
author = {Myoungsoo Jung and
Wonil Choi and
Miryeong Kwon and
Shekhar Srikantaiah and
Joonhyuk Yoo and
Mahmut Taylan Kandemir},
title = {Design of a Host Interface Logic for GC-Free SSDs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1674--1687},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2919035},
doi = {10.1109/TCAD.2019.2919035},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JungCKSYK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JuretusS20,
author = {Kyle Juretus and
Ioannis Savidis},
title = {Characterization of In-Cone Logic Locking Resiliency Against the {SAT}
Attack},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1607--1620},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925387},
doi = {10.1109/TCAD.2019.2925387},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JuretusS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KangMLCH20,
author = {Chih{-}Kai Kang and
Hashan Roshantha Mendis and
Chun{-}Han Lin and
Ming{-}Syan Chen and
Pi{-}Cheng Hsiu},
title = {Everything Leaves Footprints: Hardware Accelerated Intermittent Deep
Inference},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3479--3491},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012217},
doi = {10.1109/TCAD.2020.3012217},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KangMLCH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KangWCKH20,
author = {Yao{-}Wen Kang and
Chun{-}Feng Wu and
Yuan{-}Hao Chang and
Tei{-}Wei Kuo and
Shu{-}Yin Ho},
title = {On Minimizing Analog Variation Errors to Resolve the Scalability Issue
of ReRAM-Based Crossbar Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3856--3867},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012250},
doi = {10.1109/TCAD.2020.3012250},
timestamp = {Tue, 05 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KangWCKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KangY20,
author = {Won{-}Kyung Kang and
Sungjoo Yoo},
title = {{\textdollar}Q{\textdollar} -Value Prediction for Reinforcement Learning
Assisted Garbage Collection to Reduce Long Tail Latency in {SSD}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2240--2253},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962781},
doi = {10.1109/TCAD.2019.2962781},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KangY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KaplanSRC20,
author = {Fulya Kaplan and
Mostafa Said and
Sherief Reda and
Ayse K. Coskun},
title = {LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {895--908},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2902355},
doi = {10.1109/TCAD.2019.2902355},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KaplanSRC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KesslerLK20,
author = {Christoph W. Kessler and
Sebastian Litzinger and
J{\"{o}}rg Keller},
title = {Static Scheduling of Moldable Streaming Tasks With Task Fusion for
Parallel Systems With {DVFS}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4166--4178},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013054},
doi = {10.1109/TCAD.2020.3013054},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KesslerLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KhalidHZHAS20,
author = {Faiq Khalid and
Syed Rafay Hasan and
Sara Zia and
Osman Hasan and
Falah Awwad and
Muhammad Shafique},
title = {MacLeR: Machine Learning-Based Runtime Hardware Trojan Detection in
Resource-Constrained IoT Edge Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3748--3761},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012236},
doi = {10.1109/TCAD.2020.3012236},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KhalidHZHAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KhanMGHC20,
author = {Asif Ali Khan and
Hauke Mewes and
Tobias Grosser and
Torsten Hoefler and
Jer{\'{o}}nimo Castrill{\'{o}}n},
title = {Polyhedral Compilation for Racetrack Memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3968--3980},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012266},
doi = {10.1109/TCAD.2020.3012266},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KhanMGHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimBCAC20,
author = {Jiwon Kim and
Sungwoo Baek and
Yonghun Choi and
Junick Ahn and
Hojung Cha},
title = {Hydrone: Reconfigurable Energy Storage for {UAV} Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3686--3697},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013052},
doi = {10.1109/TCAD.2020.3013052},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KimBCAC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimCJKC20,
author = {Jiwon Kim and
Yonghun Choi and
Seunghyeok Jeon and
Jaeyun Kang and
Hojung Cha},
title = {Optrone: Maximizing Performance and Energy Resources of Drone Batteries},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3931--3943},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012790},
doi = {10.1109/TCAD.2020.3012790},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KimCJKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimDLK20,
author = {Daeyeon Kim and
SangGi Do and
Sung{-}Yun Lee and
Seokhyeong Kang},
title = {Compact Topology-Aware Bus Routing for Design Regularity},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1744--1749},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926484},
doi = {10.1109/TCAD.2019.2926484},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KimDLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimKH20,
author = {Min Su Kim and
Yong Wook Kim and
Tae Hee Han},
title = {System-Level Signal Analysis Methodology for Optical Network-on-Chip
Using Linear Model-Based Characterization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2761--2771},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2945709},
doi = {10.1109/TCAD.2019.2945709},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KimKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KoleHDWS20,
author = {Abhoy Kole and
Stefan Hillmich and
Kamalika Datta and
Robert Wille and
Indranil Sengupta},
title = {Improved Mapping of Quantum Circuits to {IBM} {QX} Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2375--2383},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962753},
doi = {10.1109/TCAD.2019.2962753},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KoleHDWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KoneruC20,
author = {Abhishek Koneru and
Krishnendu Chakrabarty},
title = {An Interlayer Interconnect {BIST} and Diagnosis Solution for Monolithic
3-D ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3056--3066},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935410},
doi = {10.1109/TCAD.2019.2935410},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KoneruC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KongZZCC20,
author = {Yachen Kong and
Meng Zhang and
Xuepeng Zhan and
Rui Cao and
Jiezhi Chen},
title = {Retention Correlated Read Disturb Errors in 3-D Charge Trap {NAND}
Flash Memory: Observations, Analysis, and Solutions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4042--4051},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3025514},
doi = {10.1109/TCAD.2020.3025514},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KongZZCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Kouhpayeh-Zadeh-Esfahani20,
author = {Sedigheh Kouhpayeh{-}Zadeh{-}Esfahani and
Abdolali Abdipour and
Kambiz Afrooz},
title = {Fast Methodology for Time-Domain Analysis of Nonlinear-Loaded Transmission
Line Excited by an Arbitrary Modulated Signal},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {670--674},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890529},
doi = {10.1109/TCAD.2018.2890529},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Kouhpayeh-Zadeh-Esfahani20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KrishnakumarAGM20,
author = {Anish Krishnakumar and
Samet E. Arda and
A. Alper Goksoy and
Sumit K. Mandal and
{\"{U}}mit Y. Ogras and
Anderson L. Sartor and
Radu Marculescu},
title = {Runtime Task Scheduling Using Imitation Learning for Heterogeneous
Many-Core Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4064--4077},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012861},
doi = {10.1109/TCAD.2020.3012861},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KrishnakumarAGM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KristienSCSSFBT20,
author = {Martin Kristien and
Tom Spink and
Brian Campbell and
Susmit Sarkar and
Ian Stark and
Bj{\"{o}}rn Franke and
Igor B{\"{o}}hm and
Nigel P. Topham},
title = {Fast and Correct Load-Link/Store-Conditional Instruction Handling
in {DBT} Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3544--3554},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013048},
doi = {10.1109/TCAD.2020.3013048},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KristienSCSSFBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KrithivasanSR20,
author = {Sarada Krithivasan and
Sanchari Sen and
Anand Raghunathan},
title = {Sparsity Turns Adversarial: Energy and Latency Attacks on Deep Neural
Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4129--4141},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013077},
doi = {10.1109/TCAD.2020.3013077},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KrithivasanSR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KuCL20,
author = {Bon Woong Ku and
Kyungwook Chang and
Sung Kyu Lim},
title = {Compact-2D: {A} Physical Design Methodology to Build Two-Tier Gate-Level
3-D ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1151--1164},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2952542},
doi = {10.1109/TCAD.2019.2952542},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KuCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KuanA20,
author = {Kyle Kuan and
Tosiron Adegbija},
title = {Energy-Efficient Runtime Adaptable {L1} {STT-RAM} Cache Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1328--1339},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912920},
doi = {10.1109/TCAD.2019.2912920},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KuanA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KukkalaTP20,
author = {Vipin Kumar Kukkala and
Sooryaa Vignesh Thiruloga and
Sudeep Pasricha},
title = {{INDRA:} Intrusion Detection Using Recurrent Autoencoders in Automotive
Embedded Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3698--3710},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012749},
doi = {10.1109/TCAD.2020.3012749},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KukkalaTP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KumarBFS20,
author = {Binod Kumar and
Kanad Basu and
Masahiro Fujita and
Virendra Singh},
title = {Post-Silicon Gate-Level Error Localization With Effective and Combined
Trace Signal Selection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {248--261},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883899},
doi = {10.1109/TCAD.2018.2883899},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KumarBFS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KumashiroKHK20,
author = {Shigetaka Kumashiro and
Tatsuya Kamei and
Akira Hiroki and
Kazutoshi Kobayashi},
title = {An Efficient and Accurate Time Step Control Method for Power Device
Transient Simulation Utilizing Dominant Time Constant Approximation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {451--463},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889673},
doi = {10.1109/TCAD.2018.2889673},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KumashiroKHK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KungLR20,
author = {Yi{-}Cheng Kung and
Kuen{-}Jong Lee and
Sudhakar M. Reddy},
title = {Generating Single- and Double-Pattern Tests for Multiple {CMOS} Fault
Models in One {ATPG} Run},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1340--1345},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2921345},
doi = {10.1109/TCAD.2019.2921345},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KungLR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KwonIY20,
author = {Taehyun Kwon and
Muhammad Imran and
Joon{-}Sung Yang},
title = {Pattern-Aware Encoding for {MLC} {PCM} Storage Density, Energy Efficiency,
and Performance Enhancement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1855--1865},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927510},
doi = {10.1109/TCAD.2019.2927510},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KwonIY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KwonLKK20,
author = {Hyun{-}jeong Kwon and
Sung{-}Yun Lee and
Young Hwan Kim and
Seokhyeong Kang},
title = {Additive Statistical Leakage Analysis Using Exponential Mixture Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4985--4998},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2975154},
doi = {10.1109/TCAD.2020.2975154},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KwonLKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LaiTL20,
author = {Liyang Lai and
Kun{-}Han Tsai and
Huawei Li},
title = {GPGPU-Based {ATPG} System: Myth or Reality?},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {239--247},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2884992},
doi = {10.1109/TCAD.2018.2884992},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LaiTL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LanNGZXLC20,
author = {Yazhu Lan and
Kent W. Nixon and
Qingli Guo and
Guohe Zhang and
Yuanchao Xu and
Hai Li and
Yiran Chen},
title = {{FCDM:} {A} Methodology Based on Sensor Pattern Noise Fingerprinting
for Fast Confidence Detection to Adversarial Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4791--4804},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2969982},
doi = {10.1109/TCAD.2020.2969982},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LanNGZXLC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeLLK20,
author = {Young{-}Woo Lee and
Hyeonchan Lim and
Youngkwang Lee and
Sungho Kang},
title = {Robust Secure Shield Architecture for Detection and Protection Against
Invasive Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3023--3034},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944580},
doi = {10.1109/TCAD.2019.2944580},
timestamp = {Tue, 27 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LeeLLK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeePRK20,
author = {Yongwoo Lee and
Jaehyun Park and
Junhee Ryu and
Younghyun Kim},
title = {AxFTL: Exploiting Error Tolerance for Extending Lifetime of {NAND}
Flash Storage},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3239--3249},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013070},
doi = {10.1109/TCAD.2020.3013070},
timestamp = {Mon, 19 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LeePRK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LevashenkoLZKRR20,
author = {Vitaly G. Levashenko and
Igor Lukyanchuk and
Elena Zaitseva and
Miroslav Kvassay and
Jan Rabcan and
Patrik Rusnak},
title = {Development of Programmable Logic Array for Multiple-Valued Logic
Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4854--4866},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966676},
doi = {10.1109/TCAD.2020.2966676},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LevashenkoLZKRR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiCSCM20,
author = {Jinfeng Li and
Liwei Chen and
Gang Shi and
Kai Chen and
Dan Meng},
title = {{ABCFI:} Fast and Lightweight Fine-Grained Hardware-Assisted Control-Flow
Integrity},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3165--3176},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012640},
doi = {10.1109/TCAD.2020.3012640},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiCSCM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiHGFTW20,
author = {Dalin Li and
Lan Huang and
Teng Gao and
Yang Feng and
Adriano Tavares and
Kangping Wang},
title = {An Extended Nonstrict Partially Ordered Set-Based Configurable Linear
Sorter on FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1031--1044},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977074},
doi = {10.1109/TCAD.2020.2977074},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiHGFTW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiJZL20,
author = {Huize Li and
Hai Jin and
Long Zheng and
Xiaofei Liao},
title = {ReSQM: Accelerating Database Operations Using ReRAM-Based Content
Addressable Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4030--4041},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012860},
doi = {10.1109/TCAD.2020.3012860},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiJZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiLFL20,
author = {Ziru Li and
Bing Li and
Zichen Fan and
Hai Li},
title = {{RED:} {A} ReRAM-Based Efficient Accelerator for Deconvolutional Computation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4736--4747},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981055},
doi = {10.1109/TCAD.2020.2981055},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiLFL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiLMHC20,
author = {Fanrong Li and
Gang Li and
Zitao Mo and
Xiangyu He and
Jian Cheng},
title = {{FSA:} {A} Fine-Grained Systolic Accelerator for Sparse CNNs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3589--3600},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012212},
doi = {10.1109/TCAD.2020.3012212},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiLMHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiMWLXF20,
author = {Guangli Li and
Xiu Ma and
Xueying Wang and
Lei Liu and
Jingling Xue and
Xiaobing Feng},
title = {Fusion-Catalyzed Pruning for Optimizing Deep Learning on Intelligent
Edge Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3614--3626},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013050},
doi = {10.1109/TCAD.2020.3013050},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiMWLXF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiSCTL20,
author = {Jun Li and
Zhibing Sha and
Zhigang Cai and
Fran{\c{c}}ois Trahay and
Jianwei Liao},
title = {Patch-Based Data Management for Dual-Copy Buffers in RAID-Enabled
SSDs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3956--3967},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012252},
doi = {10.1109/TCAD.2020.3012252},
timestamp = {Wed, 08 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiSCTL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiSLX20,
author = {Changlong Li and
Liang Shi and
Yu Liang and
Chun Jason Xue},
title = {{SEAL:} User Experience-Aware Two-Level Swap for Mobile Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4102--4114},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012316},
doi = {10.1109/TCAD.2020.3012316},
timestamp = {Fri, 24 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiSLX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiWDZGSG20,
author = {Zonghui Li and
Hai Wan and
Yangdong Deng and
Xibin Zhao and
Yue Gao and
Xiaoyu Song and
Ming Gu},
title = {Time-Triggered Switch-Memory-Switch Architecture for Time-Sensitive
Networking Switches},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {185--198},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883996},
doi = {10.1109/TCAD.2018.2883996},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiWDZGSG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiWDZGSG20a,
author = {Zonghui Li and
Hai Wan and
Yangdong Deng and
Xibin Zhao and
Yue Gao and
Xiaoyu Song and
Ming Gu},
title = {Model-Based Adaptation of Mixed-Criticality Multiservice Systems for
Extreme Physical Environments},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1386--1399},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915325},
doi = {10.1109/TCAD.2019.2915325},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiWDZGSG20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiWLZL20,
author = {Yaping Li and
Yong Wang and
Yusong Li and
Ranran Zhou and
Zhaojun Lin},
title = {An Artificial Neural Network Assisted Optimization System for Analog
Design Space Exploration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2640--2653},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2961322},
doi = {10.1109/TCAD.2019.2961322},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiWLZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiXLCSM20,
author = {Jinfeng Li and
Qizhen Xu and
Yongyue Li and
Liwei Chen and
Gang Shi and
Dan Meng},
title = {Efficient Return Address Verification Based on Dislocated Stack},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3398--3407},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012645},
doi = {10.1109/TCAD.2020.3012645},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiXLCSM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiZYZMG20,
author = {Chen Li and
Andrew Zigerelli and
Jun Yang and
Youtao Zhang and
Sheng Ma and
Yang Guo},
title = {A Dynamic and Proactive {GPU} Preemption Mechanism Using Checkpointing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {75--87},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883906},
doi = {10.1109/TCAD.2018.2883906},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiZYZMG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangCCCWS20,
author = {Yu{-}Pei Liang and
Tseng{-}Yi Chen and
Yuan{-}Hao Chang and
Shuo{-}Han Chen and
Hsin{-}Wen Wei and
Wei{-}Kuan Shih},
title = {B*-Sort: Enabling Write-Once Sorting for Nonvolatile Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4549--4562},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2979819},
doi = {10.1109/TCAD.2020.2979819},
timestamp = {Tue, 05 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiangCCCWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangCHCL20,
author = {Tung{-}Che Liang and
Yun{-}Sheng Chan and
Tsung{-}Yi Ho and
Krishnendu Chakrabarty and
Chen{-}Yi Lee},
title = {Multitarget Sample Preparation Using {MEDA} Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2682--2695},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2942002},
doi = {10.1109/TCAD.2019.2942002},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiangCHCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangLXY20,
author = {Yun Liang and
Liqiang Lu and
Qingcheng Xiao and
Shengen Yan},
title = {Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {857--870},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897701},
doi = {10.1109/TCAD.2019.2897701},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiangLXY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiangZPC20,
author = {Tung{-}Che Liang and
Zhanwei Zhong and
Miroslav Pajic and
Krishnendu Chakrabarty},
title = {Extending the Lifetime of {MEDA} Biochips by Selective Sensing on
Microelectrodes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3531--3543},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012746},
doi = {10.1109/TCAD.2020.3012746},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiangZPC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinC20,
author = {Tung{-}Liang Lin and
Sao{-}Jie Chen},
title = {A Platform of Resynthesizing a Clock Architecture Into Power-and-Area
Effective Clock Trees},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2475--2488},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2949514},
doi = {10.1109/TCAD.2019.2949514},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinCCKH20,
author = {Ing{-}Chao Lin and
Da{-}Wei Chang and
Wei{-}Jun Chen and
Jian{-}Ting Ke and
Po{-}Han Huang},
title = {Global Clean Page First Replacement and Index-Aware Multistream Prefetcher
in Hybrid Memory Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1750--1763},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925404},
doi = {10.1109/TCAD.2019.2925404},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinCCKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinK20,
author = {Sheng{-}En David Lin and
Dae Hyun Kim},
title = {Construction of All Rectilinear Steiner Minimum Trees on the Hanan
Grid and Its Applications to {VLSI} Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1165--1176},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917896},
doi = {10.1109/TCAD.2019.2917896},
timestamp = {Tue, 29 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinLCW20,
author = {Chia{-}Chun Lin and
Chin{-}Heng Liu and
Yung{-}Chih Chen and
Chun{-}Yao Wang},
title = {A New Necessary Condition for Threshold Function Identification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5304--5308},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2964768},
doi = {10.1109/TCAD.2020.2964768},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LinLCW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinLGRKP20,
author = {Yibo Lin and
Wuxi Li and
Jiaqi Gu and
Haoxing Ren and
Brucek Khailany and
David Z. Pan},
title = {ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on
Multithreaded CPUs and GPUs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5083--5096},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2971531},
doi = {10.1109/TCAD.2020.2971531},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LinLGRKP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Liu0RRT20,
author = {Yingdi Liu and
Nilanjan Mukherjee and
Janusz Rajski and
Sudhakar M. Reddy and
Jerzy Tyszer},
title = {Deterministic Stellar {BIST} for Automotive ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1699--1710},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925353},
doi = {10.1109/TCAD.2019.2925353},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Liu0RRT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuCHX20,
author = {Bosheng Liu and
Xiaoming Chen and
Yinhe Han and
Haobo Xu},
title = {Swallow: {A} Versatile Accelerator for Sparse Neural Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4881--4893},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2978836},
doi = {10.1109/TCAD.2020.2978836},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuCHX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuDBQK20,
author = {Rongyang Liu and
Jos{\'{e}} G. Delgado{-}Frias and
Doug Boyce and
Yi Qian and
Rahul Khanna},
title = {Online Firmware Functional Validation Scheme Using Colored Petri Net
Model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1532--1545},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912919},
doi = {10.1109/TCAD.2019.2912919},
timestamp = {Mon, 21 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuDBQK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuLBCHS20,
author = {Chunfeng Liu and
Bing Li and
Bhargab B. Bhattacharya and
Krishnendu Chakrabarty and
Tsung{-}Yi Ho and
Ulf Schlichtmann},
title = {Test Generation for Flow-Based Microfluidic Biochips With General
Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2530--2543},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2948904},
doi = {10.1109/TCAD.2019.2948904},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuLBCHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuLHGLZLCL20,
author = {Duo Liu and
Xingni Li and
Po{-}Chun Huang and
Yi Gu and
Yingjian Ling and
Kan Zhong and
Renping Liu and
Xianzhang Chen and
Liang Liang},
title = {Downsizing Without Downgrading: Approximated Dynamic Time Warping
on Nonvolatile Memories},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {131--144},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2878182},
doi = {10.1109/TCAD.2018.2878182},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuLHGLZLCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuLS20,
author = {Shuangnan Liu and
Francis C. M. Lau and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
title = {Predictive Compositional Method to Design and Reoptimize Complex Behavioral
Dataflows},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2615--2627},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966447},
doi = {10.1109/TCAD.2020.2966447},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiuLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuNNRO20,
author = {Weiqiang Liu and
Ziying Ni and
Jian Ni and
Ciara Rafferty and
M{\'{a}}ire O'Neill},
title = {High Performance Modular Multiplication for {SIDH}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3118--3122},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960330},
doi = {10.1109/TCAD.2019.2960330},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuNNRO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuPZLZ20,
author = {Yu Liu and
Chao Peng and
Yecheng Zhao and
Yangyang Li and
Haibo Zeng},
title = {Schedulability Analysis of Engine Control Systems With Dynamic Switching
Speeds},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2067--2080},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2951124},
doi = {10.1109/TCAD.2019.2951124},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuPZLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuZDXJS20,
author = {Jinglan Liu and
Jiaxin Zhang and
Yukun Ding and
Xiaowei Xu and
Meng Jiang and
Yiyu Shi},
title = {Binarizing Weights Wisely for Edge Intelligence: Guide for Partial
Binarization of Deconvolution-Based Generators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4748--4759},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2983370},
doi = {10.1109/TCAD.2020.2983370},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LiuZDXJS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiuZLCG20,
author = {Songran Liu and
Wei Zhang and
Mingsong Lv and
Qiulin Chen and
Nan Guan},
title = {{LATICS:} {A} Low-Overhead Adaptive Task-Based Intermittent Computing
System},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3711--3723},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012214},
doi = {10.1109/TCAD.2020.3012214},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiuZLCG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuZHWLL20,
author = {Hang Lu and
Mingzhe Zhang and
Yinhe Han and
Qi Wang and
Huawei Li and
Xiaowei Li},
title = {Architecting Effectual Computation for Machine Learning Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2654--2667},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2946810},
doi = {10.1109/TCAD.2019.2946810},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LuZHWLL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuanZ20,
author = {Jiali Luan and
Zheng Zhang},
title = {Prediction of Multidimensional Spatial Variation Data via Bayesian
Tensor Completion},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {547--551},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2891987},
doi = {10.1109/TCAD.2019.2891987},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LuanZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LudwigUSK20,
author = {Tobias Ludwig and
Joakim Urdahl and
Dominik Stoffel and
Wolfgang Kunz},
title = {Properties First - Correct-By-Construction {RTL} Design in System-Level
Design Flows},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3093--3106},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2921319},
doi = {10.1109/TCAD.2019.2921319},
timestamp = {Mon, 29 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LudwigUSK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LuoWQLTWG20,
author = {Tao Luo and
Xuan Wang and
Chuping Qu and
Matthew Kay Fei Lee and
Wai Teng Tang and
Weng{-}Fai Wong and
Rick Siow Mong Goh},
title = {An FPGA-Based Hardware Emulator for Neuromorphic Chip With {RRAM}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {438--450},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889670},
doi = {10.1109/TCAD.2018.2889670},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LuoWQLTWG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaCVS20,
author = {Yufei Ma and
Yu Cao and
Sarma B. K. Vrudhula and
Jae{-}Sun Seo},
title = {Automatic Compilation of Diverse CNNs Onto High-Performance {FPGA}
Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {424--437},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2884972},
doi = {10.1109/TCAD.2018.2884972},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaCVS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaCVS20a,
author = {Yufei Ma and
Yu Cao and
Sarma B. K. Vrudhula and
Jae{-}Sun Seo},
title = {Performance Modeling for {CNN} Inference Accelerators on {FPGA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {843--856},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897634},
doi = {10.1109/TCAD.2019.2897634},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaCVS20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaLSZ20,
author = {Yehan Ma and
Chenyang Lu and
Bruno Sinopoli and
Shen Zeng},
title = {Exploring Edge Computing for Multitier Industrial Control},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3506--3518},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012648},
doi = {10.1109/TCAD.2020.3012648},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MaLSZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaWLZWWX20,
author = {Ruixiang Ma and
Fei Wu and
Zhonghai Lu and
Wenmin Zhong and
Qiulin Wu and
Jiguang Wan and
Changsheng Xie},
title = {BlockHammer: Improving Flash Reliability by Exploiting Process Variation
Aware Proactive Failure Prediction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4563--4574},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981025},
doi = {10.1109/TCAD.2020.2981025},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MaWLZWWX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaZCDWH20,
author = {Yue Ma and
Junlong Zhou and
Thidapat Chantem and
Robert P. Dick and
Shige Wang and
Xiaobo Sharon Hu},
title = {Online Resource Management for Improving Reliability of Real-Time
Systems on "Big-Little" Type MPSoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {88--100},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883990},
doi = {10.1109/TCAD.2018.2883990},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaZCDWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaZCDWH20a,
author = {Yue Ma and
Junlong Zhou and
Thidapat Chantem and
Robert P. Dick and
Shige Wang and
Xiaobo Sharon Hu},
title = {Improving Reliability of Soft Real-Time Embedded Systems on Integrated
{CPU} and {GPU} Platforms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2218--2229},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2940681},
doi = {10.1109/TCAD.2019.2940681},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaZCDWH20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaZHGKMY20,
author = {Yuzhe Ma and
Wei Zhong and
Shuxiang Hu and
Jhih{-}Rong Gao and
Jian Kuang and
Jin Miao and
Bei Yu},
title = {A Unified Framework for Simultaneous Layout Decomposition and Mask
Optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5069--5082},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981457},
doi = {10.1109/TCAD.2020.2981457},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MaZHGKMY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MachadoC20,
author = {Lucas Machado and
Jordi Cortadella},
title = {Support-Reducing Decomposition for {FPGA} Mapping},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {213--224},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2878187},
doi = {10.1109/TCAD.2018.2878187},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MachadoC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MahaleUCL20,
author = {Gopinath Mahale and
Pramod P. Udupa and
Kiran Kolar Chandrasekharan and
Sehwan Lee},
title = {WinDConv: {A} Fused Datapath {CNN} Accelerator for Power-Efficient
Edge Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4278--4289},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013096},
doi = {10.1109/TCAD.2020.3013096},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MahaleUCL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MajumdarMSZ20,
author = {Rupak Majumdar and
Kaushik Mallik and
Anne{-}Kathrin Schmuck and
Damien Zufferey},
title = {Assume-Guarantee Distributed Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3215--3226},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012641},
doi = {10.1109/TCAD.2020.3012641},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MajumdarMSZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MajumderNB20,
author = {Shibarchi Majumder and
Jens Frederik Dalsgaard Nielsen and
Thomas Bak},
title = {{\AE}r{\o}: {A} Platform Architecture for Mixed-Criticality Airborne
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2307--2318},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960359},
doi = {10.1109/TCAD.2019.2960359},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MajumderNB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaltabashiKT20,
author = {Or Maltabashi and
Yehuda Kra and
Adam Teman},
title = {Physically Aware Affinity-Driven Multiplier Implementation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2886--2897},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2931185},
doi = {10.1109/TCAD.2019.2931185},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaltabashiKT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MamourasW20,
author = {Konstantinos Mamouras and
Zhifu Wang},
title = {Online Signal Monitoring With Bounded Lag},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3868--3880},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013053},
doi = {10.1109/TCAD.2020.3013053},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MamourasW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MangirasSSND20,
author = {Dimitrios Mangiras and
Apostolos Stefanidis and
Ioannis Seitanidis and
Chrysostomos Nicopoulos and
Giorgos Dimitrakopoulos},
title = {Timing-Driven Placement Optimization Facilitated by Timing-Compatibility
Flip-Flop Clustering},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2835--2848},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2942001},
doi = {10.1109/TCAD.2019.2942001},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MangirasSSND20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Manohar20,
author = {Rajit Manohar},
title = {Exact Timing Analysis for Asynchronous Circuits With Multiple Periods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3134--3138},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2963271},
doi = {10.1109/TCAD.2019.2963271},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Manohar20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MartinsPIP20,
author = {Mayler G. A. Martins and
Samuel N. Pagliarini and
Mehmet Meric Isgenc and
Lawrence T. Pileggi},
title = {From Virtual Characterization to Test-Chips: {DFM} Analysis Through
Pattern Enumeration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {520--532},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889772},
doi = {10.1109/TCAD.2018.2889772},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MartinsPIP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MartyYD20,
author = {Thibaut Marty and
Tomofumi Yuki and
Steven Derrien},
title = {Safe Overclocking for {CNN} Accelerators Through Algorithm-Level Error
Detection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4777--4790},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981056},
doi = {10.1109/TCAD.2020.2981056},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MartyYD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MassadGT20,
author = {Mohamed El Massad and
Siddharth Garg and
Mahesh V. Tripunitara},
title = {The {SAT} Attack on {IC} Camouflaging: Impact and Potential Countermeasures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1577--1590},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926478},
doi = {10.1109/TCAD.2019.2926478},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MassadGT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MaundyEB20,
author = {Brent J. Maundy and
Ahmed S. Elwakil and
Leonid Belostotski},
title = {Automatic Generation of Differential-Input Differential-Output Second-Order
Filters Based on a Differential Pair},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1258--1271},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912933},
doi = {10.1109/TCAD.2019.2912933},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MaundyEB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MayugaSI20,
author = {Gian Mayuga and
Yasuo Sato and
Michiko Inoue},
title = {Highly Reliable Memory Architecture Using Adaptive Combination of
Proactive Aging-Aware In-Field Self-Repair and {ECC}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1688--1698},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925365},
doi = {10.1109/TCAD.2019.2925365},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MayugaSI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MirzaieR20,
author = {Nahid Mirzaie and
Ron Rohrer},
title = {A Macromodeling Approach for Analog Behavior of Digital Integrated
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5025--5031},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2994270},
doi = {10.1109/TCAD.2020.2994270},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MirzaieR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MiskellyO20,
author = {Jack Miskelly and
M{\'{a}}ire O'Neill},
title = {Fast {DRAM} PUFs on Commodity Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3566--3576},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012218},
doi = {10.1109/TCAD.2020.3012218},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MiskellyO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MohapatraM20,
author = {Satyajit Mohapatra and
Nihar Ranjan Mohapatra},
title = {Gradient Error Compensation in SC-MDACs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4359--4374},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981020},
doi = {10.1109/TCAD.2020.2981020},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MohapatraM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MonazzahRMD20,
author = {Amir Mahdi Hosseini Monazzah and
Amir M. Rahmani and
Antonio Miele and
Nikil D. Dutt},
title = {{CAST:} Content-Aware {STT-MRAM} Cache Write Management for Different
Levels of Approximation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4385--4398},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2986320},
doi = {10.1109/TCAD.2020.2986320},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MonazzahRMD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MoolchandaniKMS20,
author = {Diksha Moolchandani and
Anshul Kumar and
Jos{\'{e}} F. Mart{\'{\i}}nez and
Smruti R. Sarangi},
title = {VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous
Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4252--4265},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013076},
doi = {10.1109/TCAD.2020.3013076},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MoolchandaniKMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MoradiICS20,
author = {Yasamin Moradi and
Mohamed Ibrahim and
Krishnendu Chakrabarty and
Ulf Schlichtmann},
title = {An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric
for Droplet Barcoding in Single-Cell Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {359--372},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889765},
doi = {10.1109/TCAD.2018.2889765},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MoradiICS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MutluK20,
author = {Onur Mutlu and
Jeremie S. Kim},
title = {RowHammer: {A} Retrospective},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1555--1571},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915318},
doi = {10.1109/TCAD.2019.2915318},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MutluK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MyeongKKSKS20,
author = {Ilho Myeong and
Juhyun Kim and
Hyungwoo Ko and
Ickhyun Song and
Yongseok Kim and
Hyungcheol Shin},
title = {A Simple and Accurate Modeling Method of Channel Thermal Noise Using
{BSIM4} Noise Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4351--4358},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2974339},
doi = {10.1109/TCAD.2020.2974339},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/MyeongKKSKS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NeutzlingMMRR20,
author = {Augusto Neutzling and
Felipe S. Marranghello and
Jody Maick Matos and
Andr{\'{e}} In{\'{a}}cio Reis and
Renato P. Ribas},
title = {maj-n Logic Synthesis for Emerging Technology},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {747--751},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897704},
doi = {10.1109/TCAD.2019.2897704},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NeutzlingMMRR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiYCLLYHW20,
author = {Tianming Ni and
Yao Yao and
Hao Chang and
Lin Lu and
Huaguo Liang and
Aibin Yan and
Zhengfeng Huang and
Xiaoqing Wen},
title = {{LCHR-TSV:} Novel Low Cost and Highly Repairable Honeycomb-Based {TSV}
Redundancy Architecture for Clustered Faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2938--2951},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2946243},
doi = {10.1109/TCAD.2019.2946243},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiYCLLYHW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NieM20,
author = {Qi Nie and
Sharad Malik},
title = {MemFlow: Memory-Driven Data Scheduling With Datapath Co-Design in
Accelerators for Large-Scale Inference Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1875--1888},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925377},
doi = {10.1109/TCAD.2019.2925377},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NieM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiemannZDW20,
author = {Philipp Niemann and
Alwin Zulehner and
Rolf Drechsler and
Robert Wille},
title = {Overcoming the Tradeoff Between Accuracy and Compactness in Decision
Diagrams for Quantum Computation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4657--4668},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977603},
doi = {10.1109/TCAD.2020.2977603},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiemannZDW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NuzzoBMKPS20,
author = {Pierluigi Nuzzo and
Nikunj Bajaj and
Michael Masin and
Dmitrii Kirov and
Roberto Passerone and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Optimized Selection of Reliable and Cost-Effective Safety-Critical
System Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2109--2123},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2963255},
doi = {10.1109/TCAD.2019.2963255},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NuzzoBMKPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OuZL20,
author = {Changhai Ou and
Chengju Zhou and
Siew{-}Kei Lam},
title = {A First Study of Compressive Sensing for Side-Channel Leakage Sampling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2166--2177},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960337},
doi = {10.1109/TCAD.2019.2960337},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OuZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OzenO20,
author = {Elbruz Ozen and
Alex Orailoglu},
title = {Boosting Bit-Error Resilience of {DNN} Accelerators Through Median
Feature Selection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3250--3262},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012209},
doi = {10.1109/TCAD.2020.3012209},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/OzenO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OzkanPMSLHTH20,
author = {M. Akif {\"{O}}zkan and
Ars{\`{e}}ne P{\'{e}}rard{-}Gayot and
Richard Membarth and
Philipp Slusallek and
Roland Lei{\ss}a and
Sebastian Hack and
J{\"{u}}rgen Teich and
Frank Hannig},
title = {AnyHLS: High-Level Synthesis With Partial Evaluation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3202--3214},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012172},
doi = {10.1109/TCAD.2020.3012172},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OzkanPMSLHTH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PaganiDJH20,
author = {Santiago Pagani and
Sai Manoj P. D. and
Axel Jantsch and
J{\"{o}}rg Henkel},
title = {Machine Learning for Power, Energy, and Thermal Management on Multicore
Processors: {A} Survey},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {101--116},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2878168},
doi = {10.1109/TCAD.2018.2878168},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PaganiDJH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pajouhi20,
author = {Zoha Pajouhi},
title = {Ultralow Power Nonvolatile Logic Based on Spin-Orbit and Exchange
Coupled Nanowires},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1866--1874},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925373},
doi = {10.1109/TCAD.2019.2925373},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pajouhi20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PalMV20,
author = {Debjit Pal and
Sai Ma and
Shobha Vasudevan},
title = {Emphasizing Functional Relevance Over State Restoration in Post-Silicon
Signal Tracing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {533--546},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887047},
doi = {10.1109/TCAD.2018.2887047},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PalMV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PalOV20,
author = {Debjit Pal and
Spencer Offenberger and
Shobha Vasudevan},
title = {Assertion Ranking Using {RTL} Source Code Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1711--1724},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2921374},
doi = {10.1109/TCAD.2019.2921374},
timestamp = {Wed, 16 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PalOV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PanthoB20,
author = {Md Jubaer Hossain Pantho and
Christophe Bobda},
title = {MeXT-SE: {A} Design Tool to Transparently Generate Secure MPSoC},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3799--3808},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012651},
doi = {10.1109/TCAD.2020.3012651},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PanthoB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PapavramidouN20,
author = {Panagiota Papavramidou and
Michael Nicolaidis},
title = {Iterative Diagnosis Approach for ECC-Based Memory Repair},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {464--477},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887052},
doi = {10.1109/TCAD.2018.2887052},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PapavramidouN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkLKHGLC20,
author = {Dongwon Park and
Daeyeal Lee and
Ilgweon Kang and
Chester Holtz and
Sicun Gao and
Bill Lin and
Chung{-}Kuan Cheng},
title = {Grid-Based Framework for Routability Analysis and Diagnosis With Conditional
Design Rules},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5097--5110},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977066},
doi = {10.1109/TCAD.2020.2977066},
timestamp = {Mon, 01 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkLKHGLC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkYAKK20,
author = {Junki Park and
Wooseok Yi and
Daehyun Ahn and
Jaeha Kung and
Jae{-}Joon Kim},
title = {Balancing Computation Loads and Optimizing Input Vector Loading in
{LSTM} Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1889--1901},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926482},
doi = {10.1109/TCAD.2019.2926482},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ParkYAKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PassosCRCF20,
author = {F{\'{a}}bio Passos and
Miguel Chanca and
Elisenda Roca and
Rafael Castro{-}L{\'{o}}pez and
Francisco V. Fern{\'{a}}ndez},
title = {Synthesis of mm-Wave Wideband Receivers in 28-nm {CMOS} Technology
for Automotive Radar Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4375--4384},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2983363},
doi = {10.1109/TCAD.2020.2983363},
timestamp = {Tue, 26 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PassosCRCF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PassosRSFCLF20,
author = {F{\'{a}}bio Passos and
Elisenda Roca and
Javier J. Sieiro and
Rafaella Fiorelli and
Rafael Castro{-}L{\'{o}}pez and
Jos{\'{e}} Mar{\'{\i}}a L{\'{o}}pez{-}Villegas and
Francisco V. Fern{\'{a}}ndez},
title = {A Multilevel Bottom-Up Optimization Methodology for the Automated
Synthesis of {RF} Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {560--571},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890528},
doi = {10.1109/TCAD.2018.2890528},
timestamp = {Thu, 15 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PassosRSFCLF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PatnaikASK20,
author = {Satwik Patnaik and
Mohammed Ashraf and
Ozgur Sinanoglu and
Johann Knechtel},
title = {Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout
Camouflaging},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4466--4481},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2981034},
doi = {10.1109/TCAD.2020.2981034},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PatnaikASK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PatnaikRKSR20,
author = {Satwik Patnaik and
Nikhil Rangarajan and
Johann Knechtel and
Ozgur Sinanoglu and
Shaloo Rakheja},
title = {Spin-Orbit Torque Devices for Hardware Security: From Deterministic
to Probabilistic Regime},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1591--1606},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917856},
doi = {10.1109/TCAD.2019.2917856},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PatnaikRKSR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PatyalPACC20,
author = {Abhishek Patyal and
Po{-}Cheng Pan and
K. A. Asha and
Hung{-}Ming Chen and
Wei{-}Zen Chen},
title = {Exploring Multiple Analog Placements With Partial-Monotonic Current
Paths and Symmetry Constraints Using {PCP-SP}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5056--5068},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2975177},
doi = {10.1109/TCAD.2020.2975177},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PatyalPACC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PavlogiannisSSC20,
author = {Andreas Pavlogiannis and
Nico Schaumberger and
Ulrich Schmid and
Krishnendu Chatterjee},
title = {Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3981--3992},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012803},
doi = {10.1109/TCAD.2020.3012803},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PavlogiannisSSC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PeachPWPHC20,
author = {Gregor Peach and
Runyu Pan and
Zhuoyi Wu and
Gabriel Parmer and
Christopher Haster and
Ludmila Cherkasova},
title = {eWASM: Practical Software Fault Isolation for Reliable Embedded Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3492--3505},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012647},
doi = {10.1109/TCAD.2020.3012647},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PeachPWPHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PengYTSZZL20,
author = {Fulin Peng and
Handi Yu and
Jun Tao and
Yangfeng Su and
Dian Zhou and
Xuan Zeng and
Xin Li},
title = {Efficient Statistical Analysis for Correlated Rare Failure Events
via Asymptotic Probability Approximation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4971--4984},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2979804},
doi = {10.1109/TCAD.2020.2979804},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PengYTSZZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PeroniINDR20,
author = {Daniel Peroni and
Mohsen Imani and
Hamid Nejatollahi and
Nikil D. Dutt and
Tajana Rosing},
title = {Data Reuse for Accelerated Approximate Warps},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4623--4634},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2986128},
doi = {10.1109/TCAD.2020.2986128},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PeroniINDR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PeroniIR20,
author = {Daniel Peroni and
Mohsen Imani and
Tajana Simunic Rosing},
title = {Runtime Efficiency-Accuracy Tradeoff Using Configurable Floating Point
Multiplier},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {346--358},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2885317},
doi = {10.1109/TCAD.2018.2885317},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PeroniIR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PilipkoM20,
author = {Mikhail M. Pilipko and
Dmitry V. Morozov},
title = {An Algorithm for the Search of a Low Capacitor Count {DAC} Switching
Scheme for {SAR} ADCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5309--5313},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2983132},
doi = {10.1109/TCAD.2020.2983132},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PilipkoM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PirronZS20,
author = {Marcus Pirron and
Damien Zufferey and
Phillip Stanley{-}Marbell},
title = {Automated Controller and Sensor Configuration Synthesis Using Dimensional
Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3227--3238},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013044},
doi = {10.1109/TCAD.2020.3013044},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PirronZS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PittinoDBB20,
author = {Federico Pittino and
Roberto Diversi and
Luca Benini and
Andrea Bartolini},
title = {Robust Identification of Thermal Models for In-Production High-Performance-Computing
Clusters With Machine Learning-Based Data Selection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2042--2054},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2950378},
doi = {10.1109/TCAD.2019.2950378},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PittinoDBB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20,
author = {Irith Pomeranz},
title = {Multicycle Broadside and Skewed-Load Tests for Test Compaction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {262--266},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887049},
doi = {10.1109/TCAD.2018.2887049},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20a,
author = {Irith Pomeranz},
title = {Reverse Low-Power Broadside Tests},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {742--746},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894675},
doi = {10.1109/TCAD.2019.2894675},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20b,
author = {Irith Pomeranz},
title = {Switching Activity of Faulty Circuits in Presence of Multiple Transition
Faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {936--945},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2902326},
doi = {10.1109/TCAD.2019.2902326},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20c,
author = {Irith Pomeranz},
title = {Broadside Tests for Transition and Stuck-At Faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1739--1743},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935046},
doi = {10.1109/TCAD.2019.2935046},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20d,
author = {Irith Pomeranz},
title = {Globally Functional Transparent-Scan Sequences},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3012--3022},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2939331},
doi = {10.1109/TCAD.2019.2939331},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20d.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20e,
author = {Irith Pomeranz},
title = {New Targets for Diagnostic Test Generation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3035--3043},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2928971},
doi = {10.1109/TCAD.2019.2928971},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20e.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20f,
author = {Irith Pomeranz},
title = {Functional Broadside Tests Under Broadcast Scan},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3139--3143},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2939324},
doi = {10.1109/TCAD.2019.2939324},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20f.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pomeranz20g,
author = {Irith Pomeranz},
title = {Direct Computation of LFSR-Based Stored Tests for Broadside and Skewed-Load
Tests},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5238--5246},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966452},
doi = {10.1109/TCAD.2020.2966452},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Pomeranz20g.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PomeranzV20,
author = {Irith Pomeranz and
Srikanth Venkataraman},
title = {LFSR-Based Test Generation for Reduced Fail Data Volume},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5261--5266},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2971527},
doi = {10.1109/TCAD.2020.2971527},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PomeranzV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Portolan20,
author = {Michele Portolan},
title = {Automated Testing Flow: The Present and the Future},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2952--2963},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2961328},
doi = {10.1109/TCAD.2019.2961328},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Portolan20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PossaniMRR20,
author = {Vinicius N. Possani and
Alan Mishchenko and
Renato P. Ribas and
Andr{\'{e}} In{\'{a}}cio Reis},
title = {Parallel Combinational Equivalence Checking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3081--3092},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2946254},
doi = {10.1109/TCAD.2019.2946254},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PossaniMRR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PrajapatiRDSGA20,
author = {Nirmal Prajapati and
Sanjay V. Rajopadhye and
Hristo N. Djidjev and
Nandakishore Santhi and
Tobias Grosser and
Rumen Andonov},
title = {Optimization Approach to Accelerator Codesign},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1300--1313},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926489},
doi = {10.1109/TCAD.2019.2926489},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PrajapatiRDSGA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PutraS20,
author = {Rachmad Vidya Wicaksana Putra and
Muhammad Shafique},
title = {FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient
Spiking Neural Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3601--3613},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013049},
doi = {10.1109/TCAD.2020.3013049},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PutraS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/QianDXZZZ20,
author = {Junyan Qian and
Hao Ding and
Hanpeng Xiao and
Zhide Zhou and
Lingzhong Zhao and
Zhongyi Zhai},
title = {Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes
for Constructing 3-D {VLSI} Subarrays},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {267--271},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2891984},
doi = {10.1109/TCAD.2019.2891984},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/QianDXZZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RadhakrishnanYS20,
author = {Govind Radhakrishnan and
Youngki Yoon and
Manoj Sachdev},
title = {Monitoring Aging Defects in STT-MRAMs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4645--4656},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2982145},
doi = {10.1109/TCAD.2020.2982145},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/RadhakrishnanYS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RajmohanRN20,
author = {Shathanaa Rajmohan and
N. Ramasubramanian and
Nagi Naganathan},
title = {Hybrid Evolutionary Design Space Exploration Algorithm With Defence
Against Third Party {IP} Vulnerabilities},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2602--2614},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2960340},
doi = {10.1109/TCAD.2019.2960340},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RajmohanRN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ReddySAM20,
author = {Basireddy Karunakar Reddy and
Amit Kumar Singh and
Bashir M. Al{-}Hashimi and
Geoff V. Merrett},
title = {AdaMD: Adaptive Mapping and {DVFS} for Energy-Efficient Heterogeneous
Multicores},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2206--2217},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935065},
doi = {10.1109/TCAD.2019.2935065},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ReddySAM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RohanipoorGR20,
author = {Mohammad Reza Rohanipoor and
Behnam Ghavami and
Mohsen Raji},
title = {Improving Combinational Circuit Reliability Against Multiple Event
Transients via a Partition and Restructuring Approach},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1059--1072},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907922},
doi = {10.1109/TCAD.2019.2907922},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RohanipoorGR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RoyRHB20,
author = {Indrani Roy and
Chester Rebeiro and
Aritra Hazra and
Swarup Bhunia},
title = {{SAFARI:} Automatic Synthesis of Fault-Attack Resistant Block Cipher
Implementations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {752--765},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897629},
doi = {10.1109/TCAD.2019.2897629},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RoyRHB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RoymohapatraGYP20,
author = {Sitansusekhar Roymohapatra and
Ganesh R. Gore and
Akanksha Yadav and
Mahesh B. Patil and
Krishnan S. Rengarajan and
Subramanian S. Iyer and
Maryam Shojaei Baghini},
title = {A Novel Hierarchical Circuit {LUT} Model for {SOI} Technology for
Rapid Prototyping},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1073--1083},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907879},
doi = {10.1109/TCAD.2019.2907879},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RoymohapatraGYP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RuchkinSWHL20,
author = {Ivan Ruchkin and
Oleg Sokolsky and
James Weimer and
Tushar Hedaoo and
Insup Lee},
title = {Compositional Probabilistic Analysis of Temporal Properties Over Stochastic
Detectors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3288--3299},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012643},
doi = {10.1109/TCAD.2020.3012643},
timestamp = {Thu, 26 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/RuchkinSWHL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RustBSP20,
author = {Jochen Rust and
Moritz B{\"{a}}rthel and
Pascal Seidel and
Steffen Paul},
title = {A Hardware Generator for {SORN} Arithmetic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4842--4853},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2983709},
doi = {10.1109/TCAD.2020.2983709},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/RustBSP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SadiqbatchaST20,
author = {Sheriff Sadiqbatcha and
Zeyu Sun and
Sheldon X.{-}D. Tan},
title = {Accelerating Electromigration Aging: Fast Failure Detection for Nanometer
ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {885--894},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907908},
doi = {10.1109/TCAD.2019.2907908},
timestamp = {Fri, 19 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SadiqbatchaST20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SafariHE20,
author = {Sepideh Safari and
Shaahin Hessabi and
Ghazal Ershadi},
title = {{LESS-MICS:} {A} Low Energy Standby-Sparing Scheme for Mixed-Criticality
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4601--4610},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977063},
doi = {10.1109/TCAD.2020.2977063},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SafariHE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SagiDRWHH20,
author = {Mark Sagi and
Nguyen Anh Vu Doan and
Martin Rapp and
Thomas Wild and
J{\"{o}}rg Henkel and
Andreas Herkersdorf},
title = {A Lightweight Nonlinear Methodology to Accurately Model Multicore
Processor Power},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3152--3164},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013062},
doi = {10.1109/TCAD.2020.3013062},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SagiDRWHH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SalaminRHGA20,
author = {Sami Salamin and
Martin Rapp and
J{\"{o}}rg Henkel and
Andreas Gerstlauer and
Hussam Amrouch},
title = {Dynamic Power and Energy Management for NCFET-Based Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3361--3372},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012644},
doi = {10.1109/TCAD.2020.3012644},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SalaminRHGA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SamieTMBSH20,
author = {Farzad Samie and
Vasileios Tsoutsouras and
Dimosthenis Masouros and
Lars Bauer and
Dimitrios Soudris and
J{\"{o}}rg Henkel},
title = {Fast Operation Mode Selection for Highly Efficient IoT Edge Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {572--584},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897633},
doi = {10.1109/TCAD.2019.2897633},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SamieTMBSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SayalAMSK20,
author = {Aseem Sayal and
Paras Ajay and
Mark W. McDermott and
S. V. Sreenivasan and
Jaydeep P. Kulkarni},
title = {{M2A2:} Microscale Modular Assembled ASICs for High-Mix, Low-Volume,
Heterogeneously Integrated Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4760--4776},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2982621},
doi = {10.1109/TCAD.2020.2982621},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SayalAMSK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SchaferW20,
author = {Benjamin Carri{\'{o}}n Sch{\"{a}}fer and
Zi Wang},
title = {High-Level Synthesis Design Space Exploration: Past, Present, and
Future},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2628--2639},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2943570},
doi = {10.1109/TCAD.2019.2943570},
timestamp = {Fri, 18 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SchaferW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SeghaierZT20,
author = {Ibtissem Seghaier and
Mohamed H. Zaki and
Sofi{\`{e}}ne Tahar},
title = {Mating Sensitivity Analysis and Statistical Verification for Efficient
Yield Estimation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {294--307},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889764},
doi = {10.1109/TCAD.2018.2889764},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SeghaierZT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SenguptaMYS20,
author = {Abhrajit Sengupta and
Bodhisatwa Mazumdar and
Muhammad Yasin and
Ozgur Sinanoglu},
title = {Logic Locking With Provable Security Against Power Analysis Attacks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {766--778},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897699},
doi = {10.1109/TCAD.2019.2897699},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SenguptaMYS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SenguptaNLAS20,
author = {Abhrajit Sengupta and
Mohammed Nabeel and
Nimisha Limaye and
Mohammed Ashraf and
Ozgur Sinanoglu},
title = {Truly Stripping Functionality for Logic Locking: {A} Fault-Based Perspective},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4439--4452},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968898},
doi = {10.1109/TCAD.2020.2968898},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SenguptaNLAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SeoKK20,
author = {Bohun Seo and
Hyeonggyu Kim and
Soontae Kim},
title = {Freezing: Eliminating Unnecessary Drawing Computation for Low Power},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {56--61},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883904},
doi = {10.1109/TCAD.2018.2883904},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SeoKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SethuramanTRSKH20,
author = {Saravanan Sethuraman and
Venkata Kalyan Tavva and
Karthick Rajamani and
Chitra K. Subramanian and
Kyu{-}Hyoun Kim and
Hillery C. Hunter and
M. B. Srinivas},
title = {Temperature Aware Adaptations for Improved Read Reliability in {STT-MRAM}
Memory Subsystem},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4635--4644},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2982134},
doi = {10.1109/TCAD.2020.2982134},
timestamp = {Fri, 28 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SethuramanTRSKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShabaniA20,
author = {Ahmad Shabani and
Bijan Alizadeh},
title = {{PMTP:} {A} MAX-SAT-Based Approach to Detect Hardware Trojan Using
Propagation of Maximum Transition Probability},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {25--33},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889663},
doi = {10.1109/TCAD.2018.2889663},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShabaniA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShaoLHRY20,
author = {Lingxuan Shao and
Wentai Li and
Tsung{-}Yi Ho and
Sudip Roy and
Hailong Yao},
title = {Lookup Table-Based Fast Reliability-Aware Sample Preparation Using
Digital Microfluidic Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2708--2721},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2948907},
doi = {10.1109/TCAD.2019.2948907},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShaoLHRY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SharmaCRBC20,
author = {Ankur Sharma and
David G. Chinnery and
Tiago Reimann and
Sarvesh Bhardwaj and
Chris Chu},
title = {Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple
Timing Calibrations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1456--1469},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915324},
doi = {10.1109/TCAD.2019.2915324},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SharmaCRBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShayanLBCK20,
author = {Mohammed Shayan and
Tung{-}Che Liang and
Sukanta Bhattacharjee and
Krishnendu Chakrabarty and
Ramesh Karri},
title = {Toward Secure Checkpointing for Micro-Electrode-Dot-Array Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4908--4920},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2979972},
doi = {10.1109/TCAD.2020.2979972},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShayanLBCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShenCX20,
author = {Minghua Shen and
Hongzheng Chen and
Nong Xiao},
title = {Entropy-Directed Scheduling for {FPGA} High-Level Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2588--2601},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2939325},
doi = {10.1109/TCAD.2019.2939325},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShenCX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShenHCMJS20,
author = {Zhaoyan Shen and
Lei Han and
Renhai Chen and
Chenlin Ma and
Zhiping Jia and
Zili Shao},
title = {An Efficient Directory Entry Lookup Cache With Prefix-Awareness for
Mobile Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4575--4586},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2978833},
doi = {10.1109/TCAD.2020.2978833},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ShenHCMJS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShenHWZ20,
author = {Junzhong Shen and
You Huang and
Mei Wen and
Chunyuan Zhang},
title = {Toward an Efficient Deep Pipelined Template-Based Architecture for
Accelerating the Entire 2-D and 3-D CNNs on {FPGA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1442--1455},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912894},
doi = {10.1109/TCAD.2019.2912894},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShenHWZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShenZLX20,
author = {Minghua Shen and
Wentai Zhang and
Guojie Luo and
Nong Xiao},
title = {Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {411--423},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887050},
doi = {10.1109/TCAD.2018.2887050},
timestamp = {Tue, 13 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShenZLX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShiLZ20,
author = {Junye Shi and
Yang Lu and
Jiliang Zhang},
title = {Approximation Attacks on Strong PUFs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2138--2151},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962115},
doi = {10.1109/TCAD.2019.2962115},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShiLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShiYWZSH20,
author = {Xiao Shi and
Hao Yan and
Jinxin Wang and
Jiajia Zhang and
Longxing Shi and
Lei He},
title = {An Efficient Adaptive Importance Sampling Method for {SRAM} and Analog
Yield Analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4999--5010},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966481},
doi = {10.1109/TCAD.2020.2966481},
timestamp = {Thu, 11 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ShiYWZSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SinghS20,
author = {Nikhil Kumar Singh and
Indranil Saha},
title = {Specification-Guided Automated Debugging of {CPS} Models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4142--4153},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012862},
doi = {10.1109/TCAD.2020.3012862},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SinghS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SiracusaF20,
author = {Marco Siracusa and
Fabrizio Ferrandi},
title = {Tensor Optimization for High-Level Synthesis Design Flows},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4217--4228},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012318},
doi = {10.1109/TCAD.2020.3012318},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SiracusaF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SmyR20,
author = {Tom J. Smy and
John H. Rasmussen},
title = {Integration of Traveling Wave Optical Device Models Into an MNA-Based
Circuit Simulator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4338--4350},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968549},
doi = {10.1109/TCAD.2020.2968549},
timestamp = {Mon, 11 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SmyR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SokolovKMDLY20,
author = {Danil Sokolov and
Victor Khomenko and
Andrey Mokhov and
Vladimir Dubikhin and
David Lloyd and
Alex Yakovlev},
title = {Automating the Design of Asynchronous Logic Control for {AMS} Electronics},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {952--965},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907905},
doi = {10.1109/TCAD.2019.2907905},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SokolovKMDLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SoomroSJ20,
author = {Iftikhar A. Soomro and
Mohammad Samie and
Ian K. Jennions},
title = {Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous
Bidirectional Signaling in Parallel Test Ports},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5225--5237},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977604},
doi = {10.1109/TCAD.2020.2977604},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SoomroSJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/StefanovDSF0YD20,
author = {Emil Stefanov and
Marten van Dijk and
Elaine Shi and
Christopher W. Fletcher and
Ling Ren and
Xiangyao Yu and
Srinivas Devadas},
title = {A Retrospective on Path {ORAM}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1572--1576},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925398},
doi = {10.1109/TCAD.2019.2925398},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/StefanovDSF0YD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/StockFMHBC20,
author = {Gregory Stock and
Juan A. Fraire and
Tobias M{\"{o}}mke and
Holger Hermanns and
Fakhri Babayev and
Eduardo Cruz},
title = {Managing Fleets of {LEO} Satellites: Nonlinear, Optimal, Efficient,
Scalable, Usable, and Robust},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3762--3773},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012751},
doi = {10.1109/TCAD.2020.3012751},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/StockFMHBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuWWL20,
author = {Yen{-}Yu Su and
Shuo{-}Hui Wang and
Wei{-}Liang Wu and
Mark Po{-}Hung Lin},
title = {Corner-Stitching-Based Multilayer Obstacle-Avoiding Component-to-Component
Rectilinear Minimum Spanning Tree Construction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {675--685},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890531},
doi = {10.1109/TCAD.2018.2890531},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SuWWL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuZKHQ20,
author = {Sanbao Su and
Chen Zou and
Weijiang Kong and
Jie Han and
Weikang Qian},
title = {A Novel Heuristic Search Method for Two-Level Approximate Logic Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {654--669},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890532},
doi = {10.1109/TCAD.2018.2890532},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SuZKHQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SunGCLDY20,
author = {Jinghao Sun and
Nan Guan and
Shuangshuang Chang and
Feng Li and
Qingxu Deng and
Wang Yi},
title = {Capacity Augmentation Function for Real-Time Parallel Tasks With Constrained
Deadlines Under {GEDF} Scheduling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4537--4548},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966486},
doi = {10.1109/TCAD.2020.2966486},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SunGCLDY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SunKCTT20,
author = {Xiaoxue Sun and
Chenyang Kong and
Yingyu Chen and
Jun Tao and
Zhangwen Tang},
title = {A Synthesizable Constant Tuning Gain Technique for Wideband \emph{LC}-VCO
Design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {14--24},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2878161},
doi = {10.1109/TCAD.2018.2878161},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SunKCTT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SunSWGG20,
author = {Jinghao Sun and
Rongxiao Shi and
Kexuan Wang and
Nan Guan and
Zhishan Guo},
title = {Efficient Feasibility Analysis for Graph-Based Real-Time Task Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3385--3397},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012174},
doi = {10.1109/TCAD.2020.3012174},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SunSWGG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SurabhiKAHKK20,
author = {Virinchi Roy Surabhi and
Prashanth Krishnamurthy and
Hussam Amrouch and
J{\"{o}}rg Henkel and
Ramesh Karri and
Farshad Khorrami},
title = {Exposing Hardware Trojans in Embedded Platforms via Short-Term Aging},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3519--3530},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012649},
doi = {10.1109/TCAD.2020.3012649},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SurabhiKAHKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TabriziDRBKB20,
author = {Aysa Fakheri Tabrizi and
Nima Karimpour Darav and
Logan Rakai and
Ismail Bustany and
Andrew A. Kennings and
Laleh Behjat},
title = {Eh?Predictor: {A} Deep Learning Framework to Identify Detailed Routing
Short Violations From a Placed Netlist},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1177--1190},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917130},
doi = {10.1109/TCAD.2019.2917130},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TabriziDRBKB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TagliaviniMB20,
author = {Giuseppe Tagliavini and
Andrea Marongiu and
Luca Benini},
title = {FlexFloat: {A} Software Library for Transprecision Computing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {145--156},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883902},
doi = {10.1109/TCAD.2018.2883902},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TagliaviniMB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TaheriIPK20,
author = {Ebadollah Taheri and
Mihailo Isakov and
Ahmad Patooghy and
Michel A. Kinsy},
title = {Addressing a New Class of Reliability Threats in 3-D Network-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1358--1371},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917846},
doi = {10.1109/TCAD.2019.2917846},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TaheriIPK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TangICK20,
author = {Jack Tang and
Mohamed Ibrahim and
Krishnendu Chakrabarty and
Ramesh Karri},
title = {Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {171--184},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883901},
doi = {10.1109/TCAD.2018.2883901},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TangICK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TangICK20a,
author = {Jack Tang and
Mohamed Ibrahim and
Krishnendu Chakrabarty and
Ramesh Karri},
title = {Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1003--1016},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907881},
doi = {10.1109/TCAD.2019.2907881},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TangICK20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TenaceCMP20,
author = {Valerio Tenace and
Andrea Calimera and
Enrico Macii and
Massimo Poncino},
title = {Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar
Technologies},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {397--410},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2889770},
doi = {10.1109/TCAD.2018.2889770},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TenaceCMP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TianLWCYX20,
author = {Chengjin Tian and
Yongkun Li and
Si Wu and
Jinzhong Chen and
Liu Yuan and
Yinlong Xu},
title = {Popularity-Based Online Scaling for {RAID} Systems Under General Settings},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2911--2924},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2930580},
doi = {10.1109/TCAD.2019.2930580},
timestamp = {Tue, 12 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TianLWCYX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TidaZLS20,
author = {Umamaheswara Rao Tida and
Cheng Zhuo and
Leibo Liu and
Yiyu Shi},
title = {Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via
Inductor Utilization in Resonant Clocking},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {281--293},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887053},
doi = {10.1109/TCAD.2018.2887053},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TidaZLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TomoutzoglouMKC20,
author = {Othon Tomoutzoglou and
Dimitrios Mbakoyiannis and
George Kornaros and
Marcello Coppola},
title = {Efficient Job Offloading in Heterogeneous Systems Through Hardware-Assisted
Packet-Based Dispatching and User-Level Runtime Infrastructure},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1017--1030},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907912},
doi = {10.1109/TCAD.2019.2907912},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TomoutzoglouMKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TruppelTBAS20,
author = {Alexandre Truppel and
Tsun{-}Ming Tseng and
Davide Bertozzi and
Jos{\'{e}} Carlos Alves and
Ulf Schlichtmann},
title = {{PSION+:} Combining Logical Topology and Physical Layout Optimization
for Wavelength-Routed ONoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5197--5210},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2971536},
doi = {10.1109/TCAD.2020.2971536},
timestamp = {Thu, 31 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TruppelTBAS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TuPY20,
author = {Peishan Tu and
Chak{-}Wa Pui and
Evangeline F. Y. Young},
title = {Simultaneous Reconnection Surgery Technique of Routing With Machine
Learning-Based Acceleration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1245--1257},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912930},
doi = {10.1109/TCAD.2019.2912930},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TuPY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/UtyamishevP20,
author = {Dmitry Utyamishev and
Inna Partin{-}Vaisband},
title = {Real-Time Detection of Power Analysis Attacks by Machine Learning
of Power Supply Variations On-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {45--55},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883971},
doi = {10.1109/TCAD.2018.2883971},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/UtyamishevP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VeiraPV20,
author = {Neil Veira and
Zissis Poulos and
Andreas G. Veneris},
title = {Searching for Bugs Using Probabilistic Suspect Implications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5267--5280},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966448},
doi = {10.1109/TCAD.2020.2966448},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VeiraPV20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VenkataramaniKS20,
author = {Swagath Venkataramani and
Vivek Joy Kozhikkottu and
Amit Sabne and
Kaushik Roy and
Anand Raghunathan},
title = {Logic Synthesis of Approximate Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2503--2515},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2940680},
doi = {10.1109/TCAD.2019.2940680},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VenkataramaniKS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VialeA20,
author = {Benjamin Viale and
Bruno Allard},
title = {Scalable and Versatile Design Guidance Tool for the {ESD} Robustness
of Integrated Circuits - Part {I}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3067--3080},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962120},
doi = {10.1109/TCAD.2019.2962120},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VialeA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VialeA20a,
author = {Benjamin Viale and
Bruno Allard},
title = {Scalable and Versatile Design Guidance Tool for the {ESD} Robustness
of Integrated Circuits - Part {II}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3107--3117},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962119},
doi = {10.1109/TCAD.2019.2962119},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VialeA20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VieraMDB20,
author = {Raphael Andreoni Camponogara Viera and
Philippe Maurine and
Jean{-}Max Dutertre and
Rodrigo Possamai Bastos},
title = {Simulation and Experimental Demonstration of the Importance of IR-Drops
During Laser Fault Injection},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {6},
pages = {1231--1244},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2928972},
doi = {10.1109/TCAD.2019.2928972},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VieraMDB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VilardellSSMAC20,
author = {Sergi Vilardell and
Isabel Serra and
Roberto Santalla and
Enrico Mezzetti and
Jaume Abella and
Francisco J. Cazorla},
title = {{HRM:} Merging Hardware Event Monitors for Improved Timing Analysis
of Complex MPSoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3662--3673},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013051},
doi = {10.1109/TCAD.2020.3013051},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VilardellSSMAC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VistaR20,
author = {John Vista and
Ashish Ranjan},
title = {High Frequency Meminductor Emulator Employing {VDTA} and its Application},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2020--2028},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2950376},
doi = {10.1109/TCAD.2019.2950376},
timestamp = {Fri, 21 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VistaR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VoigtSFPMR20,
author = {Andreas Voigt and
J{\"{o}}rg Schreiter and
Philipp Frank and
Cesare Pini and
Christian Mayr and
Andreas Richter},
title = {Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based
Microfluidic Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {8},
pages = {1635--1648},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925354},
doi = {10.1109/TCAD.2019.2925354},
timestamp = {Mon, 10 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/VoigtSFPMR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangAHC20,
author = {Haitong Wang and
Neil C. Audsley and
Xiaobo Sharon Hu and
Wanli Chang},
title = {Meshed Bluetree: Time-Predictable Multimemory Interconnect for Multicore
Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3787--3798},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012239},
doi = {10.1109/TCAD.2020.3012239},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangAHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangAZGPM20,
author = {Siqi Wang and
Gayathri Ananthanarayanan and
Yifan Zeng and
Neeraj Goel and
Anuj Pathania and
Tulika Mitra},
title = {High-Throughput {CNN} Inference on Embedded {ARM} Big.LITTLE Multicore
Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2254--2267},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944584},
doi = {10.1109/TCAD.2019.2944584},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangAZGPM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangCC20,
author = {Xinyuan Wang and
Pengwen Chen and
Chung{-}Kuan Cheng},
title = {Stability and Convergency Exploration of Matrix Exponential Integration
on Power Delivery Network Transient Simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2735--2748},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2954473},
doi = {10.1109/TCAD.2019.2954473},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangCC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangDTHZ20,
author = {Dekui Wang and
Zhenhua Duan and
Cong Tian and
Bohu Huang and
Nan Zhang},
title = {ParRA: {A} Shared Memory Parallel {FPGA} Router Using Hybrid Partitioning
Approach},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {830--842},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2901243},
doi = {10.1109/TCAD.2019.2901243},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangDTHZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangGF20,
author = {Peikun Wang and
Amir Masoud Gharehbaghi and
Masahiro Fujita},
title = {An Automatic Test Pattern Generation Method for Multiple Stuck-At
Faults by Incrementally Extending the Test Patterns},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2990--2999},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2957364},
doi = {10.1109/TCAD.2019.2957364},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangGF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangGTZTY20,
author = {Hai Wang and
Xingxing Guo and
Sheldon X.{-}D. Tan and
Chi Zhang and
He Tang and
Yuan Yuan},
title = {Leakage-Aware Predictive Thermal Management for Multicore Systems
Using Echo State Network},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1400--1413},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915316},
doi = {10.1109/TCAD.2019.2915316},
timestamp = {Wed, 01 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangGTZTY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangJWTLYH20,
author = {Zhendong Wang and
Zihang Jiang and
Zhen Wang and
Xulong Tang and
Cong Liu and
Shouyi Yin and
Yang Hu},
title = {Enabling Latency-Aware Data Initialization for Integrated {CPU/GPU}
Heterogeneous Platform},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3433--3444},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013047},
doi = {10.1109/TCAD.2020.3013047},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangJWTLYH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangSCJLCKYHSL20,
author = {Qin Wang and
Ulf Schlichtmann and
Yici Cai and
Weiqing Ji and
Zeyan Li and
Haena Cheong and
Oh{-}Sun Kwon and
Hailong Yao and
Tsung{-}Yi Ho and
Kwanwoo Shin and
Bing Li},
title = {Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital
Microfluidic Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {613--625},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894820},
doi = {10.1109/TCAD.2019.2894820},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangSCJLCKYHSL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangSNFT20,
author = {Huanyu Wang and
Qihang Shi and
Adib Nahiyan and
Domenic Forte and
Mark M. Tehranipoor},
title = {A Physical Design Flow Against Front-Side Probing Attacks by Internal
Shielding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2152--2165},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2952133},
doi = {10.1109/TCAD.2019.2952133},
timestamp = {Tue, 30 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangSNFT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangTML20,
author = {Yi Wang and
Jiali Tan and
Rui Mao and
Tao Li},
title = {Temperature-Aware Persistent Data Management for LSM-Tree on 3-D {NAND}
Flash Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4611--4622},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2982623},
doi = {10.1109/TCAD.2020.2982623},
timestamp = {Wed, 15 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangTML20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangWCGZ20,
author = {Xuan Wang and
Chao Wang and
Jing Cao and
Lei Gong and
Xuehai Zhou},
title = {WinoNN: Optimizing FPGA-Based Convolutional Neural Network Accelerators
Using Sparse Winograd Algorithm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4290--4302},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012323},
doi = {10.1109/TCAD.2020.3012323},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangWCGZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangWG20,
author = {Wei{-}Che Wang and
Yizhang Wu and
Puneet Gupta},
title = {Reverse Engineering for 2.5-D Split Manufactured ICs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3128--3133},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2957359},
doi = {10.1109/TCAD.2019.2957359},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangWG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangWJSHY20,
author = {Jiachen Wang and
Xiaohang Wang and
Yingtao Jiang and
Amit Kumar Singh and
Letian Huang and
Mei Yang},
title = {Combating Enhanced Thermal Covert Channel in Multi-/Many-Core Systems
With Channel-Aware Jamming},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3276--3287},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012642},
doi = {10.1109/TCAD.2020.3012642},
timestamp = {Mon, 24 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangWJSHY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangWXCFCCZ20,
author = {Zhehui Wang and
Zhifei Wang and
Jiang Xu and
Yi{-}Shing Chang and
Jun Feng and
Xuanqi Chen and
Shixi Chen and
Jiaxu Zhang},
title = {{CAMON:} Low-Cost Silicon Photonic Chiplet for Manycore Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1820--1833},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2926495},
doi = {10.1109/TCAD.2019.2926495},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangWXCFCCZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangXGG20,
author = {Dong Wang and
Ke Xu and
Jingning Guo and
Soheil Ghiasi},
title = {DSP-Efficient Hardware Acceleration of Convolutional Neural Network
Inference on FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4867--4880},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968023},
doi = {10.1109/TCAD.2020.2968023},
timestamp = {Thu, 16 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangXGG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangYCXCWF20,
author = {Zhifei Wang and
Peng Yang and
Yi{-}Shing Chang and
Jiang Xu and
Xuanqi Chen and
Zhehui Wang and
Jun Feng},
title = {A Cross-Layer Optimization Framework for Integrated Optical Switches
in Data Centers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {640--653},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894792},
doi = {10.1109/TCAD.2019.2894792},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangYCXCWF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangYLFDYL20,
author = {Jingyu Wang and
Zhe Yuan and
Ruoyang Liu and
Xiaoyu Feng and
Li Du and
Huazhong Yang and
Yongpan Liu},
title = {{GAAS:} An Efficient Group Associated Architecture and Scheduler Module
for Sparse {CNN} Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5170--5182},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2966451},
doi = {10.1109/TCAD.2020.2966451},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WangYLFDYL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WellerHGBAT20,
author = {Dennis D. Weller and
Michael Hefenbrock and
Mohammad Saber Golanbari and
Michael Beigl and
Jasmin Aghassi{-}Hagmann and
Mehdi B. Tahoori},
title = {Bayesian Optimized Mixture Importance Sampling for High-Sigma Failure
Rate Estimation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2772--2783},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2961321},
doi = {10.1109/TCAD.2019.2961321},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WellerHGBAT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WenQGR20,
author = {Fei Wen and
Mian Qin and
Paul V. Gratz and
A. L. Narasimha Reddy},
title = {Hardware Memory Management for Future Mobile Hybrid Memory Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3627--3637},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012213},
doi = {10.1109/TCAD.2020.3012213},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WenQGR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WenZZY20,
author = {Wen Wen and
Lei Zhao and
Youtao Zhang and
Jun Yang},
title = {Exploiting In-Memory Data Patterns for Performance Improvement on
Crossbar Resistive Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2347--2360},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2940685},
doi = {10.1109/TCAD.2019.2940685},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WenZZY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WengHJLBY20,
author = {Jiayi Weng and
Tsung{-}Yi Ho and
Weiqing Ji and
Peng Liu and
Mengdi Bao and
Hailong Yao},
title = {{URBER:} Ultrafast Rule-Based Escape Routing Method for Large-Scale
Sample Delivery Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {157--170},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883908},
doi = {10.1109/TCAD.2018.2883908},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WengHJLBY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuCJKX20,
author = {Chao Wu and
Yufei Cui and
Cheng Ji and
Tei{-}Wei Kuo and
Chun Jason Xue},
title = {Pruning Deep Reinforcement Learning for Dual User Experience and Storage
Lifetime Improvement on Mobile Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3993--4005},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012804},
doi = {10.1109/TCAD.2020.3012804},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuCJKX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuCYK20,
author = {Chun{-}Feng Wu and
Yuan{-}Hao Chang and
Ming{-}Chang Yang and
Tei{-}Wei Kuo},
title = {When Storage Response Time Catches Up With Overall Context Switch
Overhead, What Is Next?},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4266--4277},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012322},
doi = {10.1109/TCAD.2020.3012322},
timestamp = {Tue, 05 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuCYK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuDCWYWLZ20,
author = {Bi Wu and
Pengcheng Dai and
Yuanqing Cheng and
Ying Wang and
Jianlei Yang and
Zhaohao Wang and
Dijun Liu and
Weisheng Zhao},
title = {A Novel High Performance and Energy Efficient {NUCA} Architecture
for {STT-MRAM} LLCs With Thermal Consideration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {803--815},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897707},
doi = {10.1109/TCAD.2019.2897707},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuDCWYWLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuFTLWZZ20,
author = {Bing Wu and
Dan Feng and
Wei Tong and
Jingning Liu and
Chengning Wang and
Wei Zhao and
Yang Zhang},
title = {A Low Power Reconfigurable Memory Architecture for Complementary Resistive
Switches},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1806--1819},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927520},
doi = {10.1109/TCAD.2019.2927520},
timestamp = {Thu, 19 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuFTLWZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuGT20,
author = {Hsin{-}I Wu and
Da{-}Yi Guo and
Ren{-}Song Tsay},
title = {A Virtualization-Assisted Full-System Simulation Approach for the
Verification of System Intercomponent Interactions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5211--5224},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977064},
doi = {10.1109/TCAD.2020.2977064},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuGT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuLJKX20,
author = {Chao Wu and
Qiao Li and
Cheng Ji and
Tei{-}Wei Kuo and
Chun Jason Xue},
title = {Boosting User Experience via Foreground-Aware Cache Management in
{UFS} Mobile Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3263--3275},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013078},
doi = {10.1109/TCAD.2020.3013078},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuLJKX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuLW20,
author = {Denny C.{-}Y. Wu and
Aaron C.{-}W. Liang and
Charles H.{-}P. Wen},
title = {Speeding Up Functional Timing Analysis by Concise Formulation of Timed
Characteristic Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5281--5294},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2978811},
doi = {10.1109/TCAD.2020.2978811},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuLWWHDW20,
author = {Yibo Wu and
Leibo Liu and
Liang Wang and
Xiaohang Wang and
Jie Han and
Chenchen Deng and
Shaojun Wei},
title = {Aggressive Fine-Grained Power Gating of NoC Buffers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3177--3189},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012170},
doi = {10.1109/TCAD.2020.3012170},
timestamp = {Mon, 24 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuLWWHDW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuQ20,
author = {Yi Wu and
Weikang Qian},
title = {{ALFANS:} Multilevel Approximate Logic Synthesis Framework by Approximate
Node Simplification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1470--1483},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2915328},
doi = {10.1109/TCAD.2019.2915328},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuWSH20,
author = {Yawen Wu and
Zhepeng Wang and
Yiyu Shi and
Jingtong Hu},
title = {Enabling On-Device {CNN} Training by Self-Supervised Instance Filtering
and Error Map Pruning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3445--3457},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012216},
doi = {10.1109/TCAD.2020.3012216},
timestamp = {Tue, 13 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuWSH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuZDLLWTX20,
author = {Fei Wu and
Meng Zhang and
Yajuan Du and
Weihua Liu and
Zuo Lu and
Jiguang Wan and
Zhi{-}hu Tan and
Changsheng Xie},
title = {Using Error Modes Aware {LDPC} to Improve Decoding Performance of
3-D {TLC} {NAND} Flash},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {909--921},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2897706},
doi = {10.1109/TCAD.2019.2897706},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuZDLLWTX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuZHJMHC20,
author = {Suzhen Wu and
Weidong Zhu and
Yingxin Han and
Hong Jiang and
Bo Mao and
Zhijie Huang and
Liang Chen},
title = {GC-Steering: GC-Aware Request Steering and Parallel Reconstruction
Optimizations for SSD-Based RAIDs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4587--4600},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2974346},
doi = {10.1109/TCAD.2020.2974346},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/WuZHJMHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Wuerges20,
author = {Emilio Wuerges},
title = {3-Step Rectilinear Minimum Spanning Tree Construction for Obstacle-Avoiding
Component-to-Component Routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5123--5127},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2972534},
doi = {10.1109/TCAD.2020.2972534},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Wuerges20.bib},
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}
@article{DBLP:journals/tcad/XieLH20,
author = {Guoqi Xie and
Renfa Li and
Shiyan Hu},
title = {Security-Aware Obfuscated Priority Assignment for {CAN} {FD} Messages
in Real-Time Parallel Automotive Applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4413--4425},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2979457},
doi = {10.1109/TCAD.2020.2979457},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XieLH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XingLSJQLWSW20,
author = {Yu Xing and
Shuang Liang and
Lingzhi Sui and
Xijie Jia and
Jiantao Qiu and
Xin Liu and
Yushun Wang and
Yi Shan and
Yu Wang},
title = {{DNNVM:} End-to-End Compiler Leveraging Heterogeneous Optimizations
on FPGA-Based {CNN} Accelerators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2668--2681},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2930577},
doi = {10.1109/TCAD.2019.2930577},
timestamp = {Wed, 21 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/XingLSJQLWSW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuKEB20,
author = {Chuan Xu and
Seshadri K. Kolluri and
Kazuhiko Endo and
Kaustav Banerjee},
title = {Correction to "Analytical Thermal Model for Self-Heating in Advanced
FinFET Devices With Implications for Design and Reliability"},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {277},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944583},
doi = {10.1109/TCAD.2019.2944583},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuKEB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuLLZYZ20,
author = {Yunhao Xu and
Yingjie Lao and
Weiqiang Liu and
Zaichen Zhang and
Xiaohu You and
Chuan Zhang},
title = {Mathematical Modeling Analysis of Strong Physical Unclonable Functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4426--4438},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2969645},
doi = {10.1109/TCAD.2020.2969645},
timestamp = {Fri, 30 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuLLZYZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuLY20,
author = {Changqing Xu and
Yi Liu and
Yintang Yang},
title = {SRNoC: An Ultra-Fast Configurable FPGA-Based NoC Simulator Using Switch-Router
Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2798--2811},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935051},
doi = {10.1109/TCAD.2019.2935051},
timestamp = {Sat, 20 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XuZYZ20,
author = {Weihong Xu and
Zaichen Zhang and
Xiaohu You and
Chuan Zhang},
title = {Reconfigurable and Low-Complexity Accelerator for Convolutional and
Generative Networks Over Finite Fields},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4894--4907},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2973355},
doi = {10.1109/TCAD.2020.2973355},
timestamp = {Fri, 30 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XuZYZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XueFZBX20,
author = {Bai Xue and
Martin Fr{\"{a}}nzle and
Naijun Zhan and
Sergiy Bogomolov and
Bican Xia},
title = {Safety Verification for Random Ordinary Differential Equations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {4090--4101},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013135},
doi = {10.1109/TCAD.2020.3013135},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XueFZBX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/XueZEL20,
author = {Bai Xue and
Miaomiao Zhang and
Arvind Easwaran and
Qin Li},
title = {{PAC} Model Checking of Black-Box Continuous-Time Dynamical Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3944--3955},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012251},
doi = {10.1109/TCAD.2020.3012251},
timestamp = {Wed, 01 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/XueZEL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YakopcicTMSMM20,
author = {Chris Yakopcic and
Tarek M. Taha and
David J. Mountain and
Thomas Salter and
Matthew J. Marinella and
Mark R. McLean},
title = {Memristor Model Optimization Based on Parameter Extraction From Device
Characterization Data},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {1084--1095},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912946},
doi = {10.1109/TCAD.2019.2912946},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YakopcicTMSMM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangLDMYY20,
author = {Haoyu Yang and
Shuhe Li and
Zihao Deng and
Yuzhe Ma and
Bei Yu and
Evangeline F. Y. Young},
title = {{GAN-OPC:} Mask Optimization With Lithography-Guided Generative Adversarial
Nets},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2822--2834},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2939329},
doi = {10.1109/TCAD.2019.2939329},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangLDMYY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangLLCBWWR20,
author = {Chaofei Yang and
Beiye Liu and
Hai Li and
Yiran Chen and
Mark Barnell and
Qing Wu and
Wujie Wen and
Jeyavijayan Rajendran},
title = {Thwarting Replication Attack Against Memristor-Based Neuromorphic
Computing System},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2192--2205},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2937817},
doi = {10.1109/TCAD.2019.2937817},
timestamp = {Fri, 05 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangLLCBWWR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangWWXCCMF20,
author = {Peng Yang and
Zhehui Wang and
Zhifei Wang and
Jiang Xu and
Yi{-}Shing Chang and
Xuanqi Chen and
Rafael K. V. Maeda and
Jun Feng},
title = {Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient
Rack-Scale Computing Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {626--639},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2894810},
doi = {10.1109/TCAD.2019.2894810},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YangWWXCCMF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangY20,
author = {Ming Yang and
Wenjian Yu},
title = {Reliable Macromodel Generation for the Capacitance Extraction Based
on Macromodel-Aware Random Walk Algorithm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {946--951},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2901255},
doi = {10.1109/TCAD.2019.2901255},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangY20a,
author = {Ming Yang and
Wenjian Yu},
title = {Floating Random Walk Capacitance Solver Tackling Conformal Dielectric
With On-the-Fly Sampling on Eight-Octant Transition Cubes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4935--4943},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2968544},
doi = {10.1109/TCAD.2020.2968544},
timestamp = {Wed, 04 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangY20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YaoY20,
author = {Renjie Yao and
Yaoyao Ye},
title = {Toward a High-Performance and Low-Loss Clos-Benes-Based Optical Network-on-Chip
Architecture},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4695--4706},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2971529},
doi = {10.1109/TCAD.2020.2971529},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YaoY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YeZL20,
author = {Yaoyao Ye and
Wenfei Zhang and
Weichen Liu},
title = {Thermal-Aware Design and Simulation Approach for Optical NoCs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2384--2395},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2935407},
doi = {10.1109/TCAD.2019.2935407},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YeZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YongC20,
author = {Kong{-}Kiat Yong and
Li{-}Pin Chang},
title = {Error Diluting: Exploiting 3-D nand Flash Process Variation for Efficient
Read on LDPC-Based SSDs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3467--3478},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012646},
doi = {10.1109/TCAD.2020.3012646},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YongC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YouHPLC20,
author = {Tae{-}Hee You and
Sangwoo Han and
Young Min Park and
Hyuk{-}Jun Lee and
Eui{-}Young Chung},
title = {Multitoken-Based Power Management for {NAND} Flash Storage Devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2898--2910},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2953948},
doi = {10.1109/TCAD.2019.2953948},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YouHPLC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuCHQW20,
author = {Qi Yu and
Bruce R. Childers and
Libo Huang and
Cheng Qian and
Zhiying Wang},
title = {{HPE:} Hierarchical Page Eviction Policy for Unified Memory in GPUs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2461--2474},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944790},
doi = {10.1109/TCAD.2019.2944790},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuCHQW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuDZHJ20,
author = {Feng Yu and
Raj Gautam Dutta and
Teng Zhang and
Yaodan Hu and
Yier Jin},
title = {Fast Attack-Resilient Distributed State Estimator for Cyber-Physical
Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3555--3565},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013072},
doi = {10.1109/TCAD.2020.3013072},
timestamp = {Tue, 22 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YuDZHJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuECR20,
author = {Xiaofan Yu and
Kazim Ergun and
Ludmila Cherkasova and
Tajana Simunic Rosing},
title = {Optimizing Sensor Deployment and Maintenance Costs for Large-Scale
Environmental Monitoring},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3918--3930},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012232},
doi = {10.1109/TCAD.2020.3012232},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/YuECR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuFP20,
author = {Yang Yu and
Xu Fang and
Xiyuan Peng},
title = {A Post-Bond {TSV} Test Method Based on {RGC} Parameters Measurement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {506--519},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887051},
doi = {10.1109/TCAD.2018.2887051},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuFP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YuRLW20,
author = {Liting Yu and
Jianguo Ren and
Xian Lu and
Xiaoxiao Wang},
title = {{NBTI} and {HCI} Aging Prediction and Reliability Screening During
Production Test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {3000--3011},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2961329},
doi = {10.1109/TCAD.2019.2961329},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YuRLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZancoGBS20,
author = {Alessandro Zanco and
Stefano Grivet{-}Talocia and
Tommaso Bradde and
Marco De Stefano},
title = {Enforcing Passivity of Parameterized {LTI} Macromodels via Hamiltonian-Driven
Multivariate Adaptive Sampling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {1},
pages = {225--238},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2883962},
doi = {10.1109/TCAD.2018.2883962},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZancoGBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZargariDASTK20,
author = {Amir Hosein Afandizadeh Zargari and
Manik Dautta and
Marzieh Ashrafiamiri and
Minjun Seo and
Peter Tseng and
Fadi J. Kurdahi},
title = {{NEWERTRACK:} ML-Based Accurate Tracking of In-Mouth Nutrient Sensors
Position Using Spectrum-Wide Information},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3833--3841},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013074},
doi = {10.1109/TCAD.2020.3013074},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZargariDASTK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangAH20,
author = {Zhenya Zhang and
Paolo Arcaini and
Ichiro Hasuo},
title = {Hybrid System Falsification Under (In)equality Constraints via Search
Space Transformation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3674--3685},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3013073},
doi = {10.1109/TCAD.2020.3013073},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangAH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangCPRLEJ20,
author = {Ying Zhang and
Krishnendu Chakrabarty and
Zebo Peng and
Ahmed Rezine and
Huawei Li and
Petru Eles and
Jianhui Jiang},
title = {Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order
Superscalar Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {3},
pages = {714--727},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2890695},
doi = {10.1109/TCAD.2018.2890695},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangCPRLEJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangGJTLJ20,
author = {Wei Zhang and
Nan Guan and
Lei Ju and
Yue Tang and
Weichen Liu and
Zhiping Jia},
title = {Scope-Aware Useful Cache Block Calculation for Cache-Related Pre-Emption
Delay Analysis With Set-Associative Data Caches},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2333--2346},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2937807},
doi = {10.1109/TCAD.2019.2937807},
timestamp = {Tue, 07 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhangGJTLJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangLLYPBSS20,
author = {Grace Li Zhang and
Bing Li and
Meng Li and
Bei Yu and
David Z. Pan and
Michaela Brunner and
Georg Sigl and
Ulf Schlichtmann},
title = {TimingCamouflage+: Netlist Security Enhancement With Unconventional
Timing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4482--4495},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2974338},
doi = {10.1109/TCAD.2020.2974338},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangLLYPBSS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangMHTBK20,
author = {Lu Zhang and
Dejun Mu and
Wei Hu and
Yu Tai and
Jeremy Blackstone and
Ryan Kastner},
title = {Memory-Based High-Level Synthesis Optimizations Security Exploration
on the Power Side-Channel},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2124--2137},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2950380},
doi = {10.1109/TCAD.2019.2950380},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangMHTBK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangSJS20,
author = {Zhiyong Zhang and
Zhaoyan Shen and
Zhiping Jia and
Zili Shao},
title = {UniBuffer: Optimizing Journaling Overhead With Unified {DRAM} and
{NVM} Hybrid Buffer Cache},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {9},
pages = {1792--1805},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2925366},
doi = {10.1109/TCAD.2019.2925366},
timestamp = {Thu, 02 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhangSJS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangTS20,
author = {Jinghan Zhang and
Hamed Tabkhi and
Gunar Schirner},
title = {Allocating One Common ACC-Rich Platform for Many Streaming Applications},
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number = {12},
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bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangUFE20,
author = {Baogang Zhang and
Necati Uysal and
Deliang Fan and
Rickard Ewetz},
title = {Handling Stuck-at-Fault Defects Using Matrix Transformation for Robust
Inference of DNNs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
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pages = {2448--2460},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2944582},
doi = {10.1109/TCAD.2019.2944582},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhangUFE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhangX20,
author = {Qian Zhang and
Qiang Xu},
title = {ApproxIt: {A} Quality Management Framework of Approximate Computing
for Iterative Methods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {5},
pages = {991--1002},
year = {2020},
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biburl = {https://dblp.org/rec/journals/tcad/ZhangX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhaoFSZLH20,
author = {Jieru Zhao and
Liang Feng and
Sharad Sinha and
Wei Zhang and
Yun Liang and
Bingsheng He},
title = {Performance Modeling and Directives Optimization for High-Level Synthesis
on {FPGA}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {7},
pages = {1428--1441},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2912916},
doi = {10.1109/TCAD.2019.2912916},
timestamp = {Tue, 05 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoFSZLH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/tcad/ZhaoZ20,
author = {Zhenxin Zhao and
Lihong Zhang},
title = {An Automated Topology Synthesis Framework for Analog Integrated Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4325--4337},
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url = {https://doi.org/10.1109/TCAD.2020.2977605},
doi = {10.1109/TCAD.2020.2977605},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhengXHZX20,
author = {Xin Zheng and
Chongyao Xu and
Xianghong Hu and
Yun Zhang and
Xiaoming Xiong},
title = {The Software/Hardware Co-Design and Implementation of {SM2/3/4} Encryption/Decryption
and Digital Signature System},
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volume = {39},
number = {10},
pages = {2055--2066},
year = {2020},
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timestamp = {Fri, 17 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhengXHZX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhengZOTLWY20,
author = {Shixuan Zheng and
Xianjue Zhang and
Daoli Ou and
Shibin Tang and
Leibo Liu and
Shaojun Wei and
Shouyi Yin},
title = {Efficient Scheduling of Irregular Network Structures on {CNN} Accelerators},
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number = {11},
pages = {3408--3419},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3012215},
doi = {10.1109/TCAD.2020.3012215},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhengZOTLWY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhongC20,
author = {Zhanwei Zhong and
Krishnendu Chakrabarty},
title = {IJTAG-Based Fault Recovery and Robust Microelectrode-Cell Design for
{MEDA} Biochips},
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volume = {39},
number = {12},
pages = {4921--4934},
year = {2020},
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doi = {10.1109/TCAD.2020.2986741},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhongC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouFXH20,
author = {Zimeng Zhou and
Chenchen Fu and
Chun Jason Xue and
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title = {Energy-Constrained Data Freshness Optimization in Self-Powered Networked
Embedded Systems},
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number = {10},
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doi = {10.1109/TCAD.2019.2948905},
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biburl = {https://dblp.org/rec/journals/tcad/ZhouFXH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouGDLCLLZTFZC20,
author = {Shengyuan Zhou and
Qi Guo and
Zidong Du and
Dao{-}Fu Liu and
Tianshi Chen and
Ling Li and
Shaoli Liu and
Jinhong Zhou and
Olivier Temam and
Xiaobing Feng and
Xuehai Zhou and
Yunji Chen},
title = {ParaML: {A} Polyvalent Multicore Accelerator for Machine Learning},
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volume = {39},
number = {9},
pages = {1764--1777},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2927523},
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timestamp = {Mon, 13 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhouGDLCLLZTFZC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouLF20,
author = {Xiangzhen Zhou and
Sanjiang Li and
Yuan Feng},
title = {Quantum Circuit Transformation Based on Simulated Annealing and Heuristic
Search},
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volume = {39},
number = {12},
pages = {4683--4694},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2969647},
doi = {10.1109/TCAD.2020.2969647},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhouLF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhouPWYQT20,
author = {Minxuan Zhou and
Andreas Prodromou and
Rui Wang and
Hailong Yang and
Depei Qian and
Dean M. Tullsen},
title = {Temperature-Aware {DRAM} Cache Management - Relaxing Thermal Constraints
in 3-D Systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {1973--1986},
year = {2020},
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doi = {10.1109/TCAD.2019.2927528},
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biburl = {https://dblp.org/rec/journals/tcad/ZhouPWYQT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuCZC20,
author = {Ziran Zhu and
Jianli Chen and
Wenxing Zhu and
Yao{-}Wen Chang},
title = {Mixed-Cell-Height Legalization Considering Technology and Region Constraints},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5128--5141},
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timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhuCZC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuGC20,
author = {Pengcheng Zhu and
Zhijin Guan and
Xueyun Cheng},
title = {A Dynamic Look-Ahead Heuristic for the Qubit Mapping Problem of {NISQ}
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number = {12},
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biburl = {https://dblp.org/rec/journals/tcad/ZhuGC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuHLHWYWS20,
author = {Ying Zhu and
Xing Huang and
Bing Li and
Tsung{-}Yi Ho and
Qin Wang and
Hailong Yao and
Robert Wille and
Ulf Schlichtmann},
title = {Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic
Biochips},
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number = {10},
pages = {2489--2502},
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timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhuHLHWYWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuSZZZLWCD20,
author = {Jingchen Zhu and
Guangyu Sun and
Xian Zhang and
Chao Zhang and
Weiqi Zhang and
Yun Liang and
Tao Wang and
Yiran Chen and
Jia Di},
title = {Fork Path: Batching {ORAM} Requests to Remove Redundant Memory Accesses},
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number = {10},
pages = {2279--2292},
year = {2020},
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biburl = {https://dblp.org/rec/journals/tcad/ZhuSZZZLWCD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuZCS20,
author = {Zuomin Zhu and
Wei Zhang and
Vivek Chaturvedi and
Amit Kumar Singh},
title = {Energy Minimization for Multicore Platforms Through {DVFS} and {VR}
Phase Scaling With Comprehensive Convex Model},
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number = {3},
pages = {686--699},
year = {2020},
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biburl = {https://dblp.org/rec/journals/tcad/ZhuZCS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuoLGHS20,
author = {Cheng Zhuo and
Shaoheng Luo and
Houle Gan and
Jiang Hu and
Zhiguo Shi},
title = {Noise-Aware {DVFS} for Efficient Transitions on Battery-Powered IoT
Devices},
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number = {7},
pages = {1498--1510},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2917844},
doi = {10.1109/TCAD.2019.2917844},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhuoLGHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZouLHZGRZ20,
author = {An Zou and
Jingwen Leng and
Xin He and
Yazhou Zu and
Christopher D. Gill and
Vijay Janapa Reddi and
Xuan Zhang},
title = {Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and
Power Management},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {5142--5155},
year = {2020},
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doi = {10.1109/TCAD.2020.2969607},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZouLHZGRZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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