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@inproceedings{DBLP:conf/mtv/ChenDHJG19,
  author       = {Kejun Chen and
                  Qingxu Deng and
                  Yumin Hou and
                  Yier Jin and
                  Xiaolong Guo},
  title        = {Hardware and Software Co-Verification from Security Perspective},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {50--55},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00018},
  doi          = {10.1109/MTV48867.2019.00018},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/ChenDHJG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ChupilkoKP19,
  author       = {Mikhail M. Chupilko and
                  Alexander Kamkin and
                  Alexander Protsenko},
  title        = {Open-Source Validation Suite for {RISC-V}},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {7--12},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00010},
  doi          = {10.1109/MTV48867.2019.00010},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/ChupilkoKP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/GhoshR19,
  author       = {Prokash Ghosh and
                  Rohit Srivastava},
  title        = {Case Study: SoC Performance Verification and Static Verification of
                  {RTL} Parameters},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {65--72},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00021},
  doi          = {10.1109/MTV48867.2019.00021},
  timestamp    = {Fri, 10 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/GhoshR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/HosnyB19,
  author       = {Sherif Hosny and
                  Amr Baher},
  title        = {Design Crawler: {A} Web Application for Digital Design Metadata Analysis},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {31--34},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00014},
  doi          = {10.1109/MTV48867.2019.00014},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/HosnyB19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/JungPK19,
  author       = {Jinsae Jung and
                  Jaeun Park and
                  Apurva Kumar},
  title        = {A Verification Framework of Neural Processing Unit for Super Resolution},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {13--17},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00011},
  doi          = {10.1109/MTV48867.2019.00011},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/JungPK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MaparaJ19,
  author       = {Chetas Mapara and
                  Jerrin Jose},
  title        = {Automated Test Picker for Complex Microprocessor Verification Environment},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {62--64},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00020},
  doi          = {10.1109/MTV48867.2019.00020},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MaparaJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/MenonGPKTMRKPP19,
  author       = {Sankaran M. Menon and
                  Ashish Gupta and
                  Chinna Prudvi and
                  Rolf K{\"{u}}hnis and
                  Sukhbinder Singh Takhar and
                  Spencer K. Millican and
                  Eric Rentschler and
                  Pandy Kalimuthu and
                  Preeti Ranjan Panda and
                  Priyadarsan Patra},
  title        = {Techniques for Debug of Low Power SoCs},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {45--49},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00017},
  doi          = {10.1109/MTV48867.2019.00017},
  timestamp    = {Sat, 05 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/MenonGPKTMRKPP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/RahmanA19,
  author       = {Mir Tanjidur Rahman and
                  Navid Asadizanjani},
  title        = {Backside Security Assessment of Modern SoCs},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {18--24},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00012},
  doi          = {10.1109/MTV48867.2019.00012},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/RahmanA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ReddyM19,
  author       = {Gaurav Rajavendra Reddy and
                  Yiorgos Makris},
  title        = {Design Space Exploration for Hotspot Detection},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {73--77},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00022},
  doi          = {10.1109/MTV48867.2019.00022},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/ReddyM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/RuospoS19,
  author       = {Annachiara Ruospo and
                  Ernesto S{\'{a}}nchez},
  title        = {On the Detection of Always-On Hardware Trojans Supported by a Pre-Silicon
                  Verification Methodology},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {25--30},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00013},
  doi          = {10.1109/MTV48867.2019.00013},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtv/RuospoS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/Savla19,
  author       = {Jigar Savla},
  title        = {Smarter Disk Space Management for Silicon Workflows},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {35--40},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00015},
  doi          = {10.1109/MTV48867.2019.00015},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/Savla19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/ScottSS19,
  author       = {Jeff Scott and
                  Jonathan Sadowsky and
                  Jigar Savla},
  title        = {RamGen: Moving Memories from Physical to the Logical Domain},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {41--44},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00016},
  doi          = {10.1109/MTV48867.2019.00016},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/ScottSS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/SiddiquiSJGPDS19,
  author       = {Ali Shuja Siddiqui and
                  Geraldine Shirley and
                  Sam Reji Joseph and
                  Yutian Gui and
                  Jim Plusquellic and
                  Marten van Dijk and
                  Fareena Saqib},
  title        = {Multilayer Camouflaged Secure Boot for SoCs},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {56--61},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00019},
  doi          = {10.1109/MTV48867.2019.00019},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/SiddiquiSJGPDS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtv/WahbaHR19,
  author       = {Ahmed Wahba and
                  Justin Hohnerlein and
                  Farhan Rahman},
  title        = {Expediting Design Bug Discovery in Regressions of x86 Processors Using
                  Machine Learning},
  booktitle    = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MTV48867.2019.00009},
  doi          = {10.1109/MTV48867.2019.00009},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/WahbaHR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/mtv/2019,
  title        = {20th International Workshop on Microprocessor/SoC Test, Security and
                  Verification, {MTV} 2019, Austin, TX, USA, December 9-10, 2019},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://ieeexplore.ieee.org/xpl/conhome/9022742/proceeding},
  isbn         = {978-1-7281-5025-3},
  timestamp    = {Tue, 21 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/mtv/2019.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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