Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSearch dblp for Publications
export results for "toc:db/conf/iscas/iscas1993-3.bht:"
download as .bib file
@inproceedings{DBLP:conf/iscas/AdamsK93,
author = {Robert Adams and
Tom Kwan},
title = {A Monolithic Asynchronous Sample-Rate Converter for Digital Audio},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1963--1966},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 03 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AdamsK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AliZ93,
author = {Hazem H. Ali and
Mona E. Zaghloul},
title = {{VLSI} Implementation of an Associative Memory Using Temporal Relations},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1877--1880},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AliZ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlpertCKRS93,
author = {Charles J. Alpert and
Jason Cong and
Andrew B. Kahng and
Gabriel Robins and
Majid Sarrafzadeh},
title = {Minimum Density Interconneciton Trees},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1865--1868},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AlpertCKRS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AlpertHHK93,
author = {Charles J. Alpert and
T. C. Hu and
Jen{-}Hsin Huang and
Andrew B. Kahng},
title = {A Direct Combination of the Prim and Dijkstra Constructions for Improved
Performance-driven Global Routing},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1869--1872},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AlpertHHK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AmellalK93,
author = {Said Amellal and
Bozena Kaminska},
title = {Scheduling of a Control and Data Flow Graph},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1666--1669},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AmellalK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AntonDM93,
author = {Oskar Anton and
Karol Doerffer and
Dieter A. Mlynski},
title = {Automatic Design of Transparent Standard Cells with {TRANSCAD} {II}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1853--1856},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AntonDM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AreibiV93,
author = {Shawki Areibi and
Anthony Vannelli},
title = {Circuit Partitioning Using a Tabu Search Approach},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1643--1646},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AreibiV93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AvedilloQH93,
author = {Maria J. Avedillo and
Jos{\'{e}} M. Quintana and
Jos{\'{e}} L. Huertas},
title = {Easily Testable PLA-based {FSMS}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1603--1606},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AvedilloQH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BellidoVAABHD93,
author = {Manuel J. Bellido and
Manuel Valencia{-}Barrero and
Antonio J. Acosta and
Angel Barriga and
Jos{\'{e}} Luis Huertas and
Rafael Dom{\'{\i}}nguez{-}Castro},
title = {A New Faster Method for Calculating the Resolution Coefficient of
{CMOS} Latches: Design of an Optimum Latch},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2019--2022},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BellidoVAABHD93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BhingardePS93,
author = {Siddharth Bhingarde and
Anand Panyam and
Naveed A. Sherwani},
title = {Efficient Over-the-cell Routing Algorithm for General Middle Terminal
Model},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1861--1864},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BhingardePS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BieyBM93,
author = {Domenico Biey and
Mario Biey and
Maurizio Molinaro},
title = {{SCANSA:} {A} Computer Program for the Statistical Analysis of Switched
Capacitor Networks},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2141--2144},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BieyBM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BoutillonD93,
author = {Emmanuel Boutillon and
Nicolas Demassieux},
title = {A Generalized Precompiling scheme for Surviving Path Memory Management
in Viterbi decoders},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1579--1582},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BoutillonD93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BrauerK93,
author = {Elizabeth J. Brauer and
Sung{-}Mo Kang},
title = {Functional Verification of {ECL} Circuits Including Voltage Regulators},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1710--1713},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BrauerK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BuonannoFS93,
author = {Giacomo Buonanno and
Franco Fummi and
Donatella Sciuto},
title = {Functional Testing and Constrained Synthesis of Sequential Architectures},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1523--1526},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/BuonannoFS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CampbellC93,
author = {Scott T. Campbell and
Soon Myoung Chung},
title = {Video Decimator Design Using {A} Systolic Array},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1726--1729},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CampbellC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChanTKC93,
author = {S. C. Chan and
Chi{-}Wah Kok and
S. W. Chau},
title = {Codebook Generation and Search Algorithm for Vector Quantization Using
Arbitrary Hyperplanes},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1885--1888},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChanTKC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangCY93,
author = {Mi{-}Chang Chang and
Jue{-}Hsien Chern and
Ping Yang},
title = {Efficient and Robust Path Tracing Algorithm for {DC} Convergence Problem},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1635--1638},
publisher = {{IEEE}},
year = {1993},
timestamp = {Thu, 20 Oct 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChangCY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangH93,
author = {Ray{-}I Chang and
Pei{-}Yung Hsiao},
title = {Arbitrarily Sized Cell Placement by Self-organizing Neural Networks},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2043--2046},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChangH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChangS93,
author = {Chiyuan Chang and
Chauchin Su},
title = {A Universal {BIST} Methodology for Interconnects},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1615--1618},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChangS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChavezAT93,
author = {Jorge Ch{\'{a}}vez Orz{\'{a}}ez and
Miguel Angel Aguirre Ech{\'{a}}nove and
Antonio Jes{\'{u}}s Torralba Silgado},
title = {Analog Design Optimization : {A} Case Study},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2083--2085},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChavezAT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenC93a,
author = {Richard M. M. Chen and
Wilson W. Chan},
title = {An Efficient Tolerance Design Procedure for Yield Maximization Using
Optimzation Techniques and Neural Network},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1793--1796},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenC93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenJ93,
author = {Richard M. M. Chen and
Xing Dong Jia},
title = {A Technique to Improve the Convergency Speed of Relaxation-based Simulations
in Tightly Coupled Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2133--2136},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenS93,
author = {Jian Chen and
M. A. Styblinski},
title = {A Systematic Approach of Statistical Modeling and Its Application
to {CMOS} Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1805--1808},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenT93b,
author = {Cheng{-}Hsi Chen and
Ioannis G. Tollis},
title = {A Fast Parallel Algorithm for Slicing Floorplans},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1774--1777},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenT93b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenWW93,
author = {Yao{-}Ping Chen and
Ting{-}Chi Wang and
D. F. Wong},
title = {A Graph Partitioning Problem for Multiple-chip Design},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1778--1781},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenWW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CherkauerF93,
author = {Brian S. Cherkauer and
Eby G. Friedman},
title = {The Effects of Channel Width Tapering on the Power Dissipation of
Serially Connected MOSFETs},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2110--2113},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CherkauerF93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChishtiCR93,
author = {Fida H. Chishti and
Anthony R. Clare and
Moe Razaz},
title = {Parallel Solution of Symmetric Banded Systems on Transputers},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1949--1952},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChishtiCR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChoK93,
author = {Dae{-}Hyung Cho and
S. M. Kang},
title = {An Accurate {AC} Characteristic Table Look-up Model for {VLSI} Analog
Circuits Simulation Applications},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1531--1534},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChoK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChoiPKKL93,
author = {Chang{-}hoon Choi and
Jin{-}Kyu Park and
Yeong{-}Gil Kim and
Kyung{-}Ho Kim and
Sang{-}Hoon Lee},
title = {New Model Parameter Extraction Environment for the Submicron Circuit
Models},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1535--1538},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChoiPKKL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChoyS93,
author = {Clifford Sze{-}Tsan Choy and
Wan{-}Chi Siu},
title = {Generation of Chain-coded Contours and Contours Inclusion Relationship
Under Multiprocessor Environment},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1909--1912},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChoyS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Chrzanowska-JeskeGS93,
author = {Malgorzata Chrzanowska{-}Jeske and
Steffen Goller and
Ingo Sch{\"{a}}fer},
title = {An Architecture-driven Approach for the Fitting Problem in an Application-specific
{EPLD}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1782--1785},
publisher = {{IEEE}},
year = {1993},
timestamp = {Tue, 08 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Chrzanowska-JeskeGS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Chu93,
author = {Tam Anh Chu},
title = {On the Specification and Synthesis of Hazard-free Asynchronous Control
Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1495--1498},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Chu93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChuangH93,
author = {Weitong Chuang and
Ibrahim N. Hajj},
title = {Fast Mixed-Mode Simulation for Accurate {MOS} Bridging Fault Detection},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1503--1506},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChuangH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChungHP93,
author = {Pi{-}Yu Chung and
Ibrahim N. Hajj and
Janak H. Patel},
title = {Efficient Variable Ordering Heuristics for Shared {ROBDD}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1690--1693},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChungHP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CurrentPH93,
author = {K. Wayne Current and
James F. Parker and
Wes Hardaker},
title = {Block-Diagram-Level Design Capture, Functional Simulation, and Layout
Assembly of Analog {CMOS} ICs},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2090--2093},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 03 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/CurrentPH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Dmytryshyn93,
author = {Roman V. Dmytryshyn},
title = {The Use of Symbolic-numerical Methods for Electronic Circuit Analysis},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1655--1657},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Dmytryshyn93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DoerfferAM93,
author = {Karol Doerffer and
Oskar Anton and
Dieter A. Mlynski},
title = {Time Efficient Method for {MOS} Circuit Extraction},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1983--1986},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DoerfferAM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/DoerfferTAM93,
author = {Karol Doerffer and
Attila T. T{\'{e}}by and
Oskar Anton and
Dieter A. Mlynski},
title = {KLaGen - {A} Generator of Static CMOS-cell Layout from Circuit Schematics},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1845--1848},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/DoerfferTAM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/EdirisooriyaER93,
author = {Geetani Edirisooriya and
Samantha Edirisooriya and
John P. Robinson},
title = {On the Performance of Augmented Signature Testing},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1607--1610},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/EdirisooriyaER93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/EmbabiDBR93,
author = {Sherif H. K. Embabi and
R. Damodaran and
R. Bhagwan and
Don E. Ross},
title = {An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1539--1542},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/EmbabiDBR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/EsonuAR93,
author = {Michael Ogbonna Esonu and
Dhamin Al{-}Khalili and
C{\^{o}}me Rozon},
title = {Fault Characterization and Testability Analysis of Emitter Coupled
Logic and Comparison with {CMOS} {\&} BiCMOS Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1714--1717},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 20 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/EsonuAR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Falkowski93a,
author = {Bogdan J. Falkowski},
title = {An Algorithm for the Calculation of Generalized Walsh Transform of
Boolean Functions},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1694--1697},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Falkowski93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Falkowski93b,
author = {Bogdan J. Falkowski},
title = {Calculation of Rademacher-Walsh Spectral Coefficients for Systems
of Completely and Incompletely Specified Boolean Functions},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1698--1701},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Falkowski93b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FeyginCGCGHSSSW93,
author = {Gennady Feygin and
Paul Chow and
P. Glenn Gulak and
John Chappel and
Grant Goodes and
Oswin Hall and
Ahmad Sayes and
Satwant Singh and
Michael B. Smith and
Steven J. E. Wilton},
title = {A {VLSI} Implementation of a Cascade Viterbi Decoder with Traceback},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1945--1948},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FeyginCGCGHSSSW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FleurkensB93,
author = {Hans Fleurkens and
Pim H. W. Buurman},
title = {Flexible Mixed-mode and Mixed-level Simulation},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2137--2140},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/FleurkensB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Freier93,
author = {Bernd E. Freier},
title = {Reducing the Physical Design Cycle by Means of Topological Placement
with Hard Timing Restraints},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2063--2066},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Freier93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Friedman93,
author = {Eby G. Friedman},
title = {Clock Distribution Design in {VLSI} Circuits. An Overview},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1475--1478},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Friedman93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GaedkeFP93,
author = {Klaus Gaedke and
Jens Franzen and
Peter Pirsch},
title = {A Fault-tolerant DCT-Architecture Based on Distributed Arithmetic},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1583--1586},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GaedkeFP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GaoZ93,
author = {D. S. Gao and
Dian Zhou},
title = {Propagation Delay in {RLC} Interconnection Networks},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2125--2128},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GaoZ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GoharC93,
author = {Nasir{-}ud{-}Din Gohar and
Peter Y. K. Cheung},
title = {A New Schematic-driven Floorplanning Algorithm for Analog Cell Layout},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1770--1773},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GoharC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GriffithZN93,
author = {J. Richard Griffith and
Qi{-}Jun Zhang and
Michel S. Nakhla},
title = {Parallel Time Domain Analysis and Optimization of Distributed {VLSI}
Interconnects},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1543--1546},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GriffithZN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GuoLJ93,
author = {Jiun{-}In Guo and
Chi{-}Min Liu and
Chein{-}Wei Jen},
title = {A CORDIC-based {VLSI} Array for Computing 2-D Discrete Hartley Transform},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1571--1574},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GuoLJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HamidaKS93,
author = {Naim Ben{-}Hamida and
Bozena Kaminska and
Yvon Savaria},
title = {Initiability: {A} Measure of Sequential Testability},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1619--1622},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HamidaKS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Harris-DowsettS93,
author = {D. K. Harris{-}Dowsett and
S. Summerfield},
title = {Low Latency Architectures for Wave Digital Filters},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1881--1884},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Harris-DowsettS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HarrisO93,
author = {Ian G. Harris and
Alex Orailoglu},
title = {Intertwined Scheduling, Module Selection and Allocation in Time-and-Area},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1682--1685},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HarrisO93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HassounA93,
author = {Marwan Hassoun and
Prakash Atawale},
title = {Hierarchical Symbolic Cirucit Analysis of Large-scale Networks on
Multi-processor Systems},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1651--1654},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HassounA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Hoffmann93,
author = {Achim G. Hoffmann},
title = {A New Strategy for Library-independent Layout Design},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2055--2058},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Hoffmann93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Horvath93,
author = {E. I. Horvath},
title = {A Parallel Force Direct Based {VLSI} Standard Cell Placement Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2071--2074},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Horvath93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HossainWA93,
author = {Razak Hossain and
Leszek D. Wronski and
Alexander Albicki},
title = {Double Edge Triggered Devices: Speed and Power Considerations},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1491--1494},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HossainWA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HsiaoCCC93,
author = {Jue{-}Hsuan Hsiao and
Liang{-}Gee Chen and
Tzi{-}Dar Chiueh and
Chun{-}Te Chen},
title = {Novel Systolic Array Design for the Discrete Hartley Transform with
High Throughput Rate},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1567--1570},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HsiaoCCC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuM93,
author = {Yu Hen Hu and
Chi{-}Yu Mao},
title = {Solving Gate-Matrix Layout Problems by Simulated Evolution},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1873--1876},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HuangW93,
author = {Hong{-}Yi Huang and
Chung{-}Yu Wu},
title = {Redundant Algebra and Integrated Circuit Implementation of Ternary
Logic and Their Applications},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1905--1908},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/HuangW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IslamT93,
author = {Farhad Fuad Islam and
Keikichi Tamaru},
title = {An Architecture for Intermediate Area-time Complexity Multiplier},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1825--1828},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IslamT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/IwataKH93,
author = {Yasushi Iwata and
Masayuki Kawamata and
Tatsuo Higuchi},
title = {Design of Fine Grain {VLSI} Array Processor for Real-time 2-D Digital
Filtering},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1559--1562},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/IwataKH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JamoussiK93,
author = {Mohamed Jamoussi and
Bozena Kaminska},
title = {A Functional-level Testability Evaluation Using a New M-Testability},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1611--1614},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JamoussiK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JunJPKKLJKL93,
author = {Young{-}Hyun Jun and
Weon{-}Hwa Jeong and
Jong{-}Hoon Park and
Tae{-}Hoon Kim and
Seong{-}Wook Kim and
Jae{-}Sik Lee and
Seong{-}Jin Jang and
Chang{-}Man Khang and
Hee{-}Gook Lee},
title = {A New Colum Redundancy Scheme For Fast Access Time of 64-Mb {DRAM}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1937--1940},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JunJPKKLJKL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KanekoMH93,
author = {Mineo Kaneko and
Masahiro Masuda and
Tomohiro Hayashi},
title = {A Novel Capacitor Placement Strategy in {ASCCOT:} Automatic Layouter
for Switched Capacitor Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2094--2097},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KanekoMH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Kawaguchi93,
author = {Tsuyoshi Kawaguchi},
title = {Static Allocation of a Task Tree onto a Linear Array},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1921--1924},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Kawaguchi93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KhaliHS93,
author = {Hakim Khali and
Jean{-}Louis Houle and
Yvon Savaria},
title = {A High Speed Parallel Structure for the Basic Wavelet Transform Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1971--1974},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KhaliHS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimLKL93,
author = {Yeong{-}Gil Kim and
Jai{-}Hoon Lee and
Kyung{-}Ho Kim and
Sang{-}Hoon Lee},
title = {{SENSATION:} {A} New Environment for Automatic Circuit Optimization
and Statistical Analysis},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1797--1801},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimLKL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimSKHKL93,
author = {Chan S. Kim and
Sang W. Song and
Man Y. Kim and
Young T. Han and
Sang A. Kang and
Bang W. Lee},
title = {200 Mega Pixel Rate {IDCT} Processor for {HDTVC} Applications},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2003--2006},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimSKHKL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KimSS93,
author = {Seon Wook Kim and
Thanos Stouraitis and
Alexander Skavantzos},
title = {Full Adder-based Inner Product Step Processors for Residue and Quadratic
Residue Number Systems},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1821--1824},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KimSS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KochM93,
author = {Bernd K. Koch and
Klaus D. M{\"{u}}ller{-}Glaser},
title = {An Examination of Feedback Bridging Faults in Digital {CMOS} Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1527--1530},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KochM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KumarBTLK93,
author = {H. Kumar and
Magdy A. Bayoumi and
Akhilesh Tyagi and
Nam Ling and
R. Kalyan},
title = {Parallel Implementation of a Cut and Paste Maze Routing Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2035--2038},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KumarBTLK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KuoCH93,
author = {James B. Kuo and
Hung{-}Pin Chen and
H. J. Huang},
title = {A BiCMOS Dynamic Divider Circuit Using a Restoring Iterative Architecture
with Carry Look Ahead for {CPU} {VLSI}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2027--2030},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KuoCH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KuoL93a,
author = {Jar{-}Shone Ker and
Yau{-}Hwang Kuo and
Bin{-}Da Liu},
title = {Functional Text Pattern Generation for Asynchronous Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1519--1522},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KuoL93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KuznetsovS93,
author = {Dimitri Kuznetsov and
Jos{\'{e}} E. Schutt{-}Ain{\'{e}}},
title = {Difference Model Approach for the Transient Simulation of Transmission
Lines},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1547--1550},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KuznetsovS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lam93,
author = {Stephen P. S. Lam},
title = {A New Approach to Reconfigure Faulty Systolic Array},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1929--1932},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Lam93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeCLL93,
author = {Moon Key Lee and
Byeong Yoon Choi and
Kwang Yub Lee and
Seong Ho Lee},
title = {Data-stationary Controller for 32-bit Application-specific {RISC}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1933--1936},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeeCLL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeS93a,
author = {Soo Young Lee and
Kewal K. Saluja},
title = {Efficient Test Vectors for {ISCAS} Sequential Benchmark Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1511--1514},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeeS93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LeeWC93,
author = {Eel{-}Wan Lee and
Jae{-}Hee Won and
Soo{-}Ik Chae},
title = {Modified Probabilistic {RAM} Archticture for {VLSI} Implementation
of a Backpropagation Learning Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1897--1900},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LeeWC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Lei93,
author = {Shawmin Lei},
title = {Finite Word-length Effects on Arithmetic Codes},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1889--1892},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Lei93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LejmiKW93,
author = {Samir Lejmi and
Bozena Kaminska and
Edouard Wagneur},
title = {Resynthesis and Retiming of Synchronous Sequential Cirucits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1674--1677},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LejmiKW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LemaitreP93,
author = {Laurent Lemaitre and
Marek J. Patyra},
title = {Fuzzy Logic Functions Synthesis - {A} {CMOS} Current Mirror Based
Solution},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2015--2018},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LemaitreP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LetellierJBR93,
author = {Laurent Letellier and
Didier Juvin and
Jean{-}Luc Basille and
Jean Rebillat},
title = {High Performance Graphics on a {SIMD} Linear Processor Array},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1901--1904},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LetellierJBR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiberaliMP93,
author = {Valentino Liberali and
Enrico Malavasi and
Davide Pandini},
title = {Automatic Generation of Transistor Stacks for {CMOS} Analog Layout},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2098--2102},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiberaliMP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinGSJ93,
author = {Yu{-}Sheng Lin and
Jiun{-}In Guo and
C. Bernard Shung and
Chein{-}Wei Jen},
title = {A Multi-phase Shared Bus Structure for the Fast Fourier Transform},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1575--1578},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LinGSJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LinZ93,
author = {Perng{-}Shyong Lin and
Charles A. Zukowski},
title = {Jitter Due to Signal History in Digital Logic Circuits and Its Control
Strategies},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2114--2117},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LinZ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LioyP93,
author = {Antonio Lioy and
Massimo Poncino},
title = {On the Resetability of Synchronous Sequential Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1507--1510},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LioyP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuF93,
author = {Xiaqi Liu and
Hong Fan},
title = {A Spatial Schur Type {LS} Algorithm and Its Pyramid Systolic Array
Implementation},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1722--1725},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuF93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuW93a,
author = {K. J. Ray Liu and
An{-}Yeu Wu},
title = {A Multi-layer 2-D Adaptive Filtering Architecture Based on McClellan
Transformation},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1999--2002},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuW93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LoP93,
author = {K. C. Lo and
Alan Purvis},
title = {Parallel Random Sampling with Multiprocessor System},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1979--1982},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LoP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LosadaHR93,
author = {Carlos A. Losada and
David G. Haigh and
Paul M. Radmore},
title = {A Systematic Method for Nonlinear Analysis of a Class of {FET} Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2086--2089},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LosadaHR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MacielMT93,
author = {Frederico Buchholz Maciel and
Yoshikazu Miyanaga and
Koji Tochinai},
title = {A Performance-driven Approach to the High-level Synthesis of {DSP}
Algorithms},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1658--1661},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MacielMT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MaoCK93,
author = {Mark W. Mao and
B. Y. Chen and
James B. Kuo},
title = {A Coded Block Neural Network System Suitable for {VLSI} Implementation
Using an Adaptive Learning-rate Epoch-based Back Propagation Technique},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1967--1970},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MaoCK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MarinovN93,
author = {Corneliu A. Marinov and
Pekka Neittaanm{\"{a}}ki},
title = {Bounds for Distributed Parameter Trees},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1551--1554},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MarinovN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MatsumotoST93,
author = {Tadashi Matsumoto and
Tetsuya Sakabe and
Kohkichi Tsuji},
title = {On Parallel Symbolic Analysis of Large Networks and Systems},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1647--1650},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MatsumotoST93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MenonJM93,
author = {Sankaran M. Menon and
Anura P. Jayasumana and
Yashwant K. Malaiya},
title = {Test Generation for BiCMOS Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1987--1990},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MenonJM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MukundMN93,
author = {P. R. Mukund and
V. Mukund and
Charles E. Noon},
title = {Signal Routing with Temporal Constraints},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1479--1482},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MukundMN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Nagaraj93,
author = {N. S. Nagaraj},
title = {A New Optimizer for Performance Optimization of Integrated Circuits
by Device Sizing},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2102--2105},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Nagaraj93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NarkiewiczB93,
author = {J. David Narkiewicz and
Wayne P. Burleson},
title = {Rank-order Filtering Algorithms: {A} Comparison of {VLSI} Implementations},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1941--1944},
publisher = {{IEEE}},
year = {1993},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NarkiewiczB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NekiliS93,
author = {Mohamed Nekili and
Yvon Savaria},
title = {Parallel Regeneration of Interconnections in {VLSI} {\&} {ULSI}
Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2023--2026},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NekiliS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NikolaidisMG93,
author = {Spiridon Nikolaidis and
D. E. Metafas and
Constantinos E. Goutis},
title = {{CORDIC} Based Pipeline Architecture for All-pass Filters},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1917--1920},
publisher = {{IEEE}},
year = {1993},
timestamp = {Tue, 04 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/NikolaidisMG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PaliourasSS93,
author = {Vassilis Paliouras and
Dimitrios Soudris and
Thanos Stouraitis},
title = {Methodology for the Design of Signed-digit {DSP} Processors},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1833--1836},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PaliourasSS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ParhiN93,
author = {Keshab K. Parhi and
Takao Nishitani},
title = {Folded {VLSI} Architectures for Discrete Wavelet Transforms},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1734--1737},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ParhiN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ParkLKK93,
author = {Min C. Park and
Bang W. Lee and
Gwang Moon Kim and
Dong H. Kim},
title = {Compact and Fast Multiplier Using Dual Array Tree Structure},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1817--1820},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ParkLKK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PetersonM93,
author = {Lena Peterson and
Sven Mattisson},
title = {Dynamic Partitioning for Concurrent Waveform Relaxation-based Circuit
Simulation},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1639--1642},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PetersonM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PirschGH93,
author = {Peter Pirsch and
Winfried Gehrke and
Richard Hoffer},
title = {A Hierarchical Multiprocessor Achitecture for Video Coding Applications},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1750--1753},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PirschGH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PrasadKAHLF93,
author = {Sharat Prasad and
Paul Kollaritsch and
P. Anirudhan and
D. K. Hwang and
Steve Lusky and
R. Farrow},
title = {Efficient Floorplan Enumeration Using Dynamic Programming},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1766--1769},
publisher = {{IEEE}},
year = {1993},
timestamp = {Tue, 27 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PrasadKAHLF93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PuriG93,
author = {Ruchir Puri and
Jun Gu},
title = {Signal Transition Graph Constraints for Speed-independent Ciruit Synthesis},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1686--1689},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PuriG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/QiY93,
author = {Songxin Qi and
Quanrang Yang},
title = {An Improved Random Walk Approach for Yield Optimization},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2145--2147},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/QiY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Qiuting93a,
author = {Qiuting Huang},
title = {Speed Optimization of Edge-Triggered Nine-Transistor D-Flip-Flops
for Gigahertz Single-Phase Clocks},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2118--2121},
publisher = {{IEEE}},
year = {1993},
timestamp = {Thu, 09 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Qiuting93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/QuS93,
author = {Ming Qu and
M. A. Styblinski},
title = {A Heursitsic Global Optimization Algorithm and Its Application to
{CMOS} Circuit Variability Minimization},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1809--1812},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/QuS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RaghunathP93,
author = {Kalavai J. Raghunath and
Keshab K. Parhi},
title = {High Speed {RLS} Using Scaled Tangent Rotations {(STAR)}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1959--1962},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RaghunathP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RaiTS93,
author = {Suresh Rai and
Jerry L. Trahan and
Thomas Smailus},
title = {Processor Allocation in Faulty Hypercube Multiprocessors},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1995--1998},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RaiTS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RajeS93,
author = {Salil Raje and
Majid Sarrafzadeh},
title = {{GEM:} {A} Geometric Algorithm for Scheduling},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1991--1994},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RajeS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RamacherBBS93,
author = {Ulrich Ramacher and
J{\"{o}}rg Beichter and
Nico Br{\"{u}}ls and
Elisabeth Sicheneder},
title = {Architecture and {VLSI} Design of a {VLSI} Neural Signal Processor},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1975--1978},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RamacherBBS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Razaz93,
author = {M. Razaz},
title = {A Fuzzy C-means Clustering Placement Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2051--2054},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Razaz93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RhinehartN93,
author = {Michael R. Rhinehart and
John A. Nestor},
title = {{SALSE} {II:} {A} Fast Transformational Scheduler for High-level Synthesis},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1678--1681},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RhinehartN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RobertsonPP93,
author = {William Robertson and
S. Periyalwar and
William J. Phillips},
title = {{RTL} Synthesis for Systolic Arrays},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1670--1673},
publisher = {{IEEE}},
year = {1993},
timestamp = {Thu, 09 Jun 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RobertsonPP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RodriguesS93,
author = {B. R. S. Rodrigues and
M. A. Styblinski},
title = {Adaptive Hierarchical Multi-objective Fuzzy Optimization for Circuit
Design},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1813--1816},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RodriguesS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Roy93,
author = {Kaushik Roy},
title = {On Fault Modeling and Fault Tolerance of Antifuse Based FPGAs},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1623--1626},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 27 Jul 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Roy93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Sakurai93,
author = {Takayasu Sakurai},
title = {High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply
Voltage},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1487--1490},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Sakurai93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SapatnekarVK93,
author = {Sachin S. Sapatnekar and
Pravin M. Vaidya and
Sung{-}Mo Kang},
title = {Feasible Region Approximation Using Convex Polytopes},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1786--1789},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SapatnekarVK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SauerBN93,
author = {Matthias Sauer and
Ernst G. Bernard and
Josef A. Nossek},
title = {Block Sequential {CORDIC} Architectures},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1591--1594},
publisher = {{IEEE}},
year = {1993},
timestamp = {Mon, 04 Dec 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SauerBN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SchultzG93,
author = {Kenneth J. Schultz and
P. Glenn Gulak},
title = {A Logic-enhanced Memory for Digital Data Recovery Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2007--2010},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SchultzG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Schutt-AineO93,
author = {Jos{\'{e}} E. Schutt{-}Ain{\'{e}} and
Kyung{-}soo Oh},
title = {Modeling Interconnections with Nonlinear Discontinuities},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2122--2124},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Schutt-AineO93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SeetharamME93,
author = {Srini W. Seetharam and
Gary J. Minden and
Joseph B. Evans},
title = {A Parallel {SONET} Scrambler/Descrambler Architecture},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2011--2014},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SeetharamME93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SekiKTK93,
author = {Mitsuho Seki and
Shun'ichi Kobayashi and
Munehiro Takubo and
Kazuyoshi Kurosawa},
title = {A New Floorplan Simultaneously Placing Blocks over Two Logic Layers
for Sea-of-gate Gate Arrays},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1758--1761},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SekiKTK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShanbhagP93a,
author = {Naresh R. Shanbhag and
Keshab K. Parhi},
title = {A Pipelined Adaptive Differential Vector Quantizer for Low-power Speech
Coding Applications},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1956--1958},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShanbhagP93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SheuLWSL93,
author = {Ming{-}Hwa Sheu and
Jau{-}Yien Lee and
Jhing{-}Fa Wang and
An{-}Nan Suen and
Lian{-}Ying Liu},
title = {A High Throughput-Rate Architecture for 8*8 2-D {DCT}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1578--1590},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SheuLWSL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SheuWLL93,
author = {Ming{-}Hwa Sheu and
Jhing{-}Fa Wang and
Jau{-}Yien Lee and
Lian{-}Ying Liu},
title = {An Expandable Chip Desing for Gray-scale Morphological Operations},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1563--1566},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SheuWLL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SomanchiM93,
author = {Subbarao Somanchi and
Mark L. Manwaring},
title = {Analog Synthesis from Behavioural Descriptions},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2079--2082},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SomanchiM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SongDMW93,
author = {H. Song and
Dileep A. Divekar and
L. Mills and
P. Wang},
title = {A Method for Improving the Efficiency of Simulating Large Electronic
Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1631--1634},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SongDMW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SoudrisGG93,
author = {Dimitrios Soudris and
P. D. Georgakopoulos and
Constantinos E. Goutis},
title = {A Systematic Methodology for Designing Multilevel Systolic Architectures},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1738--1741},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SoudrisGG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SoyataFM93,
author = {Tolga Soyata and
Eby G. Friedman and
James H. Mulligan Jr.},
title = {Integration of Clock Skew and Register Delays into a Retiming Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1483--1486},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SoyataFM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StellakisM93,
author = {Haris M. Stellakis and
Elias S. Manolakos},
title = {Time- and Order-recursive Estimation of Higher Order Moments in a
Linear Array},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1730--1733},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/StellakisM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuIM93,
author = {Hua Su and
Mohammed Ismail and
Christopher Michael},
title = {Yield Optimzation of Analog {MOS} Integrated Including Transistor
Mismatch},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1801--1804},
publisher = {{IEEE}},
year = {1993},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SuIM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuL93,
author = {Crystal J. Su and
Kai{-}Pui Lam},
title = {Digital Circuit Implementation of a Continuous-time Inference Network
for the Transitive Closure Problem},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1913--1916},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SuL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SuW93,
author = {Chauchin Su and
Jyrghong Wang},
title = {ECCSyn: a Synthesis Tool for {ECC} Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1706--1709},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SuW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Summerfield93,
author = {S. Summerfield},
title = {Design Methodology of {VLSI} with Multiple Valued Logic},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1702--1705},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Summerfield93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TanziW93,
author = {Nebil Tanzi and
Thomas T. Y. Wong},
title = {Computer-aided Sensitivity Analysis of Transistor Microwave Oscillators},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1555--1558},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TanziW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TesuD93,
author = {Ion Constatin Tesu and
Florentin Dartu},
title = {Piecewise Linear Macromodels for Elementary Logic and Fuzzy Circuits},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1718--1721},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TesuD93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TonerR93,
author = {Michael F. Toner and
Gordon W. Roberts},
title = {Towards Built-In-Self-Test for {SNR} Testing of a Mixed-Signal {IC}},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1599--1602},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TonerR93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/UnaltunaP93,
author = {M. Kemal Unaltuna and
Vijay Pitchumani},
title = {Quadrisectioning Based Placement with a Normalized Mean Field Neural
Network},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2047--2050},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/UnaltunaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/UnwalaS93,
author = {Ishaq H. Unwala and
Earl E. Swartzlander Jr.},
title = {Superpipelined Adder Designs},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1841--1844},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/UnwalaS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Venkat93,
author = {Kumar Venkat},
title = {Generalized Delay Optimization of Resistive Interconnections through
an Extension of Logical Effort},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2106--2109},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Venkat93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VitalFS93,
author = {Jo{\~{a}}o C. Vital and
Jos{\'{e}} E. Franca and
Nuno S. Silva},
title = {Fully-digital Testability of a High-speed Conversion System},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1595--1598},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/VitalFS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VlachOW93,
author = {Jir{\'{\i}} Vlach and
Ajoy Opal and
Jacek Wojciechowski},
title = {Simulation of Networks with Inconsistent Initial Conditions},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1627--1630},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/VlachOW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WagnerKJ93,
author = {D. Wagner and
Subhash C. Kwatra and
Mohsin M. Jamali},
title = {A Single Chip High Data Rate {QPSK} Demodulator},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2031--2034},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WagnerKJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WakabayashiKMKY93,
author = {Shin'ichi Wakabayashi and
Hiroshi Kusumoto and
Hideki Mishima and
Tetsushi Koide and
Noriyoshi Yoshida},
title = {Gate Array Placement Based on Mincut, Partitioning with Path Delay
Constraints},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2059--2062},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WakabayashiKMKY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Wang93a,
author = {Yi{-}Min Wang},
title = {Reducing Message Logging Overhead for Log-based Recovery},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1925--1928},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Wang93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangC93,
author = {Kai Wang and
Wai{-}Kai Chen},
title = {A Class of Zero Wasted Area Floorplan for {VLSI} Design},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1762--1765},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangH93a,
author = {L. Wang and
Iiro Hartimo},
title = {Systolic Array for 2-D Circular Convolution Using the Chinese Remainder
Theorem},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1746--1749},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangH93a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangJ93,
author = {Jiann{-}Jenn Wang and
Chein{-}Wei Jen},
title = {A High Throughput Systolic Design for {QR} Algorithm},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1742--1745},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangJMW93,
author = {Zhongde Wang and
Graham A. Jullien and
William C. Miller and
June Wang},
title = {New Concepts for the Design of Carry Lookahaead Adders},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1837--1840},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangJMW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangLLC93,
author = {Lih{-}Yang Wang and
Yen{-}Tai Lai and
Bin{-}Da Liu and
Tin{-}Chung Chang},
title = {Layout Compaction with Minimzed Delay Bound on Timing Critical Paths},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1849--1852},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangLLC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangP93,
author = {Ching{-}Yi Wang and
Keshab K. Parhi},
title = {Loop List Scheduler for {DSP} Algorithms under Resource Consraints},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1662--1665},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WeiTKN93,
author = {Belle W. Y. Wei and
Richard Tarver and
Jong{-}Seop Kim and
Kevin Ng},
title = {A Single Chip Lempel-Ziv Data Compressor},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1953--1955},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WeiTKN93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WenCY93,
author = {Kuei{-}Ann Wen and
Shihn{-}Cheng Chen and
Jo{-}Tan Yao},
title = {Single Processor Design for 2-D Wiener Filter},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2039--2042},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WenCY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WileyLS93,
author = {Charles Wiley and
K. M. Lau and
Stephen A. Szygenda},
title = {m3D: {A} Multidimensional Dynamic Configurable Router},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1857--1860},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WileyLS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WolffC93,
author = {Christopher M. Wolff and
Jung{-}hui Cheng},
title = {Symbolic Precompilation of Piecewise-linear Behavioral Models for
Efficient Simulation of Dual Time Scale Systems},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2075--2078},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WolffC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WolterSML93,
author = {Stefan Wolter and
Andreas Schubert and
Holger Matz and
Rainer Laur},
title = {On the Comparison Between Architectures for the Implementation of
Distributed Arithmetic},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1829--1832},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WolterSML93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuJ93,
author = {Cheng{-}Juei Wu and
Wen{-}Ben Jone},
title = {On Multiple Fault Detection of Parity Checkers},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1515--1518},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuJ93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XiangMingS93,
author = {Xiangming Xiao and
Robert Spence},
title = {Speeding Design Centering By Reusing Simulated Data},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1790--1792},
publisher = {{IEEE}},
year = {1993},
timestamp = {Wed, 18 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XiangMingS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YacoubSK93,
author = {Ghassan Y. Yacoub and
Tarun Soni and
Walter H. Ku},
title = {A Compact Array Processor Based on Self-timed Simultaneous Bidirectional
Signalling},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1893--1896},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YacoubSK93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YagiFESSKT93,
author = {Nobuyuki Yagi and
Kazuo Fukui and
Kazumasa Enami and
Nobuyuki Sasaki and
Hidetaka Saitou and
Yuji Konno and
Ryuichiro Tomita},
title = {A Programmable Video Signal Multi-processor for {HDTV} Signals},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1754--1757},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YagiFESSKT93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YousifG93,
author = {Abdel{-}Fattah Yousif and
Jun Gu},
title = {An Efficient Global Search Algorithm for Test Generation},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {1499--1502},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/YousifG93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Zhang93,
author = {Chen{-}Xiong Zhang},
title = {Timing-, Heat- and Area-driven Placement Using Self-organizing Semantic
Maps},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2067--2070},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Zhang93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhouSTGC93,
author = {Dian Zhou and
S. Su and
F. Tsui and
D. S. Gao and
Jason Cong},
title = {A Two-pole Circuit Model for {VLSI} High-speed Interconnection},
booktitle = {1993 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1993, Chicago, Illinois, USA, May 3-6, 1993},
pages = {2129--2132},
publisher = {{IEEE}},
year = {1993},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhouSTGC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
retrieved on 2024-06-06 18:21 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
