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@inproceedings{DBLP:conf/fpl/0001UC18,
author = {Behzad Salami and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {Fault Characterization Through {FPGA} Undervolting},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {85--88},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00023},
doi = {10.1109/FPL.2018.00023},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/0001UC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/0001UC18a,
author = {Behzad Salami and
Osman S. {\"{U}}nsal and
Adri{\'{a}}n Cristal},
title = {A Demo of {FPGA} Aggressive Voltage Downscaling: Power and Reliability
Tradeoffs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {451--452},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00085},
doi = {10.1109/FPL.2018.00085},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/0001UC18a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/0006CW18,
author = {Yao Liu and
Ray C. C. Cheung and
Hei Wong},
title = {Lightweight Secure Processor Prototype on {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {443--444},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00081},
doi = {10.1109/FPL.2018.00081},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/0006CW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbbasB18,
author = {Mustafa Abbas and
Vaughn Betz},
title = {Latency Insensitive Design Styles for FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {360--367},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00068},
doi = {10.1109/FPL.2018.00068},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AbbasB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbdelfattahHBDO18,
author = {Mohamed S. Abdelfattah and
David Han and
Andrew Bitar and
Roberto DiCecco and
Shane O'Connell and
Nitika Shanker and
Joseph Chu and
Ian Prins and
Joshua Fender and
Andrew C. Ling and
Gordon R. Chiu},
title = {{DLA:} Compiler and {FPGA} Overlay for Neural Network Inference Acceleration},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {411--418},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00077},
doi = {10.1109/FPL.2018.00077},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AbdelfattahHBDO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbdelhadiLS18,
author = {Ameer M. S. Abdelhadi and
Guy G. F. Lemieux and
Lesley Shannon},
title = {Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable
Memories},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {243--250},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00049},
doi = {10.1109/FPL.2018.00049},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AbdelhadiLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AhmedZMTB18,
author = {Ibrahim Ahmed and
Shuze Zhao and
James Meijers and
Olivier Trescases and
Vaughn Betz},
title = {Automatic {BRAM} Testing for Robust Dynamic Voltage Scaling for FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {68--75},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00020},
doi = {10.1109/FPL.2018.00020},
timestamp = {Mon, 18 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AhmedZMTB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlachiotisVCP18,
author = {Nikolaos Alachiotis and
Charalampos Vatsolakis and
Grigorios Chrysos and
Dionisios N. Pnevmatikatos},
title = {Accelerated Inference of Positive Selection on Whole Genomes},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {202--209},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00041},
doi = {10.1109/FPL.2018.00041},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AlachiotisVCP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AlonsoRGSV18,
author = {Tobias Alonso and
Mario Ruiz and
Angel Lopez Garcia{-}Arias and
Gustavo Sutter and
Jorge E. L{\'{o}}pez de Vergara},
title = {Submicrosecond Latency Video Compression in a Low-End FPGA-based System-on-Chip},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {355--359},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00067},
doi = {10.1109/FPL.2018.00067},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AlonsoRGSV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AmiriHRANN18,
author = {Sam Amiri and
Mohammad Hosseinabady and
Andr{\'{e}}s Rodr{\'{\i}}guez and
Rafael Asenjo and
Angeles G. Navarro and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {Workload Partitioning Strategy for Improved Parallelism on {FPGA-CPU}
Heterogeneous Chips},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {376--380},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00071},
doi = {10.1109/FPL.2018.00071},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/AmiriHRANN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BarrowBK18,
author = {Michael Barrow and
Steven M. Burns and
Ryan Kastner},
title = {A {FPGA} Accelerator for Real-Time 3D Non-rigid Registration Using
Tree Reweighted Message Passing and Dynamic Markov Random Field Generation},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {335--342},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00064},
doi = {10.1109/FPL.2018.00064},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BarrowBK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BoutrosYB18,
author = {Andrew Boutros and
Sadegh Yazdanshenas and
Vaughn Betz},
title = {Embracing Diversity: Enhanced {DSP} Blocks for Low-Precision Deep
Learning on FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {35--42},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00014},
doi = {10.1109/FPL.2018.00014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BoutrosYB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BrunetSGIBKSLXB18,
author = {Simone Casale Brunet and
Thierry Sch{\"{u}}pbach and
Nicolas Guex and
Christian Iseli and
Alan J. Bridge and
Dmitry Kuznetsov and
Christian J. A. Sigrist and
Phillippe Lemercier and
Ioannis Xenarios and
Endri Bezati},
title = {Towards in the Field Fast Pathogens Detection Using FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {463--464},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00091},
doi = {10.1109/FPL.2018.00091},
timestamp = {Fri, 15 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BrunetSGIBKSLXB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/BuK18,
author = {Lake Bu and
Michel A. Kinsy},
title = {Weighted Group Decision Making Using Multi-identity Physical Unclonable
Functions},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {251--255},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00050},
doi = {10.1109/FPL.2018.00050},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/BuK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ByrneFMLD18,
author = {Declan Byrne and
Ronan Farrell and
Sidath Madhuwantha and
Miriam Leeser and
John Dooley},
title = {Digital Pre-distortion Implemented Using {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {453--454},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00086},
doi = {10.1109/FPL.2018.00086},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ByrneFMLD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Chatzianastasiou18,
author = {Georgios Chatzianastasiou and
George A. Constantinides},
title = {An Efficient FPGA-based Axis-Aligned Box Tool for Embedded Computer
Graphics},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {343--350},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00065},
doi = {10.1109/FPL.2018.00065},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Chatzianastasiou18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChoFM18,
author = {Shenghsun Cho and
Michael Ferdman and
Peter A. Milder},
title = {FPGASwarm: High Throughput Model Checking on FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {435--442},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00080},
doi = {10.1109/FPL.2018.00080},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ChoFM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ChuK18,
author = {Thiem Van Chu and
Kenji Kise},
title = {An Effective Architecture for Trace-Driven Emulation of Networks-on-Chip
on FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {419--426},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00078},
doi = {10.1109/FPL.2018.00078},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ChuK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CongGHWY18,
author = {Jason Cong and
Licheng Guo and
Po{-}Tsang Huang and
Peng Wei and
Tianhe Yu},
title = {{SMEM++:} {A} Pipelined and Time-Multiplexed {SMEM} Seeding Accelerator
for Genome Sequencing},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {210--214},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00042},
doi = {10.1109/FPL.2018.00042},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CongGHWY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/CrossGLS18,
author = {Andreea{-}Ingrid Cross and
Liucheng Guo and
Wayne Luk and
Mark Salmon},
title = {{CRRS:} Custom Regression and Regularisation Solver for Large-Scale
Linear Systems},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {389--393},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00073},
doi = {10.1109/FPL.2018.00073},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/CrossGLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/DechelotteTDC18,
author = {Jonathan D{\'{e}}chelotte and
Russell Tessier and
Dominique Dallet and
J{\'{e}}r{\'{e}}mie Crenne},
title = {Lynq: {A} Lightweight Software Layer for Rapid SoC {FPGA} Prototyping},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {372--375},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00070},
doi = {10.1109/FPL.2018.00070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/DechelotteTDC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/EngelhardtHS18,
author = {Nina Engelhardt and
C.{-}H. Dominic Hung and
Hayden Kwok{-}Hay So},
title = {Performance-Driven System Generation for Distributed Vertex-Centric
Graph Processing on Multi-FPGA Systems},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {215--218},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00043},
doi = {10.1109/FPL.2018.00043},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/EngelhardtHS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FanNLQNL18,
author = {Hongxiang Fan and
Ho{-}Cheung Ng and
Shuanglong Liu and
Zhiqiang Que and
Xinyu Niu and
Wayne Luk},
title = {Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition
with Block Floating-Point Representation},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {287--294},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00056},
doi = {10.1109/FPL.2018.00056},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FanNLQNL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FaraoneGFBLB18,
author = {Julian Faraone and
Giulio Gambardella and
Nicholas J. Fraser and
Michaela Blott and
Philip H. W. Leong and
David Boland},
title = {Customizing Low-Precision Deep Neural Networks for FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {97--100},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00025},
doi = {10.1109/FPL.2018.00025},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FaraoneGFBLB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FiolhaisN18,
author = {Lu{\'{\i}}s Fiolhais and
Hor{\'{a}}cio C. Neto},
title = {An Efficient Exact Fused Dot Product Processor in {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {327--330},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00062},
doi = {10.1109/FPL.2018.00062},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FiolhaisN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/FraisseG18,
author = {Henri Fraisse and
Dinesh Gaitonde},
title = {A SAT-based Timing Driven Place and Route Flow for Critical Soft {IP}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {8--15},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00009},
doi = {10.1109/FPL.2018.00009},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/FraisseG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GengWSYPH18,
author = {Tong Geng and
Tianqi Wang and
Ahmed Sanaullah and
Chen Yang and
Rushi Patel and
Martin C. Herbordt},
title = {A Framework for Acceleration of {CNN} Training on Deeply-Pipelined
{FPGA} Clusters with Work and Weight Load Balancing},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {394--398},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00074},
doi = {10.1109/FPL.2018.00074},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/GengWSYPH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/GuoMCLXW18,
author = {Peng Guo and
Hong Ma and
Ruizhi Chen and
Pin Li and
Shaolin Xie and
Donglin Wang},
title = {{FBNA:} {A} Fully Binarized Neural Network Accelerator},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {51--54},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00016},
doi = {10.1109/FPL.2018.00016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/GuoMCLXW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HaleH18,
author = {Robert Hale and
Brad L. Hutchings},
title = {Enabling Low Impact, Rapid Debug for Highly Utilized {FPGA} Designs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {81--84},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00022},
doi = {10.1109/FPL.2018.00022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HaleH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HeSIA18,
author = {Zhenhao He and
David Sidler and
Zsolt Istv{\'{a}}n and
Gustavo Alonso},
title = {A Flexible K-Means Operator for Hybrid Databases},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {368--371},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00069},
doi = {10.1109/FPL.2018.00069},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/HeSIA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IsakovEK18,
author = {Mihailo Isakov and
Alan Ehret and
Michel A. Kinsy},
title = {ClosNets: Batchless {DNN} Training with On-Chip a Priori Sparse Neural
Topologies},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {55--59},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00017},
doi = {10.1109/FPL.2018.00017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/IsakovEK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/IstvanAS18,
author = {Zsolt Istv{\'{a}}n and
Gustavo Alonso and
Ankit Singla},
title = {Providing Multi-tenant Services with FPGAs: Case Study on a Key-Value
Store},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00029},
doi = {10.1109/FPL.2018.00029},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/IstvanAS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/JamalGW18,
author = {Al{-}Shahna Jamal and
Jeffrey Goeders and
Steven J. E. Wilton},
title = {An {FPGA} Overlay Architecture Supporting Rapid Implementation of
Functional Changes during On-Chip Debug},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {403--410},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00076},
doi = {10.1109/FPL.2018.00076},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/JamalGW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KekelySFSK18,
author = {Lukas Kekely and
Martin Spinler and
Stepan Friedl and
Jiri Sikora and
Jan Korenek},
title = {Accelerated Wire-Speed Packet Capture at 200 Gbps},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {455--456},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00087},
doi = {10.1109/FPL.2018.00087},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KekelySFSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KhanG18,
author = {Habib ul Hasan Khan and
Diana G{\"{o}}hringer},
title = {Cycle-Accurate and Cycle-Reproducible Debugging of Embedded Designs
Using Artificial Intelligence},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {449--450},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00084},
doi = {10.1109/FPL.2018.00084},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KhanG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KimCKBBA18,
author = {Donggyu Kim and
Christopher Celio and
Sagar Karandikar and
David Biancolin and
Jonathan Bachrach and
Krste Asanovic},
title = {{DESSERT:} Debugging {RTL} Effectively with State Snapshotting for
Error Replays across Trillions of Cycles},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {76--80},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00021},
doi = {10.1109/FPL.2018.00021},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KimCKBBA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KojimaA18,
author = {Takuya Kojima and
Hideharu Amano},
title = {A Configuration Data Multicasting Method for Coarse-Grained Reconfigurable
Architectures},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {239--242},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00048},
doi = {10.1109/FPL.2018.00048},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KojimaA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KourisVB18,
author = {Alexandros Kouris and
Stylianos I. Venieris and
Christos{-}Savvas Bouganis},
title = {CascadeCNN: Pushing the Performance Limits of Quantisation in Convolutional
Neural Networks},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {155--162},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00034},
doi = {10.1109/FPL.2018.00034},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KourisVB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KuhnM18,
author = {Jan K{\"{u}}hn and
Yiannos Manoli},
title = {An Application-Specific Field-Programmable Tree Ensemble Architecture},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {445--446},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00082},
doi = {10.1109/FPL.2018.00082},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/KuhnM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuL18,
author = {Jia Liu and
Qiang Liu},
title = {Resource Reduction of {BFGS} Quasi-Newton Implementation on {FPGA}
Using Fixed-Point Matrix Updating},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {301--306},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00058},
doi = {10.1109/FPL.2018.00058},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LiuL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LoC18,
author = {Charles Lo and
Paul Chow},
title = {Multi-fidelity Optimization for High-Level Synthesis Directives},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {272--279},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00054},
doi = {10.1109/FPL.2018.00054},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LoC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LuoWCLW18,
author = {Cheng Luo and
Yuhua Wang and
Wei Cao and
Philip H. W. Leong and
Lingli Wang},
title = {{RNA:} An Accurate Residual Network Accelerator for Quantized and
Reconstructed Deep Neural Networks},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {60--63},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00018},
doi = {10.1109/FPL.2018.00018},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/LuoWCLW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MaaroufAAMGGAV18,
author = {Dani Maarouf and
Abeer Alhyari and
Ziad Abuowaimer and
Timothy Martin and
Andrew David Gunter and
Gary Gr{\'{e}}wal and
Shawki Areibi and
Anthony Vannelli},
title = {Machine-Learning Based Congestion Estimation for Modern FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {427--434},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00079},
doi = {10.1109/FPL.2018.00079},
timestamp = {Tue, 26 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MaaroufAAMGGAV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MertAKH18,
author = {Ahmet Can Mert and
Hasan Azgin and
Ercan Kalali and
Ilker Hamzaoglu},
title = {Efficient Multiple Constant Multiplication Using {DSP} Blocks in {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {331--334},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00063},
doi = {10.1109/FPL.2018.00063},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MertAKH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MinhasWK18,
author = {Umar Ibrahim Minhas and
Roger F. Woods and
Georgios Karakonstantis},
title = {Facilitating Easier Access to FPGAs in the Heterogeneous Cloud Ecosystems},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {447--448},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00083},
doi = {10.1109/FPL.2018.00083},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MinhasWK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MoctarSB18,
author = {Yehdhih Ould Mohammed Moctar and
Mirjana Stojilovic and
Philip Brisk},
title = {Deterministic Parallel Routing for FPGAs Based on Galois Parallel
Execution Model},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {21--25},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00011},
doi = {10.1109/FPL.2018.00011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MoctarSB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MorganOABC18,
author = {Fearghal Morgan and
Declan O'Loughlin and
Jeremy Audiger and
Yohan Boyer and
Frank Callaly},
title = {viciLogic2.0 Online Learning and Prototyping Using {PYNQ}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {459--460},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00089},
doi = {10.1109/FPL.2018.00089},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MorganOABC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MuZLS18,
author = {Jiandong Mu and
Wei Zhang and
Hao Liang and
Sharad Sinha},
title = {A Collaborative Framework for FPGA-based {CNN} Design Modeling and
Optimization},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {139--146},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00032},
doi = {10.1109/FPL.2018.00032},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MuZLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MukhopadhyayR18,
author = {Debdeep Mukhopadhyay and
Debapriya Basu Roy},
title = {Revisiting {FPGA} Implementation of Montgomery Multiplier in Redundant
Number System for Efficient {ECC} Application in GF(p)},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {323--326},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00061},
doi = {10.1109/FPL.2018.00061},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/MukhopadhyayR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NakaharaSS18,
author = {Hiroki Nakahara and
Masayuki Shimoda and
Shimpei Sato},
title = {A Demonstration of FPGA-Based You Only Look Once Version2 (YOLOv2)},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {457--458},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00088},
doi = {10.1109/FPL.2018.00088},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NakaharaSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NguyenH18,
author = {Marie Nguyen and
James C. Hoe},
title = {Time-Shared Execution of Realtime Computer Vision Pipelines by Dynamic
Partial Reconfiguration},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {230--234},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00046},
doi = {10.1109/FPL.2018.00046},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NguyenH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/NurvitadhiCMMNC18,
author = {Eriko Nurvitadhi and
Jeffrey J. Cook and
Asit K. Mishra and
Debbie Marr and
Kevin Nealis and
Philip Colangelo and
Andrew C. Ling and
Davor Capalija and
Utku Aydonat and
Aravind Dasu and
Sergey Y. Shumarayev},
title = {In-Package Domain-Specific ASICs for Intel{\textregistered} Stratix{\textregistered}
10 FPGAs: {A} Case Study of Accelerating Deep Learning Using TensorTile
{ASIC}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {106--110},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00027},
doi = {10.1109/FPL.2018.00027},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/NurvitadhiCMMNC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OeldemannWH18,
author = {Andreas Oeldemann and
Thomas Wild and
Andreas Herkersdorf},
title = {FlueNT10G: {A} Programmable FPGA-based Network Tester for Multi-10-Gigabit
Ethernet},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {178--185},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00037},
doi = {10.1109/FPL.2018.00037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/OeldemannWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OppermannRSS018,
author = {Julian Oppermann and
Melanie Reuter{-}Oppermann and
Lukas Sommer and
Oliver Sinnen and
Andreas Koch},
title = {Dependence Graph Preprocessing for Faster Exact Modulo Scheduling
in High-Level Synthesis},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {280--286},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00055},
doi = {10.1109/FPL.2018.00055},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/OppermannRSS018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/OwaidaA18,
author = {Muhsen Owaida and
Gustavo Alonso},
title = {Application Partitioning on {FPGA} Clusters: Inference over Decision
Tree Ensembles},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {295--300},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00057},
doi = {10.1109/FPL.2018.00057},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/OwaidaA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PapaphilippouL18,
author = {Philippos Papaphilippou and
Wayne Luk},
title = {Accelerating Database Systems Using FPGAs: {A} Survey},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00030},
doi = {10.1109/FPL.2018.00030},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/PapaphilippouL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ParkXMD18,
author = {Dongjoon Park and
Yuanlong Xiao and
Nevo Magnezi and
Andr{\'{e}} DeHon},
title = {Case for Fast {FPGA} Compilation Using Partial Reconfiguration},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {235--238},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00047},
doi = {10.1109/FPL.2018.00047},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ParkXMD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PascaL18,
author = {Bogdan Pasca and
Martin Langhammer},
title = {Activation Function Architectures for FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {43--50},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00015},
doi = {10.1109/FPL.2018.00015},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/PascaL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PhamFBLV18,
author = {Thinh Hung Pham and
Alexander Fell and
Arnab Kumar Biswas and
Siew{-}Kei Lam and
Nandeesha Veeranna},
title = {CIDPro: Custom Instructions for Dynamic Program Diversification},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {224--229},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00045},
doi = {10.1109/FPL.2018.00045},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PhamFBLV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/QasaimehZJ18,
author = {Murad Qasaimeh and
Joseph Zambreno and
Phillip H. Jones},
title = {A Runtime Configurable Hardware Architecture for Computing Histogram-Based
Feature Descriptors},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {351--354},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00066},
doi = {10.1109/FPL.2018.00066},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/QasaimehZJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RavishankarGB18,
author = {Chirag Ravishankar and
Dinesh Gaitonde and
Trevor Bauer},
title = {Placement Strategies for 2.5D {FPGA} Fabric Architectures},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {16--20},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00010},
doi = {10.1109/FPL.2018.00010},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RavishankarGB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RichmondBK18,
author = {Dustin Richmond and
Michael Barrow and
Ryan Kastner},
title = {Everyone's a Critic: {A} Tool for Exploring {RISC-V} Projects},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {260--264},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00052},
doi = {10.1109/FPL.2018.00052},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RichmondBK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RodionovR18,
author = {Alex Rodionov and
Jonathan Rose},
title = {Automatic Topology Optimization for {FPGA} Interconnect Synthesis},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {30--34},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00013},
doi = {10.1109/FPL.2018.00013},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/RodionovR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/RybalkinPGGWB18,
author = {Vladimir Rybalkin and
Alessandro Pappalardo and
Muhammad Mohsin Ghaffar and
Giulio Gambardella and
Norbert Wehn and
Michaela Blott},
title = {{FINN-L:} Library Extensions and Design Trade-Off Analysis for Variable
Precision {LSTM} Networks on FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {89--96},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00024},
doi = {10.1109/FPL.2018.00024},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/RybalkinPGGWB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SerreP18,
author = {Fran{\c{c}}ois Serre and
Markus P{\"{u}}schel},
title = {A DSL-Based {FFT} Hardware Generator in Scala},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {315--322},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00060},
doi = {10.1109/FPL.2018.00060},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SerreP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Shan18,
author = {Yi Shan},
title = {{ADAS} and Video Surveillance Analytics System Using Deep Learning
Algorithms on {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {465--466},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00092},
doi = {10.1109/FPL.2018.00092},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Shan18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShenJFM18,
author = {Yongming Shen and
Tianchu Ji and
Michael Ferdman and
Peter A. Milder},
title = {Medusa: {A} Scalable Interconnect for Many-Port {DNN} Accelerators
and Wide {DRAM} Controller Interfaces},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {101--105},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00026},
doi = {10.1109/FPL.2018.00026},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ShenJFM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShengYH18,
author = {Jiayi Sheng and
Chen Yang and
Martin C. Herbordt},
title = {High Performance Communication on Reconfigurable Clusters},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {219--223},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00044},
doi = {10.1109/FPL.2018.00044},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ShengYH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SherwinWTS18,
author = {Tyrone Sherwin and
Kevin I{-}Kai Wang and
Prabu Thiagaraj and
Oliver Sinnen},
title = {Median Filtering with Very Large Windows: {SKA} Algorithms for FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {196--201},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00040},
doi = {10.1109/FPL.2018.00040},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/SherwinWTS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShimodaSN18,
author = {Masayuki Shimoda and
Shimpei Sato and
Hiroki Nakahara},
title = {Demonstration of Object Detection for Event-Driven Cameras on FPGAs
and GPUs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {461--462},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00090},
doi = {10.1109/FPL.2018.00090},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ShimodaSN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ShreejithCF18,
author = {Shanker Shreejith and
Ryan A. Cooke and
Suhaib A. Fahmy},
title = {A Smart Network Interface Approach for Distributed Applications on
Xilinx Zynq SoCs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {186--190},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00038},
doi = {10.1109/FPL.2018.00038},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ShreejithCF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/SittelKOMZ018,
author = {Patrick Sittel and
Martin Kumm and
Julian Oppermann and
Konrad M{\"{o}}ller and
Peter Zipf and
Andreas Koch},
title = {ILP-Based Modulo Scheduling and Binding for Register Minimization},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {265--271},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00053},
doi = {10.1109/FPL.2018.00053},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/SittelKOMZ018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StratikopoulosK18,
author = {Athanasios Stratikopoulos and
Christos Kotselidis and
John Goodacre and
Mikel Luj{\'{a}}n},
title = {FastPath: Towards Wire-Speed NVMe SSDs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {170--177},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00036},
doi = {10.1109/FPL.2018.00036},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/StratikopoulosK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UmurogluRS18,
author = {Yaman Umuroglu and
Lahiru Rasnayake and
Magnus Sj{\"{a}}lander},
title = {{BISMO:} {A} Scalable Bit-Serial Matrix Multiplication Overlay for
Reconfigurable Computing},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {307--314},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00059},
doi = {10.1109/FPL.2018.00059},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/UmurogluRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VaishnavPK18,
author = {Anuj Vaishnav and
Khoa Dang Pham and
Dirk Koch},
title = {A Survey on {FPGA} Virtualization},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {131--138},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00031},
doi = {10.1109/FPL.2018.00031},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VaishnavPK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VaishnavPKG18,
author = {Anuj Vaishnav and
Khoa Dang Pham and
Dirk Koch and
James Garside},
title = {Resource Elastic Virtualization for FPGAs Using OpenCL},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {111--118},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00028},
doi = {10.1109/FPL.2018.00028},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VaishnavPKG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VenierisB18,
author = {Stylianos I. Venieris and
Christos{-}Savvas Bouganis},
title = {f-CNNx: {A} Toolflow for Mapping Multiple Convolutional Neural Networks
on FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {381--388},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00072},
doi = {10.1109/FPL.2018.00072},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VenierisB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VercruyceVS18,
author = {Dries Vercruyce and
Elias Vansteenkiste and
Dirk Stroobandt},
title = {Hierarchical Force-Based Block Spreading for Analytical {FPGA} Placement},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {26--29},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00012},
doi = {10.1109/FPL.2018.00012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VercruyceVS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/VestiasDSN18,
author = {M{\'{a}}rio P. V{\'{e}}stias and
Rui Policarpo Duarte and
Jos{\'{e}} T. de Sousa and
Hor{\'{a}}cio C. Neto},
title = {Lite-CNN: {A} High-Performance Architecture to Execute CNNs in Low
Density FPGAs},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {399--402},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00075},
doi = {10.1109/FPL.2018.00075},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/VestiasDSN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WagleYDV18,
author = {Ankit Wagle and
Jinghua Yang and
Aykut Dengi and
Sarma B. K. Vrudhula},
title = {FPGAs with Reconfigurable Threshold Logic Gates for Improved Performance,
Power and Area},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {256--259},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00051},
doi = {10.1109/FPL.2018.00051},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/WagleYDV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WangLZZLC18,
author = {Junsong Wang and
Qiuwen Lou and
Xiaofan Zhang and
Chao Zhu and
Yonghua Lin and
Deming Chen},
title = {Design Flow of Accelerating Hybrid Extremely Low Bit-Width Neural
Network in Embedded {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {163--169},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00035},
doi = {10.1109/FPL.2018.00035},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/WangLZZLC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WuCCW18,
author = {Di Wu and
Jin Chen and
Wei Cao and
Lingli Wang},
title = {A Novel Low-Communication Energy-Efficient Reconfigurable {CNN} Acceleration
Architecture},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {64--67},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00019},
doi = {10.1109/FPL.2018.00019},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/WuCCW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/XiongSH18,
author = {Qingqing Xiong and
Anthony Skjellum and
Martin C. Herbordt},
title = {Accelerating {MPI} Message Matching through {FPGA} Offload},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {191--195},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00039},
doi = {10.1109/FPL.2018.00039},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/XiongSH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ZhaoNLN18,
author = {Ruizhe Zhao and
Ho{-}Cheung Ng and
Wayne Luk and
Xinyu Niu},
title = {Towards Efficient Convolutional Neural Network for Domain-Specific
Applications on {FPGA}},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {147--154},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00033},
doi = {10.1109/FPL.2018.00033},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ZhaoNLN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/ZhouWZM18,
author = {Xuegong Zhou and
Lingli Wang and
Peiyi Zhao and
Alan Mishchenko},
title = {Fast Adjustable {NPN} Classification using Generalized Symmetries},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00008},
doi = {10.1109/FPL.2018.00008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/ZhouWZM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/2018,
title = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8529150/proceeding},
isbn = {978-1-5386-8517-4},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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