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@inproceedings{DBLP:conf/fpga/AzharD03,
author = {M. A. Hannan Bin Azhar and
Keith R. Dimond},
editor = {Steve Trimberger and
Russell Tessier},
title = {FPGA-based design of an evolutionary controller for collision-free
robot navigation},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {237},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611852},
doi = {10.1145/611817.611852},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AzharD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BahlP03,
author = {Sanat Kamal Bahl and
Jim Plusquellic},
editor = {Steve Trimberger and
Russell Tessier},
title = {{FPGA} implementation of a fast Hadamard transformer for {WCDMA}},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {237},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611853},
doi = {10.1145/611817.611853},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BahlP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BanerjeeSUHNKBPTA03,
author = {Prithviraj Banerjee and
Vikram Saxena and
Juan Ramon Uribe and
Malay Haldar and
Anshuman Nayak and
Victor Kim and
Debabrata Bagchi and
Satrajit Pal and
Nikhil Tripathi and
Robert Anderson},
editor = {Steve Trimberger and
Russell Tessier},
title = {Making area-performance tradeoffs at the high level using the AccelFPGA
compiler for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {237},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611854},
doi = {10.1145/611817.611854},
timestamp = {Tue, 09 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BanerjeeSUHNKBPTA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BenkridBD03,
author = {Khaled Benkrid and
Samir Belkacemi and
Danny Crookes},
editor = {Steve Trimberger and
Russell Tessier},
title = {A logic based approach to hardware abstraction},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {238},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611856},
doi = {10.1145/611817.611856},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BenkridBD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BenkridCB03,
author = {Abdsamad Benkrid and
Danny Crookes and
Khaled Benkrid},
editor = {Steve Trimberger and
Russell Tessier},
title = {Design framework for the implementation of the 2-D orthogonal discrete
wavelet transform on {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {238},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611855},
doi = {10.1145/611817.611855},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BenkridCB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BenkridSCB03,
author = {Khaled Benkrid and
S. Sukhsawas and
Danny Crookes and
Samir Belkacemi},
editor = {Steve Trimberger and
Russell Tessier},
title = {A single-FPGA implementation of image connected component labelling},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {238},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611857},
doi = {10.1145/611817.611857},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BenkridSCB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BilavarnGP03,
author = {S{\'{e}}bastien Bilavarn and
Guy Gogniat and
Jean Luc Philippe},
editor = {Steve Trimberger and
Russell Tessier},
title = {An estimation and exploration methodology from system-level specifications:
application to FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {239},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611858},
doi = {10.1145/611817.611858},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BilavarnGP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BingemerZG03,
author = {Stephan Bingemer and
Peter Zipf and
Manfred Glesner},
editor = {Steve Trimberger and
Russell Tessier},
title = {A granularity-based classification model for systems-on-a-chip},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {239},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611859},
doi = {10.1145/611817.611859},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/BingemerZG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BonatoMFFM03,
author = {Vanderlei Bonato and
Rolf Fredi Molz and
Jo{\~{a}}o Carlos Furtado and
Marcos Fl{\^{o}}res Ferr{\~{a}}o and
Fernando Gehm Moraes},
editor = {Steve Trimberger and
Russell Tessier},
title = {Design of a fingerprint system using a hardware/software environment},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {240},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611860},
doi = {10.1145/611817.611860},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/BonatoMFFM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BozorgzadehS03,
author = {Elaheh Bozorgzadeh and
Majid Sarrafzadeh},
editor = {Steve Trimberger and
Russell Tessier},
title = {Customized regular channel design in FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {240},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611861},
doi = {10.1145/611817.611861},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/BozorgzadehS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CarlettaVKF03,
author = {Joan Carletta and
Robert J. Veillette and
Frederick W. Krach and
Zhengwei Fang},
editor = {Steve Trimberger and
Russell Tessier},
title = {Implementation of digital fixed-point approximations to continuous-time
{IIR} filters},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {241},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611863},
doi = {10.1145/611817.611863},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/CarlettaVKF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChanS03,
author = {Pak K. Chan and
Martine D. F. Schlag},
editor = {Steve Trimberger and
Russell Tessier},
title = {Parallel placement for field-programmable gate arrays},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {43--50},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611825},
doi = {10.1145/611817.611825},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChanS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChangKRB03,
author = {Chen Chang and
Kimmo Kuusilinna and
Brian C. Richards and
Robert W. Brodersen},
editor = {Steve Trimberger and
Russell Tessier},
title = {Implementation of {BEE:} a real-time large-scale hardware emulation
engine},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {91--99},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611832},
doi = {10.1145/611817.611832},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChangKRB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChoiSPJ03,
author = {Seonil Choi and
Ronald Scrofano and
Viktor K. Prasanna and
Ju{-}wook Jang},
editor = {Steve Trimberger and
Russell Tessier},
title = {Energy-efficient signal processing using FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {225--234},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611850},
doi = {10.1145/611817.611850},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ChoiSPJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ComptonH03,
author = {Katherine Compton and
Scott Hauck},
editor = {Steve Trimberger and
Russell Tessier},
title = {Track placement: orchestrating routing structures to maximize routability},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {241},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611864},
doi = {10.1145/611817.611864},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ComptonH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DehkordiB03,
author = {Mehrdad Eslami Dehkordi and
Stephen Dean Brown},
editor = {Steve Trimberger and
Russell Tessier},
title = {Recursive circuit clustering for minimum delay and area},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {242},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611865},
doi = {10.1145/611817.611865},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DehkordiB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DinizP03,
author = {Pedro C. Diniz and
Joonseok Park},
editor = {Steve Trimberger and
Russell Tessier},
title = {Using FPGAs for data and reorganization engines: preliminary results
for spatial pointer-based data structures},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {242},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611866},
doi = {10.1145/611817.611866},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/DinizP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ElGindyF03,
author = {Hossam A. ElGindy and
George Ferizis},
editor = {Steve Trimberger and
Russell Tessier},
title = {On hiding latency in reconfigurable systems: the case of merge-sort
for an FPGA-based system},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {242},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611867},
doi = {10.1145/611817.611867},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ElGindyF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FanZ03,
author = {Yongquan Fan and
Zeljko Zilic},
editor = {Steve Trimberger and
Russell Tessier},
title = {Testing for bit error rate in {FPGA} communication interfaces},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {243},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611868},
doi = {10.1145/611817.611868},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/FanZ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GhiasiNBS03,
author = {Soheil Ghiasi and
Karlene Nguyen and
Elaheh Bozorgzadeh and
Majid Sarrafzadeh},
editor = {Steve Trimberger and
Russell Tessier},
title = {On computation and resource management in an FPGA-based computation
environment},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {243},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611869},
doi = {10.1145/611817.611869},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GhiasiNBS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GuoT03,
author = {Binlin Guo and
Jiarong Tong},
editor = {Steve Trimberger and
Russell Tessier},
title = {A SC-based novel configurable analog cell},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {243},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611870},
doi = {10.1145/611817.611870},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GuoT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GuoYZGKM03,
author = {Jong{-}Ru Guo and
Chao You and
Kuan Zhou and
Bryan S. Goda and
Russell P. Kraft and
John F. McDonald},
editor = {Steve Trimberger and
Russell Tessier},
title = {A scalable 2 V, 20 GHz {FPGA} using SiGe {HBT} BiCMOS technology},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {145--153},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611840},
doi = {10.1145/611817.611840},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/GuoYZGKM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HiltonTH03,
author = {Adrian J. Hilton and
Gemma Townson and
Jon G. Hall},
editor = {Steve Trimberger and
Russell Tessier},
title = {FPGAs in critical hardware/software systems},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {244},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611871},
doi = {10.1145/611817.611871},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HiltonTH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HonoreCC03,
author = {Frank Honor{\'{e}} and
Benton H. Calhoun and
Anantha P. Chandrakasan},
editor = {Steve Trimberger and
Russell Tessier},
title = {Power-aware architectures and circuits for FPGA-based signal processing},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {244},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611872},
doi = {10.1145/611817.611872},
timestamp = {Mon, 27 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/HonoreCC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangWD03,
author = {Randy Huang and
John Wawrzynek and
Andr{\'{e}} DeHon},
editor = {Steve Trimberger and
Russell Tessier},
title = {Stochastic, spatial routing for hypergraphs, trees, and meshes},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {78--87},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611830},
doi = {10.1145/611817.611830},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HuangWD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JarvinenTS03,
author = {Kimmo U. J{\"{a}}rvinen and
Matti Tommiska and
Jorma Skytt{\"{a}}},
editor = {Steve Trimberger and
Russell Tessier},
title = {A fully pipelined memoryless 17.8 Gbps {AES-128} encryptor},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {207--215},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611848},
doi = {10.1145/611817.611848},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/JarvinenTS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JonesB03,
author = {Alex K. Jones and
Prithviraj Banerjee},
editor = {Steve Trimberger and
Russell Tessier},
title = {An automated and power-aware framework for utilization of {IP} cores
in hardware generated from {C} descriptions targeting FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {244},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611873},
doi = {10.1145/611817.611873},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/JonesB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KafafiBW03,
author = {Noha Kafafi and
Kimberly A. Bozman and
Steven J. E. Wilton},
editor = {Steve Trimberger and
Russell Tessier},
title = {Architectures and algorithms for synthesizable embedded programmable
logic cores},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {3--11},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611820},
doi = {10.1145/611817.611820},
timestamp = {Mon, 28 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KafafiBW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Kocan03,
author = {Fatih Kocan},
editor = {Steve Trimberger and
Russell Tessier},
title = {Reconfigurable randomized K-way graph partitioning},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {245},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611874},
doi = {10.1145/611817.611874},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Kocan03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KundarewichR03,
author = {Paul D. Kundarewich and
Jonathan Rose},
editor = {Steve Trimberger and
Russell Tessier},
title = {Synthetic circuit generation using clustering and iteration},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {245},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611875},
doi = {10.1145/611817.611875},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KundarewichR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LalaK03,
author = {Parag K. Lala and
B. Kiran Kumar},
editor = {Steve Trimberger and
Russell Tessier},
title = {An {FPGA} architecture with built-in error correction capability},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {245},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611876},
doi = {10.1145/611817.611876},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LalaK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeeXWS03,
author = {Seokjin Lee and
Hua Xiang and
D. F. Wong and
Richard Y. Sun},
editor = {Steve Trimberger and
Russell Tessier},
title = {Wire type assignment for {FPGA} routing},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {61--67},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611828},
doi = {10.1145/611817.611828},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/LeeXWS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Leijten-NowakM03,
author = {Katarzyna Leijten{-}Nowak and
Jef L. van Meerbergen},
editor = {Steve Trimberger and
Russell Tessier},
title = {An {FPGA} architecture with enhanced datapath functionality},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {195--204},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611846},
doi = {10.1145/611817.611846},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Leijten-NowakM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LewisBJLLLMMPPRWCR03,
author = {David M. Lewis and
Vaughn Betz and
David Jefferson and
Andy Lee and
Christopher Lane and
Paul Leventis and
Sandy Marquardt and
Cameron McClintock and
Bruce Pedersen and
Giles Powell and
Srinivas Reddy and
Chris Wysocki and
Richard Cliff and
Jonathan Rose},
editor = {Steve Trimberger and
Russell Tessier},
title = {The Stratix\({}^{\mbox{TM}}\) routing and logic architecture},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {12--20},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611821},
doi = {10.1145/611817.611821},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LewisBJLLLMMPPRWCR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiCHC03,
author = {Fei Li and
Deming Chen and
Lei He and
Jason Cong},
editor = {Steve Trimberger and
Russell Tessier},
title = {Architecture evaluation for power-efficient FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {175--184},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611844},
doi = {10.1145/611817.611844},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiCHC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LimaCR03,
author = {Fernanda Lima and
Luigi Carro and
Ricardo Augusto da Luz Reis},
editor = {Steve Trimberger and
Russell Tessier},
title = {Reducing pin and area overhead in fault-tolerant FPGA-based designs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {108--117},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611834},
doi = {10.1145/611817.611834},
timestamp = {Mon, 24 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/LimaCR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LodiTC03,
author = {Andrea Lodi and
Mario Toma and
Fabio Campi},
editor = {Steve Trimberger and
Russell Tessier},
title = {A pipelined configurable gate array for embedded processors},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {21--30},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611822},
doi = {10.1145/611817.611822},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LodiTC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Mak03,
author = {Wai{-}Kei Mak},
editor = {Steve Trimberger and
Russell Tessier},
title = {{I/O} placement for FPGAs with multiple {I/O} standards},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {51--57},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611826},
doi = {10.1145/611817.611826},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Mak03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PadaliaFBER03,
author = {Ketan Padalia and
Ryan Fung and
Mark Bourgeault and
Aaron Egier and
Jonathan Rose},
editor = {Steve Trimberger and
Russell Tessier},
title = {Automatic transistor and physical design of {FPGA} tiles from an architectural
specification},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {164--172},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611842},
doi = {10.1145/611817.611842},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PadaliaFBER03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PohlMKTL03,
author = {Zdenek Pohl and
Rudolf Matousek and
Jiri Kadlec and
Milan Tich{\'{y}} and
Miroslav L{\'{\i}}cko},
editor = {Steve Trimberger and
Russell Tessier},
title = {Lattice adaptive filter implementation for {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {246},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611877},
doi = {10.1145/611817.611877},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PohlMKTL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/QuaglioMVMMPZ03,
author = {Federico Quaglio and
Maurizio Martina and
Fabrizio Vacca and
Guido Masera and
Andrea Molino and
Gianluca Piccinini and
Maurizio Zamboni},
editor = {Steve Trimberger and
Russell Tessier},
title = {Wireless sensor networks: a power-scalable motion estimation {IP}
for hybrid video coding},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {246},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611878},
doi = {10.1145/611817.611878},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/QuaglioMVMMPZ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RayH03,
author = {Joydeep Ray and
James C. Hoe},
editor = {Steve Trimberger and
Russell Tessier},
title = {High-level modeling and {FPGA} prototyping of microprocessors},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {100--107},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611833},
doi = {10.1145/611817.611833},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RayH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RouvroySQL03,
author = {Ga{\"{e}}l Rouvroy and
Fran{\c{c}}ois{-}Xavier Standaert and
Jean{-}Jacques Quisquater and
Jean{-}Didier Legat},
editor = {Steve Trimberger and
Russell Tessier},
title = {Design strategies and modified descriptions to optimize cipher {FPGA}
implementations: fast and compact results for {DES} and triple-DES},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {247},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611879},
doi = {10.1145/611817.611879},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RouvroySQL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RubinD03,
author = {Raphael Rubin and
Andr{\'{e}} DeHon},
editor = {Steve Trimberger and
Russell Tessier},
title = {Design of {FPGA} interconnect for multilevel metalization},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {154--163},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611841},
doi = {10.1145/611817.611841},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RubinD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SharmaEH03,
author = {Akshay Sharma and
Carl Ebeling and
Scott Hauck},
editor = {Steve Trimberger and
Russell Tessier},
title = {PipeRoute: a pipelining-aware router for FPGAs},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {68--77},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611829},
doi = {10.1145/611817.611829},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SharmaEH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/StandaertRQL03,
author = {Fran{\c{c}}ois{-}Xavier Standaert and
Ga{\"{e}}l Rouvroy and
Jean{-}Jacques Quisquater and
Jean{-}Didier Legat},
editor = {Steve Trimberger and
Russell Tessier},
title = {A methodology to implement block ciphers in reconfigurable hardware
and its application to fast and compact {AES} {RIJNDAEL}},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {216--224},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611849},
doi = {10.1145/611817.611849},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/StandaertRQL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SuarisWGC03,
author = {Peter Suaris and
Dongsheng Wang and
Pei{-}Ning Guo and
Nan{-}Chi Chou},
editor = {Steve Trimberger and
Russell Tessier},
title = {A physical retiming algorithm for field programmable gate arrays},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {247},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611880},
doi = {10.1145/611817.611880},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SuarisWGC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Tahoori03,
author = {Mehdi Baradaran Tahoori},
editor = {Steve Trimberger and
Russell Tessier},
title = {A high resolution diagnosis technique for open and short defects in
{FPGA} interconnects},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {248},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611882},
doi = {10.1145/611817.611882},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Tahoori03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Tahoori03a,
author = {Mehdi Baradaran Tahoori},
editor = {Steve Trimberger and
Russell Tessier},
title = {Application-dependent testing of FPGAs for bridging faults},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {248},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611881},
doi = {10.1145/611817.611881},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/Tahoori03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WeaverMPW03,
author = {Nicholas Weaver and
Yury Markovsky and
Yatish Patel and
John Wawrzynek},
editor = {Steve Trimberger and
Russell Tessier},
title = {Post-placement C-slow retiming for the xilinx virtex {FPGA}},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {185--194},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611845},
doi = {10.1145/611817.611845},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WeaverMPW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WrightonD03,
author = {Michael G. Wrighton and
Andr{\'{e}} DeHon},
editor = {Steve Trimberger and
Russell Tessier},
title = {Hardware-assisted simulated annealing with application for fast {FPGA}
placement},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {33--42},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611824},
doi = {10.1145/611817.611824},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WrightonD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhouCYGCMMKG03,
author = {Kuan Zhou and
Michael Chu and
Chao You and
Jong{-}Ru Guo and
Channakeshav and
John Mayega and
John F. McDonald and
Russell P. Kraft and
Bryan S. Goda},
editor = {Steve Trimberger and
Russell Tessier},
title = {A four-bit full adder implemented on fast SiGe FPGAs with novel power
control scheme},
booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
pages = {248},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817.611883},
doi = {10.1145/611817.611883},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/ZhouCYGCMMKG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2003,
editor = {Steve Trimberger and
Russell Tessier},
title = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
Gate Arrays, {FPGA} 2003, Monterey, CA, USA, February 23-25, 2003},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/611817},
doi = {10.1145/611817},
isbn = {1-58113-651-X},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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