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@inproceedings{DBLP:conf/fpga/AhmedR00,
  author       = {Elias Ahmed and
                  Jonathan Rose},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {The effect of {LUT} and cluster size on deep-submicron {FPGA} performance
                  and density},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {3--12},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329171},
  doi          = {10.1145/329166.329171},
  timestamp    = {Tue, 06 Nov 2018 16:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/AhmedR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/AlippiFPS00,
  author       = {Cesare Alippi and
                  William Fornaciari and
                  Laura Pozzi and
                  Mariagiovanna Sami},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Determining the optimum extended instruction-set architecture for
                  application specific reconfigurable {VLIW} CPUs (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {218},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329214},
  doi          = {10.1145/329166.329214},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/AlippiFPS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/BalakrishnanPEA00,
  author       = {V. S. Balakrishnan and
                  Hardy J. Pottinger and
                  Fikret Er{\c{c}}al and
                  Mukesh Agarwal},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Design and implementation of an {FPGA} based processor for compressed
                  images (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {218},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329213},
  doi          = {10.1145/329166.329213},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BalakrishnanPEA00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/BetzR00,
  author       = {Vaughn Betz and
                  Jonathan Rose},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Automatic generation of {FPGA} routing architectures from high-level
                  descriptions},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {175--184},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329203},
  doi          = {10.1145/329166.329203},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BetzR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/BrynjolfsonZ00,
  author       = {Ian Brynjolfson and
                  Zeljko Zilic},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {{FPGA} clock management for low power applications (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {219},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329216},
  doi          = {10.1145/329166.329216},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BrynjolfsonZ00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ChanS00,
  author       = {Pak K. Chan and
                  Martine D. F. Schlag},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {New parallelization and convergence results for {NC:} a negotiation-based
                  {FPGA} router},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {165--174},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329201},
  doi          = {10.1145/329166.329201},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChanS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/CongHY00,
  author       = {Jason Cong and
                  Hui Huang and
                  Xin Yuan},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Technology mapping for k/m-macrocell based FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {51--59},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329179},
  doi          = {10.1145/329166.329179},
  timestamp    = {Fri, 14 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CongHY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/CongY00,
  author       = {Jason Cong and
                  Kenneth Yan},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Synthesis for FPGAs with embedded memory blocks},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {75--82},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329183},
  doi          = {10.1145/329166.329183},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CongY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ElbirtP00,
  author       = {Adam J. Elbirt and
                  Christof Paar},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {An {FPGA} implementation and performance evaluation of the Serpent
                  block cipher},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {33--40},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329176},
  doi          = {10.1145/329166.329176},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ElbirtP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/FornaciariPR00,
  author       = {William Fornaciari and
                  Vincenzo Piuri and
                  Luigi Ripamonti},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Virtualization of {FPGA} via segmentation (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {222},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329226},
  doi          = {10.1145/329166.329226},
  timestamp    = {Wed, 25 Sep 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/FornaciariPR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/GarciaDB00,
  author       = {Andr{\'{e}}s D. Garc{\'{\i}}a and
                  Jean{-}Luc Danger and
                  Wayne P. Burleson},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Low power digital design in FPGAs (poster abstract): a study of pipeline
                  architectures implemented in a {FPGA} using a low supply voltage to
                  reduce power consumption},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {220},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329220},
  doi          = {10.1145/329166.329220},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/GarciaDB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/HartensteinHHN00,
  author       = {Reiner W. Hartenstein and
                  Michael Herz and
                  Thomas Hoffmann and
                  Ulrich Nageldinger},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Synthesis and domain-specific optimization of KressArray-based reconfigurable
                  computing engines (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {222},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329224},
  doi          = {10.1145/329166.329224},
  timestamp    = {Tue, 08 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HartensteinHHN00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/HeileLV00,
  author       = {Frank Heile and
                  Andrew Leaver and
                  Kerry Veenstra},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Programmable memory blocks supporting content-addressable memory},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {13--21},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329173},
  doi          = {10.1145/329166.329173},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HeileLV00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/Huelsbergen00,
  author       = {Lorenz Huelsbergen},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {A representation for dynamic graphs in reconfigurable hardware and
                  its application to fundamental graph algorithms},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {105--115},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329190},
  doi          = {10.1145/329166.329190},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/Huelsbergen00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/JamkhandiMMF00,
  author       = {Piyush Jamkhandi and
                  Amar Mukherjee and
                  Kunal Mukherjee and
                  Robert Franceschini},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Novel hardware-software architecture for the recursive merge filtering
                  algorithm (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {220},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329218},
  doi          = {10.1145/329166.329218},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/JamkhandiMMF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/KavianiB00,
  author       = {Alireza Kaviani and
                  Stephen Dean Brown},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Technology mapping issues for an {FPGA} with lookup tables and PLA-like
                  blocks},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {60--66},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329180},
  doi          = {10.1145/329166.329180},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/KavianiB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/KimM00,
  author       = {Hea Joung Kim and
                  William H. Mangione{-}Smith},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Factoring large numbers with programmable hardware},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {41--48},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329177},
  doi          = {10.1145/329166.329177},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/KimM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/KimST00,
  author       = {Huesung Kim and
                  Arun K. Somani and
                  Akhilesh Tyagi},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {A reconfigurable multi-function computing cache architecture},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {85--94},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329185},
  doi          = {10.1145/329166.329185},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/KimST00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/KumarPPNGVWPS00,
  author       = {S. Kumar and
                  Luiz Pires and
                  Subburajan Ponnuswamy and
                  C. Nanavati and
                  J. Golusky and
                  M. Vojta and
                  S. Wadi and
                  D. Pandalai and
                  Henk A. E. Spaanenburg},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {A benchmark suite for evaluating configurable computing systems--status,
                  reflections, and future directions},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {126--134},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329193},
  doi          = {10.1145/329166.329193},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/KumarPPNGVWPS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LakamrajuT00,
  author       = {Vijay Lakamraju and
                  Russell Tessier},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Tolerating operational faults in cluster-based FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {187--194},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329205},
  doi          = {10.1145/329166.329205},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LakamrajuT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LeeF00,
  author       = {Hyuk{-}Jun Lee and
                  Michael J. Flynn},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Coarse-grained carry architecture for {FPGA} (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {217},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329211},
  doi          = {10.1145/329166.329211},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LeeF00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LemieuxLL00,
  author       = {Guy G. Lemieux and
                  Paul Leventis and
                  David M. Lewis},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Generating highly-routable sparse crossbars for PLDs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {155--164},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329199},
  doi          = {10.1145/329166.329199},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LemieuxLL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LinTH00,
  author       = {Yu{-}Chung Lin and
                  Su{-}Feng Tseng and
                  Tsai{-}Ming Hsieh},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Cost minimization of partitioned circuits with complex resource constraints
                  in FPGAs (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {217},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329212},
  doi          = {10.1145/329166.329212},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LinTH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/LockwoodTT00,
  author       = {John W. Lockwood and
                  Jonathan S. Turner and
                  David E. Taylor},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Field programmable port extender {(FPX)} for distributed routing and
                  queuing},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {137--144},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329196},
  doi          = {10.1145/329166.329196},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LockwoodTT00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/MarquardtBR00,
  author       = {Alexander Marquardt and
                  Vaughn Betz and
                  Jonathan Rose},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Timing-driven placement for FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {203--213},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329208},
  doi          = {10.1145/329166.329208},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/MarquardtBR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/McCreadyR00,
  author       = {Rob McCready and
                  Jonathan Rose},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Real-time, frame-rate face detection on a configurable hardware system
                  (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {221},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329221},
  doi          = {10.1145/329166.329221},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/McCreadyR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/OgrenciKS00,
  author       = {F. S. Ogrenci and
                  Aggelos K. Katsaggelos and
                  Majid Sarrafzadeh},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {{FPGA} implementation and analysis of image restoration},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {219},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329217},
  doi          = {10.1145/329166.329217},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/OgrenciKS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/OudjidaTH00,
  author       = {Abdelkrim Kamel Oudjida and
                  Sabrina Titri and
                  Mustapha Hamerlain},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Synthesizing full-systolic arrays for matrix product on Xilinx's XC4000(E,
                  {EX)} FPGAs (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {222},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329225},
  doi          = {10.1145/329166.329225},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/OudjidaTH00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/PauerFSM00,
  author       = {Eric K. Pauer and
                  Paul D. Fiore and
                  John M. Smith and
                  Cory S. Myers},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Algorithm analysis and mapping environment for adaptive computing
                  systems (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {217},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329209},
  doi          = {10.1145/329166.329209},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/PauerFSM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SchmitAFSS00,
  author       = {Herman Schmit and
                  Ray Andraka and
                  Philip Friedin and
                  Satnam Singh and
                  Tim Southgate},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {The John Henry Syndrome (panel session)(abstract only): humans vs.
                  machines as {FPGA} designers},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {101},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329188},
  doi          = {10.1145/329166.329188},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SchmitAFSS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SchmitWKG00,
  author       = {Herman Schmit and
                  David Whelihan and
                  Peter Kamarchik and
                  Frank Gennari},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Scalable interconnect and power distribution for island-style FPGAs
                  (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {221},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329223},
  doi          = {10.1145/329166.329223},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SchmitWKG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ShacklefordOYKSIY00,
  author       = {Barry Shackleford and
                  Etsuko Okushi and
                  Mitsuhiro Yasuda and
                  Hisao Koizumi and
                  Katsuhiko Seo and
                  Takashi Iwamoto and
                  Hiroto Yasuura},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {An FPGA-based genetic algorithm machine (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {218},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329215},
  doi          = {10.1145/329166.329215},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ShacklefordOYKSIY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ShankitiL00,
  author       = {Ali M. Shankiti and
                  Miriam Leeser},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Implementing a {RAKE} receiver for wireless communications on an FPGA-based
                  computer system},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {145--151},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329198},
  doi          = {10.1145/329166.329198},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ShankitiL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SinghMMM00,
  author       = {Amit Singh and
                  Luca Macchiarulo and
                  Arindam Mukherjee and
                  Malgorzata Marek{-}Sadowska},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {A novel high throughput reconfigurable {FPGA} architecture},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {22--29},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329174},
  doi          = {10.1145/329166.329174},
  timestamp    = {Mon, 05 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/SinghMMM00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/SzedoNSB00,
  author       = {G{\'{a}}bor Szed{\"{o}} and
                  Sandeep Neema and
                  Jason Scott and
                  Ted Bapty},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Reconfigurable target recognition system (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {221},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329222},
  doi          = {10.1145/329166.329222},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SzedoNSB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/WeissOKSR00,
  author       = {Karlheinz Wei{\ss} and
                  Carsten Oetker and
                  Igor Katchan and
                  Thorsten Steckstor and
                  Wolfgang Rosenstiel},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Power estimation approach for SRAM-based FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {195--202},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329207},
  doi          = {10.1145/329166.329207},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/WeissOKSR00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/Wilton00,
  author       = {Steven J. E. Wilton},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Heterogeneous technology mapping for FPGAs with dual-port embedded
                  memory arrays},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {67--74},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329182},
  doi          = {10.1145/329166.329182},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/Wilton00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/WirthlinG00,
  author       = {Michael J. Wirthlin and
                  Paul S. Graham},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Improving the performance and efficiency of an adaptive amplification
                  operation using configurable hardware (poster abstract)},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {219},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329219},
  doi          = {10.1145/329166.329219},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/WirthlinG00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/YasunagaKY00,
  author       = {Moritoshi Yasunaga and
                  Jung Hwan Kim and
                  Ikuo Yoshihara},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {The application of genetic algorithms to the design of reconfigurable
                  reasoning {VLSI} chips},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {116--125},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329191},
  doi          = {10.1145/329166.329191},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YasunagaKY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/YeSB00,
  author       = {Zhi Alex Ye and
                  U. Nagaraj Shenoy and
                  Prithviraj Banerjee},
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {A {C} compiler for a processor with a reconfigurable functional unit},
  booktitle    = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  pages        = {95--100},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166.329187},
  doi          = {10.1145/329166.329187},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YeSB00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/fpga/2000,
  editor       = {Steve Trimberger and
                  Scott Hauck},
  title        = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable
                  Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/329166},
  doi          = {10.1145/329166},
  isbn         = {1-58113-193-3},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/2000.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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