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export results for "toc:db/conf/aspdac/aspdac1997.bht:"
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@inproceedings{DBLP:conf/aspdac/AlzahraniC97,
author = {Fahad M. Alzahrani and
Tom Chen},
title = {A real-time high performance edge detector for computer vision applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {671--672},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600357},
doi = {10.1109/ASPDAC.1997.600357},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/AlzahraniC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BeckerDE97,
author = {Bernd Becker and
Rolf Drechsler and
Reinhard Enders},
title = {On the representational power of bit-level and word-level decision
diagrams},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {461--467},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600304},
doi = {10.1109/ASPDAC.1997.600304},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BeckerDE97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BehrensBT97,
author = {Dirk Behrens and
Erich Barke and
Robert Tolkiehn},
title = {Design driven partitioning},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {49--55},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600057},
doi = {10.1109/ASPDAC.1997.600057},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BehrensBT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BianXS97,
author = {Jinian Bian and
Hongxi Xue and
Ming Su},
title = {{VIDE:} a visual {VHDL} integrated design environment},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {383--386},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600258},
doi = {10.1109/ASPDAC.1997.600258},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BianXS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BombanaCF97,
author = {Massimo Bombana and
Patrizia Cavalloro and
Fabrizio Ferrandi},
title = {Property verification in the design of telecom applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {167--172},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600106},
doi = {10.1109/ASPDAC.1997.600106},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BombanaCF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BouraiIBT97,
author = {Youcef Bourai and
Nouma Izeboudjen and
Yacine Bouhabel and
Amine Tafat},
title = {A new approach for an {AHDL} based on system semantics},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {201--206},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600120},
doi = {10.1109/ASPDAC.1997.600120},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BouraiIBT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenS97,
author = {De{-}Sheng Chen and
Majid Sarrafzadeh},
title = {Cube-embedding based state encoding for low power design},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {613--618},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600344},
doi = {10.1109/ASPDAC.1997.600344},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChenS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/CheungHK97,
author = {Tommy King{-}Yin Cheung and
Graham R. Hellestrand and
Prasert Kanthamanon},
title = {A transformational codesign methodology},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {299--305},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600162},
doi = {10.1109/ASPDAC.1997.600162},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/CheungHK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChoiKD97,
author = {Won{-}Cheol Choi and
Hirobumi Kawashima and
Ryo Dang},
title = {Simulation of gate switching characteristics of a miniaturized {MOSFET}
based on a non-isothermal non-equilibrium transport model},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {345--348},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600203},
doi = {10.1109/ASPDAC.1997.600203},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChoiKD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DebnathS97,
author = {Debatosh Debnath and
Tsutomu Sasao},
title = {An optimization of {AND-OR-EXOR} three-level networks},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {545--550},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600332},
doi = {10.1109/ASPDAC.1997.600332},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DebnathS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DenyerB97,
author = {Peter B. Denyer and
Jean Brouwers},
title = {Java\({}^{\mbox{TM}}\) in electronic design automation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {141--144},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600095},
doi = {10.1109/ASPDAC.1997.600095},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DenyerB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/DufourM0C97,
author = {Jonathan Dufour and
Robert McBride and
Ping Zhang and
Chung{-}Kuan Cheng},
title = {A building block placement tool},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {271--276},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600148},
doi = {10.1109/ASPDAC.1997.600148},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/DufourM0C97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/FangWYL97,
author = {Wen{-}Jong Fang and
Allen C.{-}H. Wu and
Ti{-}Yen Yen and
Tsair{-}Chin Lin},
title = {DP-Gen: a datapath generator for multiple-FPGA applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {563--568},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600337},
doi = {10.1109/ASPDAC.1997.600337},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/FangWYL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GockelDB97,
author = {Nicole G{\"{o}}ckel and
Rolf Drechsler and
Bernd Becker},
title = {Learning heuristics for {OKFDD} minimization by evolutionary algorithms},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {469--472},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600307},
doi = {10.1109/ASPDAC.1997.600307},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GockelDB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Gupta97,
author = {Rajaesh K. Gupta},
title = {Hardware-software co-design: Tools for architecting systems-on-a-chip},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {285--289},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600157},
doi = {10.1109/ASPDAC.1997.600157},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Gupta97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HachiyaSNT97,
author = {Koutaro Hachiya and
Toshiyuki Saito and
Toshiyuki Nakata and
Norio Tanabe},
title = {Enhancement of parallelism for tearing-based circuit simulation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {493--498},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600314},
doi = {10.1109/ASPDAC.1997.600314},
timestamp = {Mon, 01 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HachiyaSNT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HamaE97,
author = {Toshiyuki Hama and
Hiroaki Etoh},
title = {Topological routing path search algorithm with incremental routability
test},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {645--648},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600349},
doi = {10.1109/ASPDAC.1997.600349},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HamaE97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HanyuKK97,
author = {Takahiro Hanyu and
Satoshi Kazama and
Michitaka Kameyama},
title = {Low-power multiple-valued current-mode integrated circuit with current-source
control and its application},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {413--418},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600277},
doi = {10.1109/ASPDAC.1997.600277},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HanyuKK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HayashiTF97,
author = {Tsunemasa Hayashi and
Atsushi Takahara and
Ken{-}nosuke Fukami},
title = {Co-evaluation of {FPGA} architectures and the {CAD} system for telecommunication},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {1--8},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600050},
doi = {10.1109/ASPDAC.1997.600050},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HayashiTF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HongCG97,
author = {Youn{-}Sik Hong and
Choong{-}Hee Cho and
Daniel D. Gajski},
title = {A quantitative analysis for optimizing memory allocation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {239--245},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600131},
doi = {10.1109/ASPDAC.1997.600131},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HongCG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuangCC97,
author = {Shi{-}Yu Huang and
Kwang{-}Ting Cheng and
Kuang{-}Chien Chen},
title = {{AQUILA:} An equivalence verifier for large sequential circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {455--460},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600302},
doi = {10.1109/ASPDAC.1997.600302},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HuangCC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuangWW97,
author = {Ing{-}Jer Huang and
Li{-}Rong Wang and
Yu{-}Min Wang},
title = {Synthesis and analysis of an industrial embedded microcontroller},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {151--156},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600100},
doi = {10.1109/ASPDAC.1997.600100},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HuangWW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Hwang97,
author = {Jen{-}Sheng Hwang},
title = {Multi-project chip service for university and industry in Taiwan},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {359--363},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600208},
doi = {10.1109/ASPDAC.1997.600208},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Hwang97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HwangW97,
author = {Chi{-}Hong Hwang and
Allen C.{-}H. Wu},
title = {An entropy measure for power estimation of Boolean functions},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {101--106},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600067},
doi = {10.1109/ASPDAC.1997.600067},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HwangW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HwangWHL97,
author = {Cheng{-}Tsung Hwang and
Hsiao{-}Chien Weng and
Yu{-}Chin Hsu and
Mike Tien{-}Chien Lee},
title = {On the control-subroutine implementation of subprogram synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {587--592},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600340},
doi = {10.1109/ASPDAC.1997.600340},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HwangWHL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IguchiSM97,
author = {Yukihiro Iguchi and
Tsutomu Sasao and
Munehiro Matsuura},
title = {On properties of Kleene TDDs},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {473--476},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600309},
doi = {10.1109/ASPDAC.1997.600309},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IguchiSM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IngHW97,
author = {Wei{-}Liang Ing and
Cheng{-}Tsung Hwang and
Allen C.{-}H. Wu},
title = {Evaluating cost-performance tradeoffs for system level applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {233--238},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600128},
doi = {10.1109/ASPDAC.1997.600128},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IngHW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IsoKH97,
author = {Naoyuki Iso and
Yasushi Kawaguchi and
Tomio Hirata},
title = {Efficient routability checking for global wires in planar layouts},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {641--644},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600348},
doi = {10.1109/ASPDAC.1997.600348},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IsoKH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/IsshikiDK97,
author = {Tsuyoshi Isshiki and
Wayne Wei{-}Ming Dai and
Hiroaki Kunieda},
title = {Bit-serial pipeline synthesis and layout for large-scale configurable
systems},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {441--446},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600298},
doi = {10.1109/ASPDAC.1997.600298},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/IsshikiDK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ItoN97,
author = {Yoshiyuki Ito and
Yuichi Nakamura},
title = {A hardware/software co-simulation environment for micro-processor
design with {HDL} simulator and {OS} interface},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {377--382},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600243},
doi = {10.1109/ASPDAC.1997.600243},
timestamp = {Thu, 09 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ItoN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ItoSK97,
author = {Kazuhito Ito and
Takenobu Shimizugashira and
Hiroaki Kunieda},
title = {High speed bit-serial parallel processing on array architecture},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {667--668},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600355},
doi = {10.1109/ASPDAC.1997.600355},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ItoSK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JemaiKJ97,
author = {Abderrazek Jemai and
Polen Kission and
Ahmed Amine Jerraya},
title = {Embedded architectural simulation within behavioral synthesis environment},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {227--232},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600127},
doi = {10.1109/ASPDAC.1997.600127},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/JemaiKJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/JiangJHW97,
author = {Jie{-}Hong R. Jiang and
Jing{-}Yang Jou and
Juinn{-}Dar Huang and
Jung{-}Shian Wei},
title = {{BDD} based lambda set selection in Roth-Karp decomposition for {LUT}
architecture},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {259--264},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600139},
doi = {10.1109/ASPDAC.1997.600139},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/JiangJHW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/John97,
author = {Werner John},
title = {EMC-adequate design of printed circuit boards as a part of the system
development},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {207--214},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600122},
doi = {10.1109/ASPDAC.1997.600122},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/John97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KameiSA97,
author = {Takayuki Kamei and
Masashi Sasahara and
Hideharu Amano},
title = {An {LSI} implementation of the simple serial synchronized multistage
interconnection network},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {673--674},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600358},
doi = {10.1109/ASPDAC.1997.600358},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KameiSA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KaneckoT97,
author = {M. Kanecko and
Jialin Tian},
title = {Concurrent cell generation and mapping for {CMOS} logic circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {247--252},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600134},
doi = {10.1109/ASPDAC.1997.600134},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KaneckoT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KangD97,
author = {Maggie Zhiwei Kang and
Wayne Wei{-}Ming Dai},
title = {General floorplanning with L-shaped, T-shaped and soft blocks based
on bounded slicing grid structure},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {265--270},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600145},
doi = {10.1109/ASPDAC.1997.600145},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KangD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KimC97,
author = {Yong{-}Bin Kim and
Tom Chen},
title = {A {CMOS} delayed locked loop {(DLL)} for reducing clock skew to under
500 ps},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {681--682},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600362},
doi = {10.1109/ASPDAC.1997.600362},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KimC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KobayashiKTOT97,
author = {Kazutoshi Kobayashi and
Masayoshi Kinoshita and
Masahiro Takeuchi and
Hidetoshi Onodera and
Keikichi Tamaru},
title = {A functional memory type parallel processor for vector quantization},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {665--666},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600354},
doi = {10.1109/ASPDAC.1997.600354},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KobayashiKTOT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KoideOWN97,
author = {Tetsushi Koide and
Mitsuhiro Ono and
Shin'ichi Wakabayashi and
Yutaka Nishimaru},
title = {Par-POPINS: a timing-driven parallel placement method with the Elmore
delay model for row based VLSIs},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {133--140},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600092},
doi = {10.1109/ASPDAC.1997.600092},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KoideOWN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KondoOT97,
author = {Masaki Kondo and
Hidetoshi Onodera and
Keikichi Tamaru},
title = {A current mode cyclic {A/D} converter with a 0.8 {\(\mu\)}m {CMOS}
process},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {683--684},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600363},
doi = {10.1109/ASPDAC.1997.600363},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KondoOT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KongHQ97,
author = {Tianming Kong and
Xianlong Hong and
Changge Qiao},
title = {{VEAP:} Global optimization based efficient algorithm for {VLSI} placement},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {277--280},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600151},
doi = {10.1109/ASPDAC.1997.600151},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/KongHQ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Kozawa97,
author = {Tokinori Kozawa},
title = {Collaboration between university and industry},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {433},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600286},
doi = {10.1109/ASPDAC.1997.600286},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Kozawa97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KrishnaswamyGB97,
author = {Venkatram Krishnaswamy and
Rajesh Gupta and
Prithviraj Banerjee},
title = {A procedure for software synthesis from {VHDL} models},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {593--598},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600341},
doi = {10.1109/ASPDAC.1997.600341},
timestamp = {Mon, 05 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KrishnaswamyGB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KyungPHSKLCMKKPK97,
author = {Chong{-}Min Kyung and
In{-}Cheol Park and
Se{-}Kyoung Hong and
K. S. Seong and
B. S. Kong and
Seungjong Lee and
Hoon Choi and
S. R. Maeng and
D. T. Kim and
Jong{-}Sun Kim and
S. H. Park and
Y. J. Kang},
title = {{HK386:} an x86-compatible 32-bit {CISC} microprocessor},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {661--662},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600351},
doi = {10.1109/ASPDAC.1997.600351},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KyungPHSKLCMKKPK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KyungPS97,
author = {Chong{-}Min Kyung and
In{-}Cheol Park and
Ho{-}Jun Song},
title = {Multi-project chip activities in Korea-IDEC perspective},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {353--357},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600207},
doi = {10.1109/ASPDAC.1997.600207},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KyungPS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Lee97,
author = {Gueesang Lee},
title = {Logic synthesis for cellular architecture FPGAs using BDDs},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {253--258},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600136},
doi = {10.1109/ASPDAC.1997.600136},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Lee97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LimCK97,
author = {Kyoohyun Lim and
Seung Hee Choi and
Beomsup Kim},
title = {Optimal loop bandwidth design for low noise {PLL} applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {425--428},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600281},
doi = {10.1109/ASPDAC.1997.600281},
timestamp = {Fri, 08 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LimCK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Lin97,
author = {Youn{-}Long Lin},
title = {Computing brokerage and its application in {VLSI} design},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {65--69},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600060},
doi = {10.1109/ASPDAC.1997.600060},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Lin97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LiuLC97,
author = {Fang{-}Jou Liu and
John Lillis and
Chung{-}Kuan Cheng},
title = {A new layout-driven timing model for incremental layout optimization},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {127--131},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600088},
doi = {10.1109/ASPDAC.1997.600088},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LiuLC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MarculescuMP97,
author = {Radu Marculescu and
Diana Marculescu and
Massoud Pedram},
title = {Adaptive models for input data compaction for power simulators},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {391--396},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600263},
doi = {10.1109/ASPDAC.1997.600263},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MarculescuMP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Marwedel97,
author = {Peter Marwedel},
title = {Processor-core based design and test},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {499--502},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600316},
doi = {10.1109/ASPDAC.1997.600316},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Marwedel97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MarwedelLD97,
author = {Peter Marwedel and
Birger Landwehr and
Rainer D{\"{o}}mer},
title = {Built-in chaining: introducing complex components into architectural
synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {599--605},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600342},
doi = {10.1109/ASPDAC.1997.600342},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MarwedelLD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MidoA97,
author = {Tetsuhisa Mido and
Kunihiro Asada},
title = {Crosstalk noise in high density and high speed interconnections due
to inductive coupling},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {215--220},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600123},
doi = {10.1109/ASPDAC.1997.600123},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MidoA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MiuraNF97,
author = {Katsuyoshi Miura and
Koji Nakamae and
Hiromu Fujioka},
title = {Hierarchical fault tracing for {VLSI} sequential circuits from {CAD}
layout data in the CAD-linked {EB} test system},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {329--332},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600173},
doi = {10.1109/ASPDAC.1997.600173},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MiuraNF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MorikawaOTS97,
author = {Shun Morikawa and
Keisuke Okada and
Sumitaka Takeuchi and
Isao Shirakawa},
title = {A high performance {FIR} filter dedicated to digital video transmission},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {77--82},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600063},
doi = {10.1109/ASPDAC.1997.600063},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MorikawaOTS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MorimotoSNBN97,
author = {Takayuki Morimoto and
Kazushi Saito and
Hiroshi Nakamura and
Taisuke Boku and
Kisaburo Nakazawa},
title = {Advanced processor design using hardware description language {AIDL}},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {387--390},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600261},
doi = {10.1109/ASPDAC.1997.600261},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MorimotoSNBN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MurataFWK97,
author = {Hiroshi Murata and
Kunihiro Fujiyoshi and
Tomomi Watanabe and
Yoji Kajitani},
title = {A mapping from sequence-pair to rectangular dissection},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {625--633},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600346},
doi = {10.1109/ASPDAC.1997.600346},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MurataFWK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/NakanoKSI97,
author = {Takumi Nakano and
Yoshiki Komatsudaira and
Akichika Shiomi and
Masaharu Imai},
title = {{VLSI} implementation of a real-time operating system},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {679--680},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600361},
doi = {10.1109/ASPDAC.1997.600361},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/NakanoKSI97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/NishiANAK97,
author = {Hiroaki Nishi and
Hideharu Amano and
Katsunobu Nishimura and
Kenichiro Anjo and
Tomohiro Kudoh},
title = {The {RDT} network router chip},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {675--676},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600359},
doi = {10.1109/ASPDAC.1997.600359},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/NishiANAK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OkumuraT97,
author = {Makiko Okumura and
Hiroshi Tanimoto},
title = {A time-domain method for numerical noise analysis of oscillators},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {477--482},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600310},
doi = {10.1109/ASPDAC.1997.600310},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OkumuraT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PangCCC97,
author = {Tin{-}Chak Johnson Pang and
Oliver Chiu{-}sing Choy and
Cheong{-}Fat Chan and
Wai{-}kuen Cham},
title = {Self-timed 1-D {ICT} processor},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {669--670},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600356},
doi = {10.1109/ASPDAC.1997.600356},
timestamp = {Mon, 04 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PangCCC97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ParameswaranG97,
author = {Sri Parameswaran and
Hui Guo},
title = {Power consumption in {CMOS} combinational logic blocks at high frequencies},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {195--200},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600117},
doi = {10.1109/ASPDAC.1997.600117},
timestamp = {Thu, 30 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ParameswaranG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ParkR97,
author = {Jang{-}Hyun Park and
Yea{-}Chul Rho},
title = {Performance test of Viterbi decoder for wideband {CDMA} system},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {19--23},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600052},
doi = {10.1109/ASPDAC.1997.600052},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ParkR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PasseroneLSCS97,
author = {Claudio Passerone and
Luciano Lavagno and
Claudio Sanso{\`{e}} and
Massimiliano Chiodo and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Trade-off evaluation in embedded system design via co-simulation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {291--297},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600159},
doi = {10.1109/ASPDAC.1997.600159},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PasseroneLSCS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PedramW97,
author = {Massoud Pedram and
Xunwei Wu},
title = {A new description of {CMOS} circuits at switch-level},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {551--556},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600333},
doi = {10.1109/ASPDAC.1997.600333},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/PedramW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/RoychowdhuryF97,
author = {Jaijeet S. Roychowdhury and
Peter Feldmann},
title = {A new linear-time harmonic balance algorithm for cyclostationary noise
analysis in {RF} circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {483--492},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600312},
doi = {10.1109/ASPDAC.1997.600312},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/RoychowdhuryF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SaikaFSA97,
author = {Shunji Saika and
Masahiro Fukui and
Noriko Shinomiya and
Toshiro Akino},
title = {A two-dimensional transistor placement for cell synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {557--562},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600335},
doi = {10.1109/ASPDAC.1997.600335},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SaikaFSA97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SanoSH97,
author = {Masahiro Sano and
Shintaro Shimogori and
Fumiyasu Hirose},
title = {Acceleration of mincut partitioning using hardware {CAD} accelerator
{TP5000}},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {61--64},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600059},
doi = {10.1109/ASPDAC.1997.600059},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SanoSH97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Schrage97,
author = {J{\"{u}}rgen Schrage},
title = {Modeling and detection of dynamic errors due to reflection- and crosstalk-noise},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {405--408},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600273},
doi = {10.1109/ASPDAC.1997.600273},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Schrage97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SeongK97,
author = {Kwang{-}Su Seong and
Chong{-}Min Kyung},
title = {{CBLO:} a clustering based linear ordering for netlist partitioning},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {43--48},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600056},
doi = {10.1109/ASPDAC.1997.600056},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SeongK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ShenLL97,
author = {Wen{-}Zen Shen and
Jiing{-}Yuan Lin and
Jyh{-}Ming Lu},
title = {CB-Power: a hierarchical cell-based power characterization and estimation
environment for static {CMOS} circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {189--194},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600115},
doi = {10.1109/ASPDAC.1997.600115},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ShenLL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Shi97,
author = {C.{-}J. Richard Shi},
title = {Block-level fault isolation using partition theory and logic minimization
techniques},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {319--324},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600169},
doi = {10.1109/ASPDAC.1997.600169},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Shi97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Shi97a,
author = {C.{-}J. Richard Shi},
title = {Solving constrained via minimization by compact linear programming},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {635--640},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600347},
doi = {10.1109/ASPDAC.1997.600347},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Shi97a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/StoffelKG97,
author = {Dominik Stoffel and
Wolfgang Kunz and
Stefan Gerber},
title = {{AND/OR} reasoning graphs for determining prime implicants in multi-level
combinational networks},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {529--538},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600326},
doi = {10.1109/ASPDAC.1997.600326},
timestamp = {Mon, 18 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/StoffelKG97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SuCJ97,
author = {Chauchin Su and
E. Y. Chen and
Shyh{-}Jye Jou},
title = {Structural approach for performance driven {ECC} circuit synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {89--94},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600065},
doi = {10.1109/ASPDAC.1997.600065},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SuCJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SugimotoI97,
author = {Yasuhiro Sugimoto and
Tetsuya Iida},
title = {A current-mode, 3 V, 20 MHz, 9-bit equivalent {CMOS} sample-and-hold
circuit},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {685--686},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600364},
doi = {10.1109/ASPDAC.1997.600364},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SugimotoI97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakabatakeMIF97,
author = {Katsuyuki Takabatake and
Toshimitsu Masuzawa and
Michiko Inoue and
Hideo Fujiwara},
title = {Non-scan design for testable data paths using thru operation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {313--318},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600168},
doi = {10.1109/ASPDAC.1997.600168},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakabatakeMIF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakahashiK97,
author = {Atsushi Takahashi and
Yoji Kajitani},
title = {Performance and reliability driven clock scheduling of sequential
logic circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {37--42},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600055},
doi = {10.1109/ASPDAC.1997.600055},
timestamp = {Mon, 01 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakahashiK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TakiLTK97,
author = {Kazuo Taki and
Bu{-}Yeol Lee and
Hideki Tanaka and
Kenzo Konishi},
title = {Super low power 8-bit {CPU} with pass-transistor logic},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {663--664},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600352},
doi = {10.1109/ASPDAC.1997.600352},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TakiLTK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Tamiya97,
author = {Yutaka Tamiya},
title = {Delay estimation for technology independent synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {31--36},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600054},
doi = {10.1109/ASPDAC.1997.600054},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Tamiya97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TogawaSO97,
author = {Nozomu Togawa and
Masao Sato and
Tatsuo Ohtsuki},
title = {A simultaneous placement and global routing algorithm with path length
constraints for transport-processing FPGAs},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {569--578},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600338},
doi = {10.1109/ASPDAC.1997.600338},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TogawaSO97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TsengJ97,
author = {Jyh{-}Mou Tseng and
Jing{-}Yang Jou},
title = {A power driven two-level logic optimizer},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {113--116},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600069},
doi = {10.1109/ASPDAC.1997.600069},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TsengJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TsengW97,
author = {Wang{-}Dauh Tseng and
Kuochen Wang},
title = {Fuzzy-based circuit partitioning in built-in current testing},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {397--400},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600267},
doi = {10.1109/ASPDAC.1997.600267},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/TsengW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/VakilotojarB97,
author = {Vida Vakilotojar and
Peter A. Beerel},
title = {{RTL} verification of timed asynchronous and heterogeneous systems
using symbolic model checking},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {181--188},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600112},
doi = {10.1109/ASPDAC.1997.600112},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/VakilotojarB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/VenkateswaranGKBV97,
author = {Natesan Venkateswaran and
Anurag Gupta and
Srinivas Katkoori and
Dinesh Bhatia and
Ranga Vemuri},
title = {A constructive method for data path area estimation during high-level
{VLSI} synthesis},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {509--515},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600319},
doi = {10.1109/ASPDAC.1997.600319},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/VenkateswaranGKBV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Watanabe97,
author = {Toshimasa Watanabe},
title = {{MULTI-PRIDE:} a system for supporting multi-layered printed wiring
board design},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {221--226},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600124},
doi = {10.1109/ASPDAC.1997.600124},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Watanabe97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuCMT97,
author = {Yu{-}Liang Wu and
Douglas Chang and
Malgorzata Marek{-}Sadowska and
Shuji Tsukiyama},
title = {Not necessarily more switches more routability [sic.]},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {579--584},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600339},
doi = {10.1109/ASPDAC.1997.600339},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuCMT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuDHP97,
author = {Qing Wu and
Chih{-}Shun Ding and
Cheng{-}Ta Hsieh and
Massoud Pedram},
title = {Statistical design of macro-models for RT-level power evaluation},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {523--528},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600325},
doi = {10.1109/ASPDAC.1997.600325},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuDHP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WuPW97,
author = {Qing Wu and
Massoud Pedram and
Xunwei Wu},
title = {A note on the relationship between signal probability and switching
activity},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {117--120},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600070},
doi = {10.1109/ASPDAC.1997.600070},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WuPW97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/XuK97,
author = {Min Xu and
Fadi J. Kurdahi},
title = {ChipEst-FPGA: a tool for chip level area and timing estimation of
lookup table based FPGAs for high level applications},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {435--440},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600292},
doi = {10.1109/ASPDAC.1997.600292},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/XuK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YamaguchiYNK97,
author = {Masayuki Yamaguchi and
Akihisa Yamada and
Toshihiro Nakaoka and
Takashi Kambe},
title = {Architecture evaluation based on the datapath structure and parallel
constraint},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {503--508},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600318},
doi = {10.1109/ASPDAC.1997.600318},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YamaguchiYNK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YeR97,
author = {Yibin Ye and
Kaushik Roy},
title = {Efficient synthesis of {AND/XOR} networks},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {539--544},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600329},
doi = {10.1109/ASPDAC.1997.600329},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/YeR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YimLKPPPK97,
author = {Joon{-}Seo Yim and
Hee{-}Choul Lee and
Tae{-}Hoon Kim and
Bong{-}Il Park and
Chang{-}Jae Park and
In{-}Cheol Park and
Chong{-}Min Kyung},
title = {Single cycle access cache for the misaligned data and instruction
prefetch},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {677--678},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600360},
doi = {10.1109/ASPDAC.1997.600360},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YimLKPPPK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YimPYOLCKLWLPK97,
author = {Joon{-}Seo Yim and
Chang{-}Jae Park and
Woo{-}Seung Yang and
Hun{-}Seung Oh and
Hee{-}Choul Lee and
Hoon Choi and
Tae{-}Hoon Kim and
Seungjong Lee and
Nara Won and
Yung{-}Hei Lee and
In{-}Cheol Park and
Chong{-}Min Kyung},
title = {Verification methodology of compatible microprocessors},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {173--180},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600108},
doi = {10.1109/ASPDAC.1997.600108},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YimPYOLCKLWLPK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZhangTHK97,
author = {Kai Zhang and
Haruhiko Takase and
Terumine Hayashi and
Hidehiko Kita},
title = {An enhanced iterative improvement method for evaluating the maximum
number of simultaneous switching gates for combinational circuits},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {107--112},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600068},
doi = {10.1109/ASPDAC.1997.600068},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZhangTHK97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZhouWR97,
author = {Wenming Zhou and
Zeyi Wang and
Lan Rao},
title = {Parallel calculation of 3-D parasitic resistance and capacitance with
linear boundary elements},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {339--343},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600200},
doi = {10.1109/ASPDAC.1997.600200},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZhouWR97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/aspdac/1997,
title = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
publisher = {{IEEE}},
year = {1997},
url = {https://ieeexplore.ieee.org/xpl/conhome/4762/proceeding},
isbn = {0-7803-3663-1},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/1997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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