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@inproceedings{DBLP:conf/cases/ChenHIR23,
author = {Xiangru Chen and
Dipal Halder and
Kazi Mejbaul Islam and
Sandip Ray},
editor = {Jana Doppa and
Swarup Bhunia},
title = {Work-in-Progress: Towards Evaluating CNNs Against Integrity Attacks
on Multi-tenant Computation},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {7--8},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609091},
doi = {10.1145/3607889.3609091},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChenHIR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HenkelSBTWTMCKFLCHCYC23,
author = {J{\"{o}}rg Henkel and
Lokesh Siddhu and
Lars Bauer and
J{\"{u}}rgen Teich and
Stefan Wildermann and
Mehdi B. Tahoori and
Mahta Mayahinia and
Jer{\'{o}}nimo Castrill{\'{o}}n and
Asif Ali Khan and
Hamid Farzaneh and
Jo{\~{a}}o Paulo C. de Lima and
Jian{-}Jia Chen and
Christian Hakert and
Kuan{-}Hsun Chen and
Chia{-}Lin Yang and
Hsiang{-}Yun Cheng},
editor = {Jana Doppa and
Swarup Bhunia},
title = {Special Session - Non-Volatile Memories: Challenges and Opportunities
for Embedded System Architectures with Focus on Machine Learning Applications},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {11--20},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609088},
doi = {10.1145/3607889.3609088},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HenkelSBTWTMCKFLCHCYC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KleinS23,
author = {Russell Klein and
Petri Solanti},
editor = {Jana Doppa and
Swarup Bhunia},
title = {Tutorial: Designing an Edge Inferencing Accelerator with High- Level
Synthesis},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {1--2},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609087},
doi = {10.1145/3607889.3609087},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KleinS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MacanBBC23,
author = {Luka Macan and
Alessio Burrello and
Luca Benini and
Francesco Conti},
editor = {Jana Doppa and
Swarup Bhunia},
title = {{WIP:} Automatic {DNN} Deployment on Heterogeneous Platforms: the
{GAP9} Case Study},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {9--10},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609092},
doi = {10.1145/3607889.3609092},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MacanBBC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NagarajuC23,
author = {Dara Nagaraju and
Nitin Chandrachoodan},
editor = {Jana Doppa and
Swarup Bhunia},
title = {Work-in-Progress: {QRCNN:} Scalable CNNs},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {5--6},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609090},
doi = {10.1145/3607889.3609090},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NagarajuC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/XuWZCL23,
author = {Xingyu Xu and
Qingwen Wei and
Yang Zhang and
Hao Cai and
Bo Liu},
editor = {Jana Doppa and
Swarup Bhunia},
title = {Work-in-Process: Error-Compensation-Based Energy-Efficient {MAC} Unit
for CNNs},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
pages = {3--4},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889.3609089},
doi = {10.1145/3607889.3609089},
timestamp = {Tue, 05 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/XuWZCL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2023,
editor = {Jana Doppa and
Swarup Bhunia},
title = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2023, Hamburg, Germany, September 17-22,
2023},
publisher = {{ACM/IEEE}},
year = {2023},
url = {https://doi.org/10.1145/3607889},
doi = {10.1145/3607889},
isbn = {979-8-4007-0290-7},
timestamp = {Thu, 25 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AbedinRCA22,
author = {Minhaz Abedin and
Arman Roohi and
Nathaniel C. Cady and
Shaahin Angizi},
title = {Work-in-Progress: {A} Processing-in-Pixel Accelerator based on Multi-level
HfOx ReRAM},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {37--38},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00025},
doi = {10.1109/CASES55004.2022.00025},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AbedinRCA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AmeinXTMG22,
author = {Marihan Amein and
Zhuoran Xiong and
Olivier Therrien and
Brett H. Meyer and
Warren J. Gross},
title = {Work-in-Progress: SuperNAS: Fast Multi-Objective SuperNet Architecture
Search for Semantic Segmentation},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {35--36},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00024},
doi = {10.1109/CASES55004.2022.00024},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AmeinXTMG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AshouriEHWMCG22,
author = {Amir H. Ashouri and
Mostafa Elhoushi and
Yuzhe Hua and
Xiang Wang and
Muhammad Asif Manzoor and
Bryan Chan and
Yaoqing Gao},
title = {Work-in-Progress: MLGOPerf: An {ML} Guided Inliner to Optimize Performance},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {3--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00008},
doi = {10.1109/CASES55004.2022.00008},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AshouriEHWMCG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BagPM22,
author = {Arnab Bag and
Sikhar Patranabis and
Debdeep Mukhopadhyay},
title = {Work-in-Progress: CAMiSE: Content Addressable Memory-integrated Searchable
Encryption},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {21--22},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00017},
doi = {10.1109/CASES55004.2022.00017},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BagPM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenLZW22,
author = {Yenan Chen and
Linsen Li and
Zhaoqian Zhu and
Yue Wu},
title = {Work-in-Progress: Reliability Evaluation of Power {SCADA} System with
Three-Layer {IDS}},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00007},
doi = {10.1109/CASES55004.2022.00007},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChenLZW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CraryPCS22,
author = {Christopher Crary and
Wesley Piard and
Britton Chesley and
Greg Stitt},
title = {Work-in-Progress: Toward a Robust, Reconfigurable Hardware Accelerator
for Tree-Based Genetic Programming},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {17--18},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00015},
doi = {10.1109/CASES55004.2022.00015},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CraryPCS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DuGL22,
author = {Yajuan Du and
Yuan Gao and
Qiao Li},
title = {Work-in-Progress: Prediction-based Fine-Grained {LDPC} Reading to
Enhance High-Density Flash Read Performance},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {13--14},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00013},
doi = {10.1109/CASES55004.2022.00013},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DuGL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FangZGCCZWWC22,
author = {Xiaotong Fang and
Meng Zhang and
Yifan Guo and
Fei Chen and
Binglu Chen and
Xuepeng Zhan and
Jixuan Wu and
Fei Wu and
Jiezhi Chen},
title = {Work-in-Progress: High-Precision Short-Term Lifetime Prediction in
{TLC} 3D {NAND} Flash Memory as Hot-data Storage},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {11--12},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00012},
doi = {10.1109/CASES55004.2022.00012},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FangZGCCZWWC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuWG22,
author = {Xiao Hu and
Yaohua Wang and
Xuan Gao},
title = {Work-in-Progress: {RISC-V} Based Low-cost Embedded Trace Processing
System},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {31--32},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00022},
doi = {10.1109/CASES55004.2022.00022},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuWG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JacobSP22,
author = {Jerry Jacob and
Sucheta Sehgal and
Nitish D. Patel},
title = {Work in Progress: Emulation of biological tissues on an {FPGA}},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {39--40},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00026},
doi = {10.1109/CASES55004.2022.00026},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JacobSP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KaurSG22,
author = {Anandpreet Kaur and
Pravin Srivastav and
Bibhas Ghoshal},
title = {Work-in-Progress: DRAM-MaUT: {DRAM} Address Mapping Unveiling Tool
for {ARM} Devices},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {41--42},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00027},
doi = {10.1109/CASES55004.2022.00027},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/KaurSG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiGC22,
author = {Yiming Li and
Shouzhen Gu and
Mingsong Chen},
title = {Work-in-Progress: Cooperative MLP-Mixer Networks Inference On Heterogeneous
Edge Devices through Partition and Fusion},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {29--30},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00021},
doi = {10.1109/CASES55004.2022.00021},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiGC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LubeckJWB22,
author = {Konstantin L{\"{u}}beck and
Alexander Louis{-}Ferdinand Jung and
Felix Wedlich and
Oliver Bringmann},
title = {Work-in-Progress: Ultra-fast yet Accurate Performance Prediction for
Deep Neural Network Accelerators},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {27--28},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00020},
doi = {10.1109/CASES55004.2022.00020},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LubeckJWB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PicardCDMCD22,
author = {Quentin Picard and
St{\'{e}}phane Chevobbe and
Mehdi Darouich and
Zoe Mandelli and
Mathieu Carrier and
Jean{-}Yves Didier},
title = {Work-in-Progress: Smart data reduction in {SLAM} methods for embedded
systems},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {23--24},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00018},
doi = {10.1109/CASES55004.2022.00018},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/PicardCDMCD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ReaughS22,
author = {Alexander Reaugh and
Sayed Ahmad Salehi},
title = {Work-in-Progress: Efficient Low-latency Near-Memory Addition},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {33--34},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00023},
doi = {10.1109/CASES55004.2022.00023},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ReaughS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchlaisZL22,
author = {David J. Schlais and
Heng Zhuo and
Mikko H. Lipasti},
title = {Work-in-Progress: NoRF: {A} Case Against Register File Operands in
Tightly-Coupled Accelerators},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {33--34},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00028},
doi = {10.1109/CASES55004.2022.00028},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchlaisZL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SeyoumGCC22,
author = {Biruk B. Seyoum and
Davide Giri and
Kuan{-}Lin Chiu and
Luca P. Carloni},
title = {Work-in-Progress: An Open-Source Platform for Design and Programming
of Partially Reconfigurable Heterogeneous SoCs},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {25--26},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00019},
doi = {10.1109/CASES55004.2022.00019},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SeyoumGCC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangWJSHY22,
author = {Jiachen Wang and
Xiaohang Wang and
Yingtao Jiang and
Amit Kumar Singh and
Letian Huang and
Mei Yang},
title = {On Evaluation of On-chip Thermal Covert Channel Attacks},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {9--10},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00011},
doi = {10.1109/CASES55004.2022.00011},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WangWJSHY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WatanabeKNTM22,
author = {Yoshikazu Watanabe and
Yuki Kobayashi and
Noboru Nakajima and
Takashi Takenaka and
Hiroyoshi Miyano},
title = {Work-in-Progress: Object Detection Acceleration Method by Improving
Execution Efficiency of {AI} Device},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {15--16},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00014},
doi = {10.1109/CASES55004.2022.00014},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WatanabeKNTM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangLYSDL22,
author = {Jinfeng Yang and
Bingzhe Li and
Jianjun Yuan and
Zhaoyan Shen and
Hung{-}Chang Du and
David J. Lilja},
title = {Work-in-Progress: ExpCache: Online-Learning based Cache Replacement
Policy for Non-Volatile Memory},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {7--8},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00010},
doi = {10.1109/CASES55004.2022.00010},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/YangLYSDL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangSCXHWGQ22,
author = {Gangqiang Yang and
Zhengyuan Shi and
Cheng Chen and
Hailiang Xiong and
Honggang Hu and
Zhiguo Wan and
Keke Gai and
Meikang Qiu},
title = {Work-in-Progress: Towards a Smaller than Grain Stream Cipher: Optimized
{FPGA} Implementations of Fruit-80},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {19--20},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00016},
doi = {10.1109/CASES55004.2022.00016},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangSCXHWGQ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhouXLJCLF22,
author = {Shize Zhou and
Yongqi Xue and
Siyue Li and
Jinlun Ji and
Tong Cheng and
Li Li and
Yuxiang Fu},
title = {Work in Progress: {ACAC:} An Adaptive Congestion-aware Approximate
Communication Mechanism for Network-on-Chip Systems},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
pages = {5--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022.00009},
doi = {10.1109/CASES55004.2022.00009},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhouXLJCLF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2022,
title = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2022, Shanghai, China, October 7-14,
2022},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CASES55004.2022},
doi = {10.1109/CASES55004.2022},
isbn = {978-1-6654-7296-8},
timestamp = {Wed, 16 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0001SSM21,
author = {Shounak Chakraborty and
Sangeet Saha and
Magnus Sj{\"{a}}lander and
Klaus D. McDonald{-}Maier},
title = {Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive
QoS Maximization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {62:1--61:25},
year = {2021},
url = {https://doi.org/10.1145/3476993},
doi = {10.1145/3476993},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/0001SSM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/00030CL21,
author = {Quan Zhou and
Guohui Li and
Qi Chen and
Jianjun Li},
title = {Guaranteeing Timely Response to Changes of Monitored Objects by Assigning
Deadlines and Periods to Tasks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {96:1--96:22},
year = {2021},
url = {https://doi.org/10.1145/3477027},
doi = {10.1145/3477027},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/00030CL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0003L021,
author = {Quan Zhou and
Jianjun Li and
Guohui Li},
title = {Excluding Parallel Execution to Improve Global Fixed Priority Response
Time Analysis},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {104:1--104:24},
year = {2021},
url = {https://doi.org/10.1145/3477035},
doi = {10.1145/3477035},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/0003L021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0004S21,
author = {Nikhil Kumar Singh and
Indranil Saha},
title = {Specification Guided Automated Synthesis of Feedback Controllers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {80:1--80:26},
year = {2021},
url = {https://doi.org/10.1145/3477011},
doi = {10.1145/3477011},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/0004S21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AnO21,
author = {Sizhe An and
{\"{U}}mit Y. Ogras},
title = {{MARS:} mmWave-based Assistive Rehabilitation System for Smart Healthcare},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {72:1--72:22},
year = {2021},
url = {https://doi.org/10.1145/3477003},
doi = {10.1145/3477003},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/AnO21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AnZZZ21,
author = {Jie An and
Bohua Zhan and
Naijun Zhan and
Miaomiao Zhang},
title = {Learning Nondeterministic Real-Time Automata},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {99:1--99:26},
year = {2021},
url = {https://doi.org/10.1145/3477030},
doi = {10.1145/3477030},
timestamp = {Tue, 25 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AnZZZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BaeO21,
author = {Kyungmin Bae and
Peter Csaba {\"{O}}lveczky},
title = {{MSYNC:} {A} Generalized Formal Design Pattern for Virtually Synchronous
Multirate Cyber-physical Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {105:1--105:26},
year = {2021},
url = {https://doi.org/10.1145/3477036},
doi = {10.1145/3477036},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/BaeO21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BohrerP21,
author = {Rose Bohrer and
Andr{\'{e}} Platzer},
title = {Structured Proofs for Adversarial Cyber-Physical Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {93:1--93:26},
year = {2021},
url = {https://doi.org/10.1145/3477024},
doi = {10.1145/3477024},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BohrerP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BourkeJPP21,
author = {Timothy Bourke and
Paul Jeanmaire and
Basile Pesin and
Marc Pouzet},
title = {Verified Lustre Normalization with Node Subsampling},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {98:1--98:25},
year = {2021},
url = {https://doi.org/10.1145/3477041},
doi = {10.1145/3477041},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/BourkeJPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/CanescheCROMJN021,
author = {Michael Canesche and
Westerley Carvalho and
Lucas Reis and
Matheus Aguilar de Oliveira and
Salles V. G. Magalh{\~{a}}es and
Peter Jamieson and
Jos{\'{e}} Augusto Miranda Nacif and
Ricardo Ferreira},
title = {You Only Traverse Twice: {A} {YOTT} Placement, Routing, and Timing
Approach for CGRAs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {52:1--52:25},
year = {2021},
url = {https://doi.org/10.1145/3477038},
doi = {10.1145/3477038},
timestamp = {Tue, 05 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/CanescheCROMJN021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenKH21,
author = {Wei{-}Ming Chen and
Tei{-}Wei Kuo and
Pi{-}Cheng Hsiu},
title = {Heterogeneity-aware Multicore Synchronization for Intermittent Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {61:1--61:22},
year = {2021},
url = {https://doi.org/10.1145/3476992},
doi = {10.1145/3476992},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ChenKH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenLYLQ21,
author = {Zewei Chen and
Hang Lei and
Maolin Yang and
Yong Liao and
Lei Qiao},
title = {A Hierarchical Hybrid Locking Protocol for Parallel Real-Time Tasks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {86:1--86:22},
year = {2021},
url = {https://doi.org/10.1145/3477017},
doi = {10.1145/3477017},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ChenLYLQ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenZ0LLL21,
author = {Hui Chen and
Zihao Zhang and
Peng Chen and
Xiangzhong Luo and
Shiqing Li and
Weichen Liu},
title = {{MARCO:} {A} High-performance Task Mapping and Routing Co-optimization
Framework for Point-to-Point NoC-based Heterogeneous Computing Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {54:1--54:21},
year = {2021},
url = {https://doi.org/10.1145/3476985},
doi = {10.1145/3476985},
timestamp = {Wed, 28 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ChenZ0LLL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Cho21,
author = {Hyungmin Cho},
title = {RiSA: {A} Reinforced Systolic Array for Depthwise Convolutions and
Embedded Tensor Reshaping},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {53:1--53:20},
year = {2021},
url = {https://doi.org/10.1145/3476984},
doi = {10.1145/3476984},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Cho21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/FasfousVFVSDUNM21,
author = {Nael Fasfous and
Manoj Rohit Vemparala and
Alexander Frickenstein and
Emanuele Valpreda and
Driton Salihu and
Nguyen Anh Vu Doan and
Christian Unger and
Naveen Shankar Nagaraja and
Maurizio Martina and
Walter Stechele},
title = {HW-FlowQ: {A} Multi-Abstraction Level {HW-CNN} Co-design Quantization
Methodology},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {66:1--66:25},
year = {2021},
url = {https://doi.org/10.1145/3476997},
doi = {10.1145/3476997},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/FasfousVFVSDUNM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/FengNE21,
author = {Yeli Feng and
Daniel Jun Xian Ng and
Arvind Easwaran},
title = {Improving Variational Autoencoder based Out-of-Distribution Detection
for Embedded Real-time Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {95:1--95:26},
year = {2021},
url = {https://doi.org/10.1145/3477026},
doi = {10.1145/3477026},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/FengNE21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GunzelHCC21,
author = {Mario G{\"{u}}nzel and
Christian Hakert and
Kuan{-}Hsun Chen and
Jian{-}Jia Chen},
title = {{HEART:} Hybrid Memory and Energy-Aware Real-Time Scheduling for Multi-Processor
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {88:1--88:23},
year = {2021},
url = {https://doi.org/10.1145/3477019},
doi = {10.1145/3477019},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/GunzelHCC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/HosseiniMYWC21,
author = {Fateme S. Hosseini and
Fanruo Meng and
Chengmo Yang and
Wujie Wen and
Rosario Cammarota},
title = {Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free
Weight Approximation},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {85:1--85:21},
year = {2021},
url = {https://doi.org/10.1145/3477016},
doi = {10.1145/3477016},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/HosseiniMYWC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/IvanovJHVAB21,
author = {Radoslav Ivanov and
Kishor Jothimurugan and
Steve Hsu and
Shaan Vaidya and
Rajeev Alur and
Osbert Bastani},
title = {Compositional Learning and Verification of Neural Network Controllers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {92:1--92:26},
year = {2021},
url = {https://doi.org/10.1145/3477023},
doi = {10.1145/3477023},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/IvanovJHVAB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/JiaSSH21,
author = {Zhenge Jia and
Yiyu Shi and
Samir Saba and
Jingtong Hu},
title = {On-device Prior Knowledge Incorporated Learning for Personalized Atrial
Fibrillation Detection},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {56:1--56:25},
year = {2021},
url = {https://doi.org/10.1145/3476987},
doi = {10.1145/3476987},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/JiaSSH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/JoardarD0CP21,
author = {Biresh Kumar Joardar and
Janardhan Rao Doppa and
Hai Li and
Krishnendu Chakrabarty and
Partha Pratim Pande},
title = {Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {55:1--55:23},
year = {2021},
url = {https://doi.org/10.1145/3476986},
doi = {10.1145/3476986},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/JoardarD0CP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KhasanovRMGC21,
author = {Robert Khasanov and
Julian Robledo and
Christian Menard and
Andr{\'{e}}s Goens and
Jer{\'{o}}nimo Castrill{\'{o}}n},
title = {Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing
in Wireless Networks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {60:1--60:26},
year = {2021},
url = {https://doi.org/10.1145/3476991},
doi = {10.1145/3476991},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KhasanovRMGC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KorolJRB21,
author = {Guilherme Korol and
Michael Guilherme Jordan and
Mateus Beck Rutzig and
Antonio Carlos Schneider Beck},
title = {Synergistically Exploiting {CNN} Pruning and {HLS} Versioning for
Adaptive Inference on Multi-FPGAs at the Edge},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {59:1--59:26},
year = {2021},
url = {https://doi.org/10.1145/3476990},
doi = {10.1145/3476990},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KorolJRB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KrishnanMPCSO021,
author = {Gokul Krishnan and
Sumit K. Mandal and
Manvitha Pannala and
Chaitali Chakrabarti and
Jae{-}Sun Seo and
{\"{U}}mit Y. Ogras and
Yu Cao},
title = {{SIAM:} Chiplet-based Scalable In-Memory Acceleration with Mesh for
Deep Neural Networks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {68:1--68:24},
year = {2021},
url = {https://doi.org/10.1145/3476999},
doi = {10.1145/3476999},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KrishnanMPCSO021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KukkalaTP21,
author = {Vipin Kumar Kukkala and
Sooryaa Vignesh Thiruloga and
Sudeep Pasricha},
title = {{LATTE:} {LSTM} Self-Attention based Anomaly Detection in {E} mbedded
Automotive Platforms},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {67:1--67:23},
year = {2021},
url = {https://doi.org/10.1145/3476998},
doi = {10.1145/3476998},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KukkalaTP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KuruvilaMKB21,
author = {Abraham Peedikayil Kuruvila and
Anushree Mahapatra and
Ramesh Karri and
Kanad Basu},
title = {Hardware Performance Counters: Ready-Made vs Tailor-Made},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {65:1--65:26},
year = {2021},
url = {https://doi.org/10.1145/3476996},
doi = {10.1145/3476996},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KuruvilaMKB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeeKSK0021,
author = {Gyeongmin Lee and
Bongjun Kim and
Seungbin Song and
Changsu Kim and
Jong Kim and
Hanjun Kim},
title = {Precise Correlation Extraction for IoT Fault Detection With Concurrent
Activities},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {94:1--94:21},
year = {2021},
url = {https://doi.org/10.1145/3477025},
doi = {10.1145/3477025},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LeeKSK0021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Li0G21,
author = {Haoran Li and
Chenyang Lu and
Christopher D. Gill},
title = {RT-ZooKeeper: Taming the Recovery Latency of a Coordination Service},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {103:1--103:22},
year = {2021},
url = {https://doi.org/10.1145/3477034},
doi = {10.1145/3477034},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/Li0G21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LiMOM21,
author = {Guihong Li and
Sumit K. Mandal and
{\"{U}}mit Y. Ogras and
Radu Marculescu},
title = {{FLASH:} Fast Neural Architecture Search with Hardware Optimization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {63:1--63:26},
year = {2021},
url = {https://doi.org/10.1145/3476994},
doi = {10.1145/3476994},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LiMOM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LuoJ0ZCZ21,
author = {Yongping Luo and
Peiquan Jin and
Zhou Zhang and
Junchen Zhang and
Bin Cheng and
Qinglin Zhang},
title = {Two Birds With One Stone: Boosting Both Search and Write Performance
for Tree Indices on Persistent Memory},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {50:1--50:25},
year = {2021},
url = {https://doi.org/10.1145/3476981},
doi = {10.1145/3476981},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LuoJ0ZCZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MaSB021,
author = {Meiyi Ma and
John A. Stankovic and
Ezio Bartocci and
Lu Feng},
title = {Predictive Monitoring with Logic-Calibrated Uncertainty for Cyber-Physical
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {101:1--101:25},
year = {2021},
url = {https://doi.org/10.1145/3477032},
doi = {10.1145/3477032},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MaSB021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MaityGDB21,
author = {Srijeeta Maity and
Anirban Ghose and
Soumyajit Dey and
Swarnendu Biswas},
title = {Thermal-aware Adaptive Platform Management for Heterogeneous Embedded
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {97:1--97:28},
year = {2021},
url = {https://doi.org/10.1145/3477028},
doi = {10.1145/3477028},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MaityGDB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MaityYSCLKDD21,
author = {Biswadip Maity and
Saehanseul Yi and
Dongjoo Seo and
Leming Cheng and
Sung{-}Soo Lim and
Jong{-}Chan Kim and
Bryan Donyanavard and
Nikil D. Dutt},
title = {Chauffeur: Benchmark Suite for Design and End-to-End Analysis of Self-Driving
Vehicles on Embedded Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {74:1--74:22},
year = {2021},
url = {https://doi.org/10.1145/3477005},
doi = {10.1145/3477005},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MaityYSCLKDD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MalawadeOLF21,
author = {Arnav V. Malawade and
Mohanad Odema and
Sebastien Lajeunesse{-}DeGroot and
Mohammad Abdullah Al Faruque},
title = {{SAGE:} {A} Split-Architecture Methodology for Efficient End-to-End
Autonomous Vehicle Control},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {75:1--75:22},
year = {2021},
url = {https://doi.org/10.1145/3477006},
doi = {10.1145/3477006},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MalawadeOLF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MendisKH21,
author = {Hashan Roshantha Mendis and
Chih{-}Kai Kang and
Pi{-}Cheng Hsiu},
title = {Intermittent-Aware Neural Architecture Search},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {64:1--64:27},
year = {2021},
url = {https://doi.org/10.1145/3476995},
doi = {10.1145/3476995},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MendisKH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/NieWZ21,
author = {Shiqiang Nie and
Weiguo Wu and
Chi Zhang},
title = {Data Pattern Aware Reliability Enhancement Scheme for 3D Solid-State
Drives},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {69:1--69:20},
year = {2021},
url = {https://doi.org/10.1145/3477000},
doi = {10.1145/3477000},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/NieWZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/OhSKY21,
author = {Chanyoung Oh and
Junhyuk So and
Sumin Kim and
Youngmin Yi},
title = {Exploiting Activation Sparsity for Fast {CNN} Inference on Mobile
GPUs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {77:1--77:25},
year = {2021},
url = {https://doi.org/10.1145/3477008},
doi = {10.1145/3477008},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/OhSKY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/OzenO21,
author = {Elbruz Ozen and
Alex Orailoglu},
title = {{SNR:} Squeezing Numerical Range Defuses Bit Error Vulnerability Surface
in Deep Neural Networks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {76:1--76:25},
year = {2021},
url = {https://doi.org/10.1145/3477007},
doi = {10.1145/3477007},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/OzenO21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ParraviciniCSPS21,
author = {Daniele Parravicini and
Davide Conficconi and
Emanuele Del Sozzo and
Christian Pilato and
Marco D. Santambrogio},
title = {{CICERO:} {A} Domain-Specific Architecture for Efficient Regular Expression
Matching},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {51:1--51:24},
year = {2021},
url = {https://doi.org/10.1145/3476982},
doi = {10.1145/3476982},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ParraviciniCSPS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/QiuJZLSKN21,
author = {Keni Qiu and
Nicholas Jao and
Kunyu Zhou and
Yongpan Liu and
Jack Sampson and
Mahmut Taylan Kandemir and
Vijaykrishnan Narayanan},
title = {MaxTracker: Continuously Tracking the Maximum Computation Progress
for Energy Harvesting ReRAM-based {CNN} Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {78:1--78:23},
year = {2021},
url = {https://doi.org/10.1145/3477009},
doi = {10.1145/3477009},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/QiuJZLSKN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RabeID21,
author = {Robert Rabe and
Anastasiia Izycheva and
Eva Darulova},
title = {Regime Inference for Sound Floating-Point Optimizations},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {81:1--81:23},
year = {2021},
url = {https://doi.org/10.1145/3477012},
doi = {10.1145/3477012},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RabeID21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchultSGCAR21,
author = {Jasmin Schult and
Daniel David Schwyn and
Michael Giardino and
David A. Cock and
Reto Achermann and
Timothy Roscoe},
title = {Declarative Power Sequencing},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {84:1--84:21},
year = {2021},
url = {https://doi.org/10.1145/3477039},
doi = {10.1145/3477039},
timestamp = {Wed, 21 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SchultSGCAR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SenapatiSK21,
author = {Debabrata Senapati and
Arnab Sarkar and
Chandan Karfa},
title = {{HMDS:} {A} Makespan Minimizing {DAG} Scheduler for Heterogeneous
Distributed Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {106:1--106:26},
year = {2021},
url = {https://doi.org/10.1145/3477037},
doi = {10.1145/3477037},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SenapatiSK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SharifMS21,
author = {Uzair Sharif and
Daniel Mueller{-}Gritschneder and
Ulf Schlichtmann},
title = {{REPAIR:} Control Flow Protection based on Register Pairing Updates
for SW-Implemented {HW} Fault Tolerance},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {70:1--70:22},
year = {2021},
url = {https://doi.org/10.1145/3477001},
doi = {10.1145/3477001},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SharifMS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ShenS0SY021,
author = {Yuheng Shen and
Hao Sun and
Yu Jiang and
Heyuan Shi and
Yixiao Yang and
Wanli Chang},
title = {Rtkaller: State-aware Task Generation for {RTOS} Fuzzing},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {83:1--83:22},
year = {2021},
url = {https://doi.org/10.1145/3477014},
doi = {10.1145/3477014},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ShenS0SY021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SinhaW21,
author = {Soham Sinha and
Richard West},
title = {Towards an Integrated Vehicle Management System in DriveOS},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {82:1--82:24},
year = {2021},
url = {https://doi.org/10.1145/3477013},
doi = {10.1145/3477013},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SinhaW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SunGST021,
author = {Jinghao Sun and
Nan Guan and
Rongxiao Shi and
Guozhen Tan and
Wang Yi},
title = {Schedulability Analysis for Timed Automata With Tasks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {89:1--89:26},
year = {2021},
url = {https://doi.org/10.1145/3477020},
doi = {10.1145/3477020},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SunGST021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SunnyMNP21,
author = {Febin P. Sunny and
Asif Mirza and
Mahdi Nikdast and
Sudeep Pasricha},
title = {{ROBIN:} {A} Robust Optical Binary Neural Network Accelerator},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {57:1--57:24},
year = {2021},
url = {https://doi.org/10.1145/3476988},
doi = {10.1145/3476988},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SunnyMNP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TaunerT21,
author = {Stefan Tauner and
Mario Telesklav},
title = {Comparative Analysis and Enhancement of CFG-based Hardware-Assisted
{CFI} Schemes},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {58:1--58:25},
year = {2021},
url = {https://doi.org/10.1145/3476989},
doi = {10.1145/3476989},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/TaunerT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/VoudourisSP21,
author = {Petros Voudouris and
Per Stenstr{\"{o}}m and
Risat Pathan},
title = {Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {87:1--87:25},
year = {2021},
url = {https://doi.org/10.1145/3477018},
doi = {10.1145/3477018},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/VoudourisSP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangHKL021,
author = {Zhilu Wang and
Chao Huang and
Hyoseung Kim and
Wenchao Li and
Qi Zhu},
title = {Cross-Layer Adaptation with Safety-Assured Proactive Task Job Skipping},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {100:1--100:25},
year = {2021},
url = {https://doi.org/10.1145/3477031},
doi = {10.1145/3477031},
timestamp = {Mon, 05 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WangHKL021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangTC21,
author = {Yong{-}Xuan Wang and
Chung{-}Hsuan Tsai and
Li{-}Pin Chang},
title = {Killing Processes or Killing Flash? Escaping from the Dilemma Using
Lightweight, Compression-Aware Swap for Mobile Devices},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {90:1--90:24},
year = {2021},
url = {https://doi.org/10.1145/3477021},
doi = {10.1145/3477021},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/WangTC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WeissRSW21,
author = {Kevin Weiss and
Michel Rottleuthner and
Thomas C. Schmidt and
Matthias W{\"{a}}hlisch},
title = {PHiLIP on the HiL: Automated Multi-Platform {OS} Testing With External
Reference Devices},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {91:1--91:26},
year = {2021},
url = {https://doi.org/10.1145/3477040},
doi = {10.1145/3477040},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/WeissRSW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YangO21,
author = {Liren Yang and
Necmiye Ozay},
title = {Synthesis-guided Adversarial Scenario Generation for Gray-box Feedback
Control Systems with Sensing Imperfections},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {102:1--102:25},
year = {2021},
url = {https://doi.org/10.1145/3477033},
doi = {10.1145/3477033},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/YangO21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhangLKCSL21,
author = {Lin Zhang and
Pengyuan Lu and
Fanxin Kong and
Xin Chen and
Oleg Sokolsky and
Insup Lee},
title = {Real-time Attack-recovery for Cyber-physical Systems Using Linear-quadratic
Regulator},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {79:1--79:24},
year = {2021},
url = {https://doi.org/10.1145/3477010},
doi = {10.1145/3477010},
timestamp = {Fri, 21 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ZhangLKCSL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhangWZTH21,
author = {Xinyi Zhang and
Yawen Wu and
Peipei Zhou and
Xulong Tang and
Jingtong Hu},
title = {Algorithm-hardware Co-design of Attention Mechanism on {FPGA} Devices},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {71:1--71:24},
year = {2021},
url = {https://doi.org/10.1145/3477002},
doi = {10.1145/3477002},
timestamp = {Tue, 30 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ZhangWZTH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhugeZSXLZ21,
author = {Qingfeng Zhuge and
Hao Zhang and
Edwin Hsing{-}Mean Sha and
Rui Xu and
Jun Liu and
Shengyu Zhang},
title = {Exploring Efficient Architectures on Remote In-Memory {NVM} over {RDMA}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {73:1--73:20},
year = {2021},
url = {https://doi.org/10.1145/3477004},
doi = {10.1145/3477004},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ZhugeZSXLZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AlanCH21,
author = {Tanfer Alan and
Jorge Castro{-}God{\'{\i}}nez and
J{\"{o}}rg Henkel},
editor = {{\"{U}}mit Y. Ogras and
Preeti Ranjan Panda},
title = {Multiple approximate instances in neural processing units for energy-efficient
circuit synthesis: work-in-progress},
booktitle = {{CASES} '21: Proceedings of the 2021 International Conference on Compilers,
Architectures, and Synthesis for Embedded Systems, Virtual Event,
October 8 - 15, 2021},
pages = {3--5},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3451939.3477594},
doi = {10.1145/3451939.3477594},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AlanCH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MinKE21,
author = {Hyemi Min and
Jungyoon Kwon and
Bernhard Egger},
editor = {{\"{U}}mit Y. Ogras and
Preeti Ranjan Panda},
title = {Fast generation of optimized execution plans for parameterizable {CNN}
accelerators: work-in-progress},
booktitle = {{CASES} '21: Proceedings of the 2021 International Conference on Compilers,
Architectures, and Synthesis for Embedded Systems, Virtual Event,
October 8 - 15, 2021},
pages = {1--2},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3451939.3477593},
doi = {10.1145/3451939.3477593},
timestamp = {Thu, 09 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MinKE21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2021,
editor = {{\"{U}}mit Y. Ogras and
Preeti Ranjan Panda},
title = {{CASES} '21: Proceedings of the 2021 International Conference on Compilers,
Architectures, and Synthesis for Embedded Systems, Virtual Event,
October 8 - 15, 2021},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3451939},
doi = {10.1145/3451939},
isbn = {978-1-4503-8378-3},
timestamp = {Thu, 09 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Castro-Godinez020,
author = {Jorge Castro{-}God{\'{\i}}nez and
Muhammad Shafique and
J{\"{o}}rg Henkel},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {Towards Quality-Driven Approximate Software Generation for Accurate
Hardware: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {12--14},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243814},
doi = {10.1109/CASES51649.2020.9243814},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Castro-Godinez020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DuGX020,
author = {Yazhi Du and
Jihua Gu and
Zhongzhe Xiao and
Min Huang},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {Work-in-Process: Smart Migration for Reliability Enhancement of 3D
{TLC} {NAND} Flash Storage Systems},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {4--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243811},
doi = {10.1109/CASES51649.2020.9243811},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DuGX020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuW20,
author = {Xiao Hu and
Yaohua Wang},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {A Lifelong Health Monitoring Framework in Processors: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {6--8},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243808},
doi = {10.1109/CASES51649.2020.9243808},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HuW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimKH20,
author = {Hwiwon Kim and
Hyunjun Kim and
Hwansoo Han},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {Effective Profiling for Data-Intensive {GPU} Programs: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {17--19},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243727},
doi = {10.1109/CASES51649.2020.9243727},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkKH20,
author = {Dojin Park and
Hyunjun Kim and
Hwansoo Han},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {Page Reuse in Cyclic Thrashing of {GPU} Under Oversubscription: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {15--16},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243742},
doi = {10.1109/CASES51649.2020.9243742},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkKH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TangWCM20,
author = {Yi Tang and
Donghang Wu and
Yongzhi Cao and
Marian Margraf},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {The Shift {PUF:} Technique for Squaring the Machine Learning Complexity
of Arbiter-based PUFs: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {9--11},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243781},
doi = {10.1109/CASES51649.2020.9243781},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TangWCM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YuZPAHT20,
author = {Shuyuan Yu and
Han Zhou and
Shaoyi Peng and
Hussam Amrouch and
J{\"{o}}rg Henkel and
Sheldon X.{-}D. Tan},
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {Run-Time Accuracy Reconfigurable Stochastic Computing for Dynamic
Reliability and Power Management: Work-in-Progress},
booktitle = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
pages = {1--3},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CASES51649.2020.9243711},
doi = {10.1109/CASES51649.2020.9243711},
timestamp = {Wed, 28 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YuZPAHT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2020,
editor = {Tulika Mitra and
Andreas Gerstlauer},
title = {International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems, {CASES} 2020, Singapore, September 20-25, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9243670/proceeding},
isbn = {978-1-7281-9192-8},
timestamp = {Tue, 10 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0002GHHL19,
author = {Andreas Ziegler and
Julian Geus and
Bernhard Heinloth and
Timo H{\"{o}}nig and
Daniel Lohmann},
title = {Honey, {I} Shrunk the ELFs: Lightweight Binary Tailoring of Shared
Libraries},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {102:1--102:23},
year = {2019},
url = {https://doi.org/10.1145/3358222},
doi = {10.1145/3358222},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/0002GHHL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0044ZBP19,
author = {Yu Wang and
Mojtaba Zarei and
Borzoo Bonakdarpour and
Miroslav Pajic},
title = {Statistical Verification of Hyperproperties for Cyber-Physical Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {92:1--92:23},
year = {2019},
url = {https://doi.org/10.1145/3358232},
doi = {10.1145/3358232},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/0044ZBP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Al-BatainehRR19,
author = {Omar I. Al{-}Bataineh and
David S. Rosenblum and
Mark Reynolds},
title = {Efficient Decentralized {LTL} Monitoring Framework Using Tableau Technique},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {87:1--87:21},
year = {2019},
url = {https://doi.org/10.1145/3358219},
doi = {10.1145/3358219},
timestamp = {Fri, 02 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Al-BatainehRR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ArrestierDJM19,
author = {Florian Arrestier and
Karol Desnos and
Eduardo Ju{\'{a}}rez and
Daniel M{\'{e}}nard},
title = {Numerical Representation of Directed Acyclic Graphs for Efficient
Dataflow Embedded Resource Allocation},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {101:1--101:22},
year = {2019},
url = {https://doi.org/10.1145/3358225},
doi = {10.1145/3358225},
timestamp = {Thu, 06 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ArrestierDJM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AwanBSAT19,
author = {Muhammad Ali Awan and
Konstantinos Bletsas and
Pedro F. Souto and
Benny Akesson and
Eduardo Tovar},
title = {Techniques and Analysis for Mixed-criticality Scheduling with Mode-dependent
Server Execution Budgets},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {109:1--109:23},
year = {2019},
url = {https://doi.org/10.1145/3358234},
doi = {10.1145/3358234},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AwanBSAT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Bajczi0M19,
author = {Levente Bajczi and
Andr{\'{a}}s V{\"{o}}r{\"{o}}s and
Vince Moln{\'{a}}r},
title = {Will My Program Break on This Faulty Processor?: Formal Analysis of
Hardware Fault Activations in Concurrent Embedded Software},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {89:1--89:21},
year = {2019},
url = {https://doi.org/10.1145/3358238},
doi = {10.1145/3358238},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Bajczi0M19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BarijoughZG19,
author = {Kamyar Mirzazad Barijough and
Zhuoran Zhao and
Andreas Gerstlauer},
title = {Quality/Latency-Aware Real-time Scheduling of Distributed Streaming
IoT Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {83:1--83:23},
year = {2019},
url = {https://doi.org/10.1145/3358209},
doi = {10.1145/3358209},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BarijoughZG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BaumeisterFST19,
author = {Jan Baumeister and
Bernd Finkbeiner and
Maximilian Schwenger and
Hazem Torfah},
title = {{FPGA} Stream-Monitoring of Real-time Properties},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {88:1--88:24},
year = {2019},
url = {https://doi.org/10.1145/3358220},
doi = {10.1145/3358220},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/BaumeisterFST19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BhardwajLSM19,
author = {Kartikeya Bhardwaj and
Chingyi Lin and
Anderson L. Sartor and
Radu Marculescu},
title = {Memory- and Communication-Aware Model Compression for Distributed
Deep Learning Inference on IoT},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {82:1--82:22},
year = {2019},
url = {https://doi.org/10.1145/3358205},
doi = {10.1145/3358205},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BhardwajLSM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BhatTALO19,
author = {Ganapati Bhat and
Yigit Tuncel and
Sizhe An and
Hyung Gyu Lee and
{\"{U}}mit Y. Ogras},
title = {An Ultra-Low Energy Human Activity Recognition Accelerator for Wearable
Health Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {49:1--49:22},
year = {2019},
url = {https://doi.org/10.1145/3358175},
doi = {10.1145/3358175},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/BhatTALO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BraisP19,
author = {Hadi Brais and
Preeti Ranjan Panda},
title = {Alleria: An Advanced Memory Access Profiling Framework},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {81:1--81:22},
year = {2019},
url = {https://doi.org/10.1145/3358193},
doi = {10.1145/3358193},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BraisP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Castro-Godinez019,
author = {Jorge Castro{-}God{\'{\i}}nez and
Muhammad Shafique and
J{\"{o}}rg Henkel},
title = {ECAx: Balancing Error Correction Costs in Approximate Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {48:1--48:20},
year = {2019},
url = {https://doi.org/10.1145/3358179},
doi = {10.1145/3358179},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/Castro-Godinez019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenDXPZ19,
author = {Zhengguo Chen and
Quan Deng and
Nong Xiao and
Kirk Pruhs and
Youtao Zhang},
title = {DWMAcc: Accelerating Shift-based CNNs with Domain Wall Memories},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {69:1--69:19},
year = {2019},
url = {https://doi.org/10.1145/3358199},
doi = {10.1145/3358199},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ChenDXPZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenLJHG19,
author = {Peng Chen and
Weichen Liu and
Xu Jiang and
Qingqiang He and
Nan Guan},
title = {Timing-Anomaly Free Dynamic Scheduling of Conditional {DAG} Tasks
on Multi-Core Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {91:1--91:19},
year = {2019},
url = {https://doi.org/10.1145/3358236},
doi = {10.1145/3358236},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ChenLJHG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChengD19,
author = {Zhongqi Cheng and
Rainer D{\"{o}}mer},
title = {Analyzing Variable Entanglement for Parallel Simulation of SystemC
{TLM-2.0} Models},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {79:1--79:20},
year = {2019},
url = {https://doi.org/10.1145/3358194},
doi = {10.1145/3358194},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ChengD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DaiC0B19,
author = {Xiaotian Dai and
Wanli Chang and
Shuai Zhao and
Alan Burns},
title = {A Dual-Mode Strategy for Performance-Maximisation and Resource-Efficient
{CPS} Design},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {85:1--85:20},
year = {2019},
url = {https://doi.org/10.1145/3358213},
doi = {10.1145/3358213},
timestamp = {Thu, 17 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/DaiC0B19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DaveKALS19,
author = {Shail Dave and
Youngbin Kim and
Sasikanth Avancha and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {dMazeRunner: Executing Perfectly Nested Loops on Dataflow Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {70:1--70:27},
year = {2019},
url = {https://doi.org/10.1145/3358198},
doi = {10.1145/3358198},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/DaveKALS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DeshwalJJDP19,
author = {Aryan Deshwal and
Nitthilan Kannappan Jayakodi and
Biresh Kumar Joardar and
Janardhan Rao Doppa and
Partha Pratim Pande},
title = {{MOOS:} {A} Multi-Objective Design Space Exploration and Optimization
Framework for NoC Enabled Manycore Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {77:1--77:23},
year = {2019},
url = {https://doi.org/10.1145/3358206},
doi = {10.1145/3358206},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/DeshwalJJDP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DuggiralaB19,
author = {Parasara Sridhar Duggirala and
Stanley Bak},
title = {Aggregation Strategies in Reachable Set Computation of Hybrid Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {99:1--99:21},
year = {2019},
url = {https://doi.org/10.1145/3358214},
doi = {10.1145/3358214},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/DuggiralaB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DugoLMAN19,
author = {Alexy Torres Aurora Dugo and
Jean{-}Baptiste Lefoul and
Felipe Gohring de Magalhaes and
Dahman Assal and
Gabriela Nicolescu},
title = {Cache Locking Content Selection Algorithms for {ARINC-653} Compliant
{RTOS}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {76:1--76:20},
year = {2019},
url = {https://doi.org/10.1145/3358196},
doi = {10.1145/3358196},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/DugoLMAN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DurrBCC19,
author = {Marco D{\"{u}}rr and
Georg von der Br{\"{u}}ggen and
Kuan{-}Hsun Chen and
Jian{-}Jia Chen},
title = {End-to-End Timing Analysis of Sporadic Cause-Effect Chains in Distributed
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {58:1--58:24},
year = {2019},
url = {https://doi.org/10.1145/3358181},
doi = {10.1145/3358181},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/DurrBCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/FongSVG19,
author = {Daniel D. Fong and
Vivek J. Srinivasan and
Kourosh Vali and
Soheil Ghiasi},
title = {Optode Design Space Exploration for Clinically-robust Non-invasive
Fetal Oximetry},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {63:1--63:22},
year = {2019},
url = {https://doi.org/10.1145/3358207},
doi = {10.1145/3358207},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/FongSVG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GhoshD19,
author = {Bineet Ghosh and
Parasara Sridhar Duggirala},
title = {Robust Reachable Set: Accounting for Uncertainties in Linear Dynamical
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {97:1--97:22},
year = {2019},
url = {https://doi.org/10.1145/3358229},
doi = {10.1145/3358229},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/GhoshD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GoncalvesMC19,
author = {Larissa Rozales Gon{\c{c}}alves and
Rafael F{\~{a}}o de Moura and
Luigi Carro},
title = {Aggressive Energy Reduction for Video Inference with Software-only
Strategies},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {46:1--46:20},
year = {2019},
url = {https://doi.org/10.1145/3358174},
doi = {10.1145/3358174},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/GoncalvesMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/HuangFLC019,
author = {Chao Huang and
Jiameng Fan and
Wenchao Li and
Xin Chen and
Qi Zhu},
title = {ReachNN: Reachability Analysis of Neural-Network Controlled Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {106:1--106:22},
year = {2019},
url = {https://doi.org/10.1145/3358228},
doi = {10.1145/3358228},
timestamp = {Wed, 01 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/HuangFLC019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/JiangSZ0ZSH19,
author = {Weiwen Jiang and
Edwin H.{-}M. Sha and
Xinyi Zhang and
Lei Yang and
Qingfeng Zhuge and
Yiyu Shi and
Jingtong Hu},
title = {Achieving Super-Linear Speedup across Multi-FPGA for Real-Time {DNN}
Inference},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {67:1--67:23},
year = {2019},
url = {https://doi.org/10.1145/3358192},
doi = {10.1145/3358192},
timestamp = {Tue, 30 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/JiangSZ0ZSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimLKOHJO19,
author = {Jihye Kim and
Jiwon Lee and
Hankyung Ko and
Donghwan Oh and
Semin Han and
Gwonho Jeong and
Hyunok Oh},
title = {AuthCropper: Authenticated Image Cropper for Privacy Preserving Surveillance
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {62:1--62:17},
year = {2019},
url = {https://doi.org/10.1145/3358195},
doi = {10.1145/3358195},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KimLKOHJO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimPKYJM19,
author = {Minsu Kim and
Jeong{-}Keun Park and
Sungyeol Kim and
Insu Yang and
Hyunsoo Jung and
Soo{-}Mook Moon},
title = {Output-based Intermediate Representation for Translation of Test-pattern
Program},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {55:1--55:22},
year = {2019},
url = {https://doi.org/10.1145/3358186},
doi = {10.1145/3358186},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KimPKYJM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KyriakisDB19,
author = {Panagiotis Kyriakis and
Jyotirmoy V. Deshmukh and
Paul Bogdan},
title = {Specification Mining and Robust Design under Uncertainty: {A} Stochastic
Temporal Logic Approach},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {96:1--96:21},
year = {2019},
url = {https://doi.org/10.1145/3358231},
doi = {10.1145/3358231},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KyriakisDB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LalP19,
author = {Ratan Lal and
Pavithra Prabhakar},
title = {Counterexample Guided Abstraction Refinement for Polyhedral Probabilistic
Hybrid Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {98:1--98:23},
year = {2019},
url = {https://doi.org/10.1145/3358217},
doi = {10.1145/3358217},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LalP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeeSC19,
author = {Youngmoon Lee and
Kang G. Shin and
Hoon Sung Chwa},
title = {Thermal-Aware Scheduling for Integrated CPUs-GPU Platforms},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {90:1--90:25},
year = {2019},
url = {https://doi.org/10.1145/3358235},
doi = {10.1145/3358235},
timestamp = {Fri, 21 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LeeSC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeipnitzN19,
author = {Marcos T. Leipnitz and
Gabriel L. Nazar},
title = {High-Level Synthesis of Approximate Designs under Real-Time Constraints},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {59:1--59:21},
year = {2019},
url = {https://doi.org/10.1145/3358182},
doi = {10.1145/3358182},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LeipnitzN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LiangCCCLLS19,
author = {Yu{-}Pei Liang and
Tseng{-}Yi Chen and
Yuan{-}Hao Chang and
Shuo{-}Han Chen and
Kam{-}yiu Lam and
Wei{-}Hsin Li and
Wei{-}Kuan Shih},
title = {Enabling Sequential-write-constrained B\({}^{\mbox{+}}\)-tree Index
Scheme to Upgrade Shingled Magnetic Recording Storage Performance},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {66:1--66:20},
year = {2019},
url = {https://doi.org/10.1145/3358201},
doi = {10.1145/3358201},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LiangCCCLLS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LinHLLJL19,
author = {Yi{-}Ting Lin and
Hsiang Hsu and
Shang{-}Chien Lin and
Chung{-}Wei Lin and
Iris Hui{-}Ru Jiang and
Changliu Liu},
title = {Graph-Based Modeling, Scheduling, and Verification for Intersection
Management of Intelligent Vehicles},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {95:1--95:21},
year = {2019},
url = {https://doi.org/10.1145/3358221},
doi = {10.1145/3358221},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LinHLLJL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LuoZ0GJS19,
author = {Zhengxiong Luo and
Feilong Zuo and
Yu Jiang and
Jian Gao and
Xun Jiao and
Jiaguang Sun},
title = {Polar: Function Code Aware Fuzz Testing of {ICS} Protocol},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {93:1--93:22},
year = {2019},
url = {https://doi.org/10.1145/3358227},
doi = {10.1145/3358227},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LuoZ0GJS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MaSHS19,
author = {Chenlin Ma and
Zhaoyan Shen and
Lei Han and
Zili Shao},
title = {{RMW-F:} {A} Design of RMW-Free Cache Using Built-in NAND-Flash for
{SMR} Storage},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {65:1--65:18},
year = {2019},
url = {https://doi.org/10.1145/3358210},
doi = {10.1145/3358210},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MaSHS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MandalAKO19,
author = {Sumit K. Mandal and
Raid Ayoub and
Michael Kishinevsky and
{\"{U}}mit Y. Ogras},
title = {Analytical Performance Models for NoCs with Multiple Priority Traffic
Classes},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {52:1--52:21},
year = {2019},
url = {https://doi.org/10.1145/3358176},
doi = {10.1145/3358176},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MandalAKO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MendisH19,
author = {Hashan Roshantha Mendis and
Pi{-}Cheng Hsiu},
title = {Accumulative Display Updating for Intermittent Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {72:1--72:22},
year = {2019},
url = {https://doi.org/10.1145/3358190},
doi = {10.1145/3358190},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MendisH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MoazzemiMYRD19,
author = {Kasra Moazzemi and
Biswadip Maity and
Saehanseul Yi and
Amir M. Rahmani and
Nikil D. Dutt},
title = {{HESSLE-FREE:} {\textless}u{\textgreater}He{\textless}/u{\textgreater}terogeneou{\textless}u{\textgreater}s{\textless}/u{\textgreater}
{\textless}u{\textgreater}S{\textless}/u{\textgreater}ystems {\textless}u{\textgreater}Le{\textless}/u{\textgreater}veraging
{\textless}u{\textgreater}F{\textless}/u{\textgreater}uzzy Control
for {\textless}u{\textgreater}R{\textless}/u{\textgreater}untim{\textless}u{\textgreater}e{\textless}/u{\textgreater}
Resourc{\textless}u{\textgreater}e{\textless}/u{\textgreater} Management},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {74:1--74:19},
year = {2019},
url = {https://doi.org/10.1145/3358203},
doi = {10.1145/3358203},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MoazzemiMYRD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MohantyGLP19,
author = {Ram Prasad Mohanty and
Hasindu Gamaarachchi and
Andrew J. Lambert and
Sri Parameswaran},
title = {{SWARAM:} Portable Energy and Cost Efficient Embedded System for Genomic
Processing},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {61:1--61:24},
year = {2019},
url = {https://doi.org/10.1145/3358211},
doi = {10.1145/3358211},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MohantyGLP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/OehlertSF19,
author = {Dominic Oehlert and
Selma Saidi and
Heiko Falk},
title = {Code-Inherent Traffic Shaping for Hard Real-Time Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {108:1--108:21},
year = {2019},
url = {https://doi.org/10.1145/3358215},
doi = {10.1145/3358215},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/OehlertSF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PanP19,
author = {Runyu Pan and
Gabriel Parmer},
title = {MxU: Towards Predictable, Flexible, and Efficient Memory Access Control
for the Secure IoT},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {103:1--103:20},
year = {2019},
url = {https://doi.org/10.1145/3358224},
doi = {10.1145/3358224},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PanP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ParkWLAM19,
author = {Sunghyun Park and
Youfeng Wu and
Janghaeng Lee and
Amir Aupov and
Scott A. Mahlke},
title = {Multi-objective Exploration for Practical Optimization Decisions in
Binary Translation},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {57:1--57:19},
year = {2019},
url = {https://doi.org/10.1145/3358185},
doi = {10.1145/3358185},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ParkWLAM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PasseroneRS19,
author = {Roberto Passerone and
{\'{I}}{\~{n}}igo {\'{I}}ncer Romeo and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Coherent Extension, Composition, and Merging Operators in Contract
Models for System Design},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {86:1--86:23},
year = {2019},
url = {https://doi.org/10.1145/3358216},
doi = {10.1145/3358216},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PasseroneRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PinxtenGB19,
author = {Joost van Pinxten and
Marc Geilen and
Twan Basten},
title = {Parametric Scheduler Characterization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {110:1--110:25},
year = {2019},
url = {https://doi.org/10.1145/3358226},
doi = {10.1145/3358226},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/PinxtenGB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RestucciaPBMB19,
author = {Francesco Restuccia and
Marco Pagani and
Alessandro Biondi and
Mauro Marinoni and
Giorgio C. Buttazzo},
title = {Is Your Bus Arbiter Really Fair? Restoring Fairness in {AXI} Interconnects
for {FPGA} SoCs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {51:1--51:22},
year = {2019},
url = {https://doi.org/10.1145/3358183},
doi = {10.1145/3358183},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RestucciaPBMB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SaeedWK19,
author = {Samah Mohamed Saeed and
Robert Wille and
Ramesh Karri},
title = {Locking the Design of Building Blocks for Quantum Circuits},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {60:1--60:15},
year = {2019},
url = {https://doi.org/10.1145/3358184},
doi = {10.1145/3358184},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SaeedWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SalamatiSDSM19,
author = {Mahmoud Salamati and
Rocco Salvia and
Eva Darulova and
Sadegh Soudjani and
Rupak Majumdar},
title = {Memory-Efficient Mixed-Precision Implementations for Robust Explicit
Model Predictive Control},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {100:1--100:19},
year = {2019},
url = {https://doi.org/10.1145/3358223},
doi = {10.1145/3358223},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SalamatiSDSM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SeoK19,
author = {Minjun Seo and
Fadi J. Kurdahi},
title = {Efficient Tracing Methodology Using Automata Processor},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {80:1--80:18},
year = {2019},
url = {https://doi.org/10.1145/3358200},
doi = {10.1145/3358200},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SeoK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SeyoumBB19,
author = {Biruk B. Seyoum and
Alessandro Biondi and
Giorgio C. Buttazzo},
title = {{FLORA:} FLoorplan Optimizer for Reconfigurable Areas in FPGAs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {73:1--73:20},
year = {2019},
url = {https://doi.org/10.1145/3358202},
doi = {10.1145/3358202},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SeyoumBB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SiddhuP19,
author = {Lokesh Siddhu and
Preeti Ranjan Panda},
title = {PredictNcool: Leakage Aware Thermal Management for 3D Memories Using
a Lightweight Temperature Predictor},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {64:1--64:22},
year = {2019},
url = {https://doi.org/10.1145/3358208},
doi = {10.1145/3358208},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SiddhuP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SilvaFCMVPJN19,
author = {Lucas Bragan{\c{c}}a da Silva and
Ricardo S. Ferreira and
Michael Canesche and
Marcelo M. Menezes and
Maria D. Vieira and
Jeronimo Costa Penha and
Peter Jamieson and
Jos{\'{e}} Augusto Miranda Nacif},
title = {{READY:} {A} Fine-Grained Multithreading Overlay Framework for Modern
{CPU-FPGA} Dataflow Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {56:1--56:20},
year = {2019},
url = {https://doi.org/10.1145/3358187},
doi = {10.1145/3358187},
timestamp = {Fri, 04 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SilvaFCMVPJN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SmirnovPGT19,
author = {Fedor Smirnov and
Behnaz Pourmohseni and
Michael Gla{\ss} and
J{\"{u}}rgen Teich},
title = {IGOR, Get Me the Optimum! Prioritizing Important Design Decisions
During the {DSE} of Embedded Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {78:1--78:22},
year = {2019},
url = {https://doi.org/10.1145/3358204},
doi = {10.1145/3358204},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SmirnovPGT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Song0MK19,
author = {Shihao Song and
Anup Das and
Onur Mutlu and
Nagarajan Kandasamy},
title = {Enabling and Exploiting Partition-Level Parallelism {(PALP)} in Phase
Change Memories},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {53:1--53:25},
year = {2019},
url = {https://doi.org/10.1145/3358180},
doi = {10.1145/3358180},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/Song0MK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SpelliniLFC19,
author = {Stefano Spellini and
Michele Lora and
Franco Fummi and
Sudipta Chattopadhyay},
title = {Compositional Design of Multi-Robot Systems Control Software on {ROS}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {71:1--71:24},
year = {2019},
url = {https://doi.org/10.1145/3358197},
doi = {10.1145/3358197},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SpelliniLFC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SridharIC19,
author = {Aditya Sridhar and
Mohamed Ibrahim and
Krishnendu Chakrabarty},
title = {Synterface: Efficient Chip-to-World Interfacing for Flow-Based Microfluidic
Biochips Using Pin-Count Minimization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {54:1--54:21},
year = {2019},
url = {https://doi.org/10.1145/3358188},
doi = {10.1145/3358188},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SridharIC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SunHKSHA19,
author = {Youcheng Sun and
Xiaowei Huang and
Daniel Kroening and
James Sharp and
Matthew Hill and
Rob Ashmore},
title = {Structural Test Coverage Criteria for Deep Neural Networks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {94:1--94:23},
year = {2019},
url = {https://doi.org/10.1145/3358233},
doi = {10.1145/3358233},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SunHKSHA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TranCLMJK19,
author = {Hoang{-}Dung Tran and
Feiyang Cai and
Diego Manzanas Lopez and
Patrick Musau and
Taylor T. Johnson and
Xenofon D. Koutsoukos},
title = {Safety Verification of Cyber-Physical Systems with Reinforcement Learning
Control},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {105:1--105:22},
year = {2019},
url = {https://doi.org/10.1145/3358230},
doi = {10.1145/3358230},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/TranCLMJK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/VashistKDG19,
author = {Abhishek Vashist and
Andrew Keats and
Sai Manoj Pudukotai Dinakarrao and
Amlan Ganguly},
title = {Unified Testing and Security Framework for Wireless Network-on-Chip
Enabled Multi-Core Chips},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {75:1--75:20},
year = {2019},
url = {https://doi.org/10.1145/3358212},
doi = {10.1145/3358212},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/VashistKDG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangCKHCC19,
author = {Wei{-}Chen Wang and
Yuan{-}Hao Chang and
Tei{-}Wei Kuo and
Chien{-}Chung Ho and
Yu{-}Ming Chang and
Hung{-}Sheng Chang},
title = {Achieving Lossless Accuracy with Lossy Programming for Efficient Neural-Network
Training on NVM-Based Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {68:1--68:22},
year = {2019},
url = {https://doi.org/10.1145/3358191},
doi = {10.1145/3358191},
timestamp = {Wed, 04 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WangCKHCC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangWTS19,
author = {Youchao Wang and
Sam Willis and
Vasileios Tsoutsouras and
Phillip Stanley{-}Marbell},
title = {Deriving Equations from Sensor Data Using Dimensional Function Synthesis},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {84:1--84:22},
year = {2019},
url = {https://doi.org/10.1145/3358218},
doi = {10.1145/3358218},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WangWTS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WijerathneLKPM19,
author = {Dhananjaya Wijerathne and
Zhaoying Li and
Manupa Karunarathne and
Anuj Pathania and
Tulika Mitra},
title = {{CASCADE:} High Throughput Data Streaming via Decoupled Access-Execute
{CGRA}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {50:1--50:26},
year = {2019},
url = {https://doi.org/10.1145/3358177},
doi = {10.1145/3358177},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WijerathneLKPM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YaghoubiF19,
author = {Shakiba Yaghoubi and
Georgios Fainekos},
title = {Worst-case Satisfaction of {STL} Specifications Using Feedforward
Neural Network Controllers: {A} Lagrange Multipliers Approach},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {107:1--107:20},
year = {2019},
url = {https://doi.org/10.1145/3358239},
doi = {10.1145/3358239},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/YaghoubiF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YimMHB19,
author = {Keun Soo Yim and
Iliyan Malchev and
Andrew Hsieh and
Dave Burke},
title = {Treble: Fast Software Updates by Creating an Equilibrium in an Active
Software Ecosystem of Globally Distributed Stakeholders},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {104:1--104:23},
year = {2019},
url = {https://doi.org/10.1145/3358237},
doi = {10.1145/3358237},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/YimMHB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YuLDM19,
author = {Jiecao Yu and
Andrew Lukefahr and
Reetuparna Das and
Scott A. Mahlke},
title = {TF-Net: Deploying Sub-Byte Deep Neural Networks on Microcontrollers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {45:1--45:21},
year = {2019},
url = {https://doi.org/10.1145/3358189},
doi = {10.1145/3358189},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/YuLDM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhangRZAG19,
author = {Jeff Jun Zhang and
Parul Raj and
Shuayb Zarar and
Amol Ambardekar and
Siddharth Garg},
title = {CompAct: On-chip {\textless}underline{\textgreater}Com{\textless}/underline{\textgreater}pression
of {\textless}underline{\textgreater}Act{\textless}/underline{\textgreater}ivations
for Low Power Systolic Array Based {CNN} Acceleration},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {47:1--47:24},
year = {2019},
url = {https://doi.org/10.1145/3358178},
doi = {10.1145/3358178},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ZhangRZAG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarrascosaEMMGB19,
author = {Juan Pedro Cobos Carrascosa and
David Hern{\'{a}}ndez Exp{\'{o}}sito and
Jose Luis Ramos Mas and
Beatriz Aparicio del Moral and
Antonio S{\'{a}}nchez G{\'{o}}mez and
Mar{\'{\i}}a Balaguer and
Antonio C. L{\'{o}}pez Jim{\'{e}}nez and
David Orozco Su{\'{a}}rez and
J. C. del Toro Iniesta},
title = {Reconfigurable accelerator on {FPGA} for scientific computing : From
a space-borne instrument to a high-performance computing data center},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944260},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CarrascosaEMMGB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DhavlleBRHD19,
author = {Abhijitt Dhavlle and
Sahil Bhat and
Setareh Rafatirad and
Houman Homayoun and
Sai Manoj P. D.},
title = {Sequence-Crafter: Side-Channel Entropy Minimization to Thwart Timing-based
Side-Channel Attacks},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944357},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DhavlleBRHD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HassanRHD19,
author = {Rakibul Hassan and
Setareh Rafatirad and
Houman Homayoun and
Sai Manoj Pudukotai Dinakarrao},
title = {{SAT} to SAT-Hard Clause Translator},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944352},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HassanRHD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuangT19,
author = {Chao{-}Hsuan Huang and
Ishan G. Thakkar},
title = {Mitigating Write Disturbance in Phase Change Memory Architectures},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944382},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuangT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KwadjoMB19,
author = {Danielle Tchuinkou Kwadjo and
Joel Mandebi Mbongue and
Christophe Bobda},
title = {Automatic Generation of Application-Specific {FPGA} Overlays},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944261},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KwadjoMB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeKL19,
author = {Jae Bin Lee and
Geon{-}Myeong Kim and
Seung{-}Ho Lim},
title = {{ECC} Management with Rate Compatible {LDPC} Code for {NAND} Flash
Storage},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944379},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeKL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeKLS19,
author = {Kwangbae Lee and
Hoseung Kim and
Hayun Lee and
Dongkun Shin},
title = {Flexible Group-Level Pruning of Deep Neural Networks for Fast Inference
on Mobile GPUs},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944266},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LeeKLS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeY19,
author = {Young{-}Min Lee and
Joon{-}Sung Yang},
title = {Computation Offloading of Acoustic Model for Client-Edge-Based Speech-Recognition},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944377},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PakanatiME19,
author = {Leela Pakanati and
John T. McMichen and
Zachary Estrada},
title = {Fine-Grained Acceleration using Runtime Integrated Custom Execution
{(RICE)}},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944353},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PakanatiME19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShuklaKMR19,
author = {Sanket Shukla and
Gaurav Kolhe and
Sai Manoj P. D. and
Setareh Rafatirad},
title = {MicroArchitectural Events and Image Processing-based Hybrid Approach
for Robust Malware Detection},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944374},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShuklaKMR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VazquezSMLO19,
author = {Manuel Floriano V{\'{a}}zquez and
Anup Saha and
Rafael Medina Morillas and
Miguel Chavarr{\'{\i}}as Lapastora and
Fernando Pescador del Oso},
title = {Porting new Versatile Video Coding transforms to a heterogeneous GPU-based
technology},
booktitle = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
pages = {1--2},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/document/8944367},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VazquezSMLO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2019,
title = {2019 International Conference on Compliers, Architectures and Synthesis
for Embedded Systems, {CASES} 2019, Work in Progress Papers, New York,
NY, USA, October 13-18, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8941580/proceeding},
isbn = {978-1-4503-6925-1},
timestamp = {Fri, 07 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BarchiUMA18,
author = {Francesco Barchi and
Gianvito Urgese and
Enrico Macii and
Andrea Acquaviva},
editor = {Tulika Mitra and
Akash Kumar},
title = {Impact of graph partitioning on {SNN} placement for a multi-core neuromorphic
architecture: work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {4:1--4:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283556},
timestamp = {Tue, 06 Nov 2018 14:46:50 +0100},
biburl = {https://dblp.org/rec/conf/cases/BarchiUMA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BrasserDDFDRSSS18,
author = {Ferdinand Brasser and
Lucas Davi and
Abhijitt Dhavlle and
Tommaso Frassetto and
Sai Manoj Pudukotai Dinakarrao and
Setareh Rafatirad and
Ahmad{-}Reza Sadeghi and
Avesta Sasan and
Hossein Sayadi and
Shaza Zeitouni and
Houman Homayoun},
editor = {Tulika Mitra and
Akash Kumar},
title = {Advances and throwbacks in hardware-assisted security: special session},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {15:1--15:10},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283567},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BrasserDDFDRSSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Chadha18,
author = {Gaurav Chadha},
editor = {Tulika Mitra and
Akash Kumar},
title = {EPerf: energy-efficient execution of user-interactive event-driven
applications: work in progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {10:1--10:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283562},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Chadha18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FuLHLWH18,
author = {Sheng{-}Yu Fu and
Chih{-}Min Lin and
Ding{-}Yong Hong and
Yu{-}Ping Liu and
Jan{-}Jan Wu and
Wei{-}Chung Hsu},
editor = {Tulika Mitra and
Akash Kumar},
title = {Exploiting {SIMD} capability in an ARMv7-to-ARMv8 dynamic binary translator},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {14:1--14:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283566},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FuLHLWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KP18,
author = {Vanishree K and
Madhura Purnaprajna},
editor = {Tulika Mitra and
Akash Kumar},
title = {Performance modeling for data distribution in heterogeneous computing
systems: work in progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {9:1--9:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283561},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiZJL18,
author = {Yixin Li and
Jinyu Zhan and
Wei Jiang and
Ying Li},
editor = {Tulika Mitra and
Akash Kumar},
title = {Writing-aware data variable allocation on hybrid {SRAM+NVM} {SPM:}
work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {11:1--11:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283563},
timestamp = {Tue, 05 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiZJL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OppermannVRS018,
author = {Julian Oppermann and
Sebastian Vollbrecht and
Melanie Reuter{-}Oppermann and
Oliver Sinnen and
Andreas Koch},
editor = {Tulika Mitra and
Akash Kumar},
title = {GeMS: a generator for modulo scheduling problems: work in progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {7:1--7:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283559},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/OppermannVRS018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ScarabottoloAP18,
author = {Ilaria Scarabottolo and
Giovanni Ansaloni and
Laura Pozzi},
editor = {Tulika Mitra and
Akash Kumar},
title = {A partitioning strategy for exploring error-resilience in circuits:
work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {5:1--5:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283557},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ScarabottoloAP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShimadaTT18,
author = {Kana Shimada and
Ittetsu Taniguchi and
Hiroyuki Tomiyama},
editor = {Tulika Mitra and
Akash Kumar},
title = {Communication-aware scheduling of data-parallel tasks: work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {8:1--8:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283560},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShimadaTT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TripathySS18,
author = {Shivani Tripathy and
Debiprasanna Sahoo and
Manoranjan Satpathy},
editor = {Tulika Mitra and
Akash Kumar},
title = {{DRAM} cache access optimization leveraging line locking in tag cache:
work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {12:1--12:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283564},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TripathySS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/UrgesePBMA18,
author = {Gianvito Urgese and
Luca Peres and
Francesco Barchi and
Enrico Macii and
Andrea Acquaviva},
editor = {Tulika Mitra and
Akash Kumar},
title = {Multiple alignment of packet sequences for efficient communication
in a many-core neuromorphic system: work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {3:1--3:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283555},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/UrgesePBMA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangJZYHX18,
author = {Junlong Wang and
Wei Jiang and
Jinyu Zhan and
Jinghuan Yu and
Haibo Hu and
Liugen Xu},
editor = {Tulika Mitra and
Akash Kumar},
title = {Persistence improvement for distributed cache with {NVM} based storage
system: work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {2:1--2:3},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283554},
timestamp = {Mon, 23 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WangJZYHX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WuJLFX18,
author = {Chao Wu and
Cheng Ji and
Qiao Li and
Chenchen Fu and
Chun Jason Xue},
editor = {Tulika Mitra and
Akash Kumar},
title = {Maximizing {I/O} throughput and minimizing performance variation via
reinforcement learning based {I/O} merging for SSDs: work-in-progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {1:1--1:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283553},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WuJLFX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangWHM18,
author = {Pengfei Yang and
Quan Wang and
Xiaokun Huang and
Xin Mi},
editor = {Tulika Mitra and
Akash Kumar},
title = {An confidentiality and integrity scheme for the distributed shared
memory of embedded multi-core system: work in progress},
booktitle = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
pages = {6:1--6:2},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283558},
timestamp = {Tue, 09 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangWHM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2018,
editor = {Tulika Mitra and
Akash Kumar},
title = {Proceedings of the International Conference on Compilers, Architecture
and Synthesis for Embedded Systems, {CASES} 2018, Torino, Italy, September
30 - October 05, 2018},
publisher = {{ACM}},
year = {2018},
url = {http://dl.acm.org/citation.cfm?id=3283552},
isbn = {978-1-5386-5564-1},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AhmedHMT17,
author = {Rehan Ahmed and
Pengcheng Huang and
Max Millen and
Lothar Thiele},
title = {On The Design and Application of Thermal Isolation Servers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {165:1--165:19},
year = {2017},
url = {https://doi.org/10.1145/3126512},
doi = {10.1145/3126512},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AhmedHMT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AllamigeonGGPS17,
author = {Xavier Allamigeon and
St{\'{e}}phane Gaubert and
Eric Goubault and
Sylvie Putot and
Nikolas Stott},
title = {A Fast Method to Compute Disjunctive Quadratic Invariants of Numerical
Programs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {166:1--166:19},
year = {2017},
url = {https://doi.org/10.1145/3126502},
doi = {10.1145/3126502},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AllamigeonGGPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AndalamAMRT17,
author = {Sidharta Andalam and
Nathan Allen and
Avinash Malik and
Partha S. Roop and
Mark Trew},
title = {A Novel Emulation Model of the Cardiac Conduction System},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {157:1--157:20},
year = {2017},
url = {https://doi.org/10.1145/3126542},
doi = {10.1145/3126542},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AndalamAMRT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/AzimiARPLLD17,
author = {Iman Azimi and
Arman Anzanpour and
Amir M. Rahmani and
Tapio Pahikkala and
Marco Levorato and
Pasi Liljeberg and
Nikil D. Dutt},
title = {HiCH: Hierarchical Fog-Assisted Computing Architecture for Healthcare
IoT},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {174:1--174:20},
year = {2017},
url = {https://doi.org/10.1145/3126501},
doi = {10.1145/3126501},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/AzimiARPLLD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BasuDBAPA17,
author = {Soumya Basu and
Loris Duch and
Rub{\'{e}}n Braojos and
Giovanni Ansaloni and
Laura Pozzi and
David Atienza},
title = {An Inexact Ultra-low Power Bio-signal Processing Architecture With
Lightweight Error Recovery},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {159:1--159:19},
year = {2017},
url = {https://doi.org/10.1145/3126565},
doi = {10.1145/3126565},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BasuDBAPA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BeckertE17,
author = {Matthias Beckert and
Rolf Ernst},
title = {Response Time Analysis for Sporadic Server Based Budget Scheduling
in Real Time Virtualization Environments},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {161:1--161:19},
year = {2017},
url = {https://doi.org/10.1145/3126559},
doi = {10.1145/3126559},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BeckertE17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BhatGO17,
author = {Ganapati Bhat and
Suat Gumussoy and
{\"{U}}mit Y. Ogras},
title = {Power-Temperature Stability and Safety Analysis for Multiprocessor
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {145:1--145:19},
year = {2017},
url = {https://doi.org/10.1145/3126567},
doi = {10.1145/3126567},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/BhatGO17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BlindellCLS17,
author = {Gabriel Hjort Blindell and
Mats Carlsson and
Roberto Casta{\~{n}}eda Lozano and
Christian Schulte},
title = {Complete and Practical Universal Instruction Selection},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {119:1--119:18},
year = {2017},
url = {https://doi.org/10.1145/3126528},
doi = {10.1145/3126528},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BlindellCLS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BourkeCCPPP17,
author = {Timothy Bourke and
Francois Carcenac and
Jean{-}Louis Cola{\c{c}}o and
Bruno Pagano and
C{\'{e}}dric Pasteur and
Marc Pouzet},
title = {A Synchronous Look at the Simulink Standard Library},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {176:1--176:24},
year = {2017},
url = {https://doi.org/10.1145/3126516},
doi = {10.1145/3126516},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BourkeCCPPP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChakiN17,
author = {Sagar Chaki and
Dionisio de Niz},
title = {Formal Verification of a Timing Enforcer Implementation},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {168:1--168:19},
year = {2017},
url = {https://doi.org/10.1145/3126517},
doi = {10.1145/3126517},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ChakiN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenLLC17,
author = {Xiaowen Chen and
Zhonghai Lu and
Sheng Liu and
Shuming Chen},
title = {Round-trip {DRAM} Access Fairness in 3D NoC-based Many-core Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {162:1--162:21},
year = {2017},
url = {https://doi.org/10.1145/3126561},
doi = {10.1145/3126561},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ChenLLC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ChenMS17,
author = {Xin Chen and
Sergio Mover and
Sriram Sankaranarayanan},
title = {Compositional Relational Abstraction for Nonlinear Hybrid Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {187:1--187:19},
year = {2017},
url = {https://doi.org/10.1145/3126522},
doi = {10.1145/3126522},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ChenMS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/CritesKB17,
author = {Brian Crites and
Karen Kong and
Philip Brisk},
title = {Diagonal Component Expansion for Flow-Layer Placement of Flow-Based
Microfluidic Biochips},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {126:1--126:18},
year = {2017},
url = {https://doi.org/10.1145/3126529},
doi = {10.1145/3126529},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/CritesKB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DeshmukhHJMP17,
author = {Jyotirmoy V. Deshmukh and
Marko Horvat and
Xiaoqing Jin and
Rupak Majumdar and
Vinayak S. Prabhu},
title = {Testing Cyber-Physical Systems through Bayesian Optimization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {170:1--170:18},
year = {2017},
url = {https://doi.org/10.1145/3126521},
doi = {10.1145/3126521},
timestamp = {Sat, 25 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/DeshmukhHJMP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/EgilmezSMASK17,
author = {Begum Egilmez and
Matthew Schuchhardt and
Gokhan Memik and
Raid Ayoub and
Niranjan Soundararajan and
Michael Kishinevsky},
title = {User-aware Frame Rate Management in Android Smartphones},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {131:1--131:17},
year = {2017},
url = {https://doi.org/10.1145/3126539},
doi = {10.1145/3126539},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/EgilmezSMASK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ElfarZLCP17,
author = {Mahmoud Elfar and
Zhanwei Zhong and
Zipeng Li and
Krishnendu Chakrabarty and
Miroslav Pajic},
title = {Synthesis of Error-Recovery Protocols for Micro-Electrode-Dot-Array
Digital Microfluidic Biochips},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {127:1--127:22},
year = {2017},
url = {https://doi.org/10.1145/3126538},
doi = {10.1145/3126538},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ElfarZLCP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/FezzardiLF17,
author = {Pietro Fezzardi and
Marco Lattuada and
Fabrizio Ferrandi},
title = {Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip
Debugging for High-Level Synthesis},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {149:1--149:19},
year = {2017},
url = {https://doi.org/10.1145/3126564},
doi = {10.1145/3126564},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/FezzardiLF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GavranMS17,
author = {Ivan Gavran and
Rupak Majumdar and
Indranil Saha},
title = {Antlab: {A} Multi-Robot Task Server},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {190:1--190:19},
year = {2017},
url = {https://doi.org/10.1145/3126513},
doi = {10.1145/3126513},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/GavranMS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GhoshDDD17,
author = {Sumana Ghosh and
Souradeep Dutta and
Soumyajit Dey and
Pallab Dasgupta},
title = {A Structured Methodology for Pattern based Adaptive Scheduling in
Embedded Control},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {189:1--189:22},
year = {2017},
url = {https://doi.org/10.1145/3126514},
doi = {10.1145/3126514},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/GhoshDDD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GottschoASDG17,
author = {Mark Gottscho and
Irina Alam and
Clayton Schoeny and
Lara Dolecek and
Puneet Gupta},
title = {Low-Cost Memory Fault Tolerance for IoT Devices},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {128:1--128:25},
year = {2017},
url = {https://doi.org/10.1145/3126534},
doi = {10.1145/3126534},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/GottschoASDG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/GuptaPBMO17,
author = {Ujjwal Gupta and
Chetan Arvind Patil and
Ganapati Bhat and
Prabhat Mishra and
{\"{U}}mit Y. Ogras},
title = {DyPO: Dynamic Pareto-Optimal Configuration Selection for Heterogeneous
MpSoCs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {123:1--123:20},
year = {2017},
url = {https://doi.org/10.1145/3126530},
doi = {10.1145/3126530},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/GuptaPBMO17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/HuangCLYL17,
author = {Chao Huang and
Xin Chen and
Wang Lin and
Zhengfeng Yang and
Xuandong Li},
title = {Probabilistic Safety Verification of Stochastic Hybrid Systems Using
Barrier Certificates},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {186:1--186:19},
year = {2017},
url = {https://doi.org/10.1145/3126508},
doi = {10.1145/3126508},
timestamp = {Thu, 09 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/HuangCLYL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/JiCSGWWX17,
author = {Cheng Ji and
Li{-}Pin Chang and
Liang Shi and
Congming Gao and
Chao Wu and
Yuangang Wang and
Chun Jason Xue},
title = {Lightweight Data Compression for Mobile Flash Storage},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {183:1--183:18},
year = {2017},
url = {https://doi.org/10.1145/3126511},
doi = {10.1145/3126511},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/JiCSGWWX17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/JosipovicBI17,
author = {Lana Josipovic and
Philip Brisk and
Paolo Ienne},
title = {An Out-of-Order Load-Store Queue for Spatial Computing},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {125:1--125:19},
year = {2017},
url = {https://doi.org/10.1145/3126525},
doi = {10.1145/3126525},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/JosipovicBI17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KangSY17,
author = {Won{-}Kyung Kang and
Dongkun Shin and
Sungjoo Yoo},
title = {Reinforcement Learning-Assisted Garbage Collection to Mitigate Long-Tail
Latency in {SSD}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {134:1--134:20},
year = {2017},
url = {https://doi.org/10.1145/3126537},
doi = {10.1145/3126537},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KangSY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KhouzaniY17,
author = {Hoda Aghaei Khouzani and
Chengmo Yang},
title = {A DWM-Based Stack Architecture Implementation for Energy Harvesting
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {155:1--155:18},
year = {2017},
url = {https://doi.org/10.1145/3126543},
doi = {10.1145/3126543},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KhouzaniY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimJK17,
author = {Sang{-}Hoon Kim and
Jinkyu Jeong and
Jin{-}Soo Kim},
title = {Application-Aware Swapping for Mobile Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {182:1--182:19},
year = {2017},
url = {https://doi.org/10.1145/3126509},
doi = {10.1145/3126509},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KimJK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimNYLM17,
author = {Hongseok Kim and
Eyee Hyun Nam and
JiHyuck Yun and
Sheayun Lee and
Sang Lyul Min},
title = {{P-BMS:} {A} Bad Block Management Scheme in Parallelized Flash Memory
Storage Devices},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {140:1--140:19},
year = {2017},
url = {https://doi.org/10.1145/3126550},
doi = {10.1145/3126550},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KimNYLM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KurtinB17,
author = {Philip S. Kurtin and
Marco Jan Gerrit Bekooij},
title = {An Abstraction-Refinement Theory for the Analysis and Design of Real-Time
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {173:1--173:20},
year = {2017},
url = {https://doi.org/10.1145/3126507},
doi = {10.1145/3126507},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/KurtinB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeeCPSL17,
author = {Jaewoo Lee and
Hoon Sung Chwa and
Linh T. X. Phan and
Insik Shin and
Insup Lee},
title = {{MC-ADAPT:} Adaptive Task Dropping in Mixed-Criticality Scheduling},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {163:1--163:21},
year = {2017},
url = {https://doi.org/10.1145/3126498},
doi = {10.1145/3126498},
timestamp = {Thu, 26 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LeeCPSL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LesiJP17,
author = {Vuk Lesi and
Ilija Jovanov and
Miroslav Pajic},
title = {Security-Aware Scheduling of Embedded Control Tasks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {188:1--188:21},
year = {2017},
url = {https://doi.org/10.1145/3126518},
doi = {10.1145/3126518},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LesiJP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LiuWKLJ17,
author = {Qingrui Liu and
Xiaolong Wu and
Larry Kittinger and
Markus Levy and
Changhee Jung},
title = {BenchPrime: Effective Building of a Hybrid Benchmark Suite},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {179:1--179:22},
year = {2017},
url = {https://doi.org/10.1145/3126499},
doi = {10.1145/3126499},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LiuWKLJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MalikRATM17,
author = {Avinash Malik and
Partha S. Roop and
Sidharta Andalam and
Mark Trew and
Michael Mendler},
title = {Modular Compilation of Hybrid Systems for Emulation and Large Scale
Simulation},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {118:1--118:21},
year = {2017},
url = {https://doi.org/10.1145/3126536},
doi = {10.1145/3126536},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MalikRATM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MedhatLRBF17,
author = {Ramy Medhat and
Michael O. Lam and
Barry L. Rountree and
Borzoo Bonakdarpour and
Sebastian Fischmeister},
title = {Managing the Performance/Error Tradeoff of Floating-point Intensive
Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {184:1--184:19},
year = {2017},
url = {https://doi.org/10.1145/3126519},
doi = {10.1145/3126519},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MedhatLRBF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MehrabianKSEDAL17,
author = {Mohammadreza Mehrabian and
Mohammad Khayatian and
Aviral Shrivastava and
John C. Eidson and
Patricia Derler and
Hugo A. Andrade and
Ya{-}Shian Li{-}Baboud and
Edward R. Griffor and
Marc Weiss and
Kevin B. Stanton},
title = {Timestamp Temporal Logic {(TTL)} for Testing the Timing of Cyber-Physical
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {169:1--169:20},
year = {2017},
url = {https://doi.org/10.1145/3126510},
doi = {10.1145/3126510},
timestamp = {Thu, 20 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MehrabianKSEDAL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MicoletSD17,
author = {Paul{-}Jules Micolet and
Aaron Smith and
Christophe Dubach},
title = {A Study of Dynamic Phase Adaptation Using a Dynamic Multicore Processor},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {121:1--121:19},
year = {2017},
url = {https://doi.org/10.1145/3126523},
doi = {10.1145/3126523},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MicoletSD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MiglioreSRLTFGT17,
author = {Vincent Migliore and
C{\'{e}}dric Seguin and
Maria Mendez Real and
Vianney Lapotre and
Arnaud Tisserand and
Caroline Fontaine and
Guy Gogniat and
Russell Tessier},
title = {A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba
Algorithm},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {138:1--138:17},
year = {2017},
url = {https://doi.org/10.1145/3126558},
doi = {10.1145/3126558},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MiglioreSRLTFGT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MotamediFG17,
author = {Mohammad Motamedi and
Daniel D. Fong and
Soheil Ghiasi},
title = {Machine Intelligence on Resource-Constrained IoT Devices: The Case
of Thread Granularity Optimization for {CNN} Inference},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {151:1--151:19},
year = {2017},
url = {https://doi.org/10.1145/3126555},
doi = {10.1145/3126555},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MotamediFG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/NareshGL17,
author = {Vignyan Reddy Kothinti Naresh and
Dibakar Gope and
Mikko H. Lipasti},
title = {The {CURE:} Cluster Communication Using Registers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {124:1--124:19},
year = {2017},
url = {https://doi.org/10.1145/3126527},
doi = {10.1145/3126527},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/NareshGL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ONealBAWS17,
author = {Kenneth O'Neal and
Philip Brisk and
Ahmed Abousamra and
Zack Waters and
Emily Shriver},
title = {{GPU} Performance Estimation using Software Rasterization and Machine
Learning},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {148:1--148:21},
year = {2017},
url = {https://doi.org/10.1145/3126557},
doi = {10.1145/3126557},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ONealBAWS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Papagiannopoulou17,
author = {Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
title = {Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy
Efficiency},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {153:1--153:18},
year = {2017},
url = {https://doi.org/10.1145/3126556},
doi = {10.1145/3126556},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Papagiannopoulou17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ParkJLKO17,
author = {Jaehyun Park and
Hitesh Joshi and
Hyung Gyu Lee and
Sayfe Kiaei and
{\"{U}}mit Y. Ogras},
title = {Flexible PV-cell Modeling for Energy Harvesting in Wearable IoT Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {156:1--156:20},
year = {2017},
url = {https://doi.org/10.1145/3126568},
doi = {10.1145/3126568},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ParkJLKO17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PiccolboniMGC17,
author = {Luca Piccolboni and
Paolo Mantovani and
Giuseppe Di Guglielmo and
Luca P. Carloni},
title = {{COSMOS:} Coordination of High-Level Synthesis and Memory Optimization
for Hardware Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {150:1--150:22},
year = {2017},
url = {https://doi.org/10.1145/3126566},
doi = {10.1145/3126566},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PiccolboniMGC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PiccolboniMP17,
author = {Luca Piccolboni and
Alessandro Menon and
Graziano Pravadelli},
title = {Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans
in {RTL} Models},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {137:1--137:19},
year = {2017},
url = {https://doi.org/10.1145/3126552},
doi = {10.1145/3126552},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PiccolboniMP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PinisettyRSATH17,
author = {Srinivas Pinisetty and
Partha S. Roop and
Steven Smyth and
Nathan Allen and
Stavros Tripakis and
Reinhard von Hanxleden},
title = {Runtime Enforcement of Cyber-Physical Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {178:1--178:25},
year = {2017},
url = {https://doi.org/10.1145/3126500},
doi = {10.1145/3126500},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PinisettyRSATH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PinxtenWGBS17,
author = {Joost van Pinxten and
Umar Waqas and
Marc Geilen and
Twan Basten and
Lou J. Somers},
title = {Online Scheduling of 2-Re-entrant Flexible Manufacturing Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {160:1--160:20},
year = {2017},
url = {https://doi.org/10.1145/3126551},
doi = {10.1145/3126551},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/PinxtenWGBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RahaR17,
author = {Arnab Raha and
Vijay Raghunathan},
title = {qLUT: Input-Aware Quantized Table Lookup for Energy-Efficient Approximate
Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {130:1--130:23},
year = {2017},
url = {https://doi.org/10.1145/3126531},
doi = {10.1145/3126531},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RahaR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RaiC17,
author = {Siddharth Rai and
Mainak Chaudhuri},
title = {Using Criticality of {GPU} Accesses in Memory Management for {CPU-GPU}
Heterogeneous Multi-Core Processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {133:1--133:23},
year = {2017},
url = {https://doi.org/10.1145/3126540},
doi = {10.1145/3126540},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RaiC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RiaziSK17,
author = {M. Sadegh Riazi and
Mohammad Samragh and
Farinaz Koushanfar},
title = {CAMsure: Secure Content-Addressable Memory for Approximate Search},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {136:1--136:20},
year = {2017},
url = {https://doi.org/10.1145/3126547},
doi = {10.1145/3126547},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RiaziSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RouhaniMK17,
author = {Bita Darvish Rouhani and
Azalia Mirhoseini and
Farinaz Koushanfar},
title = {{RISE:} An Automated Framework for Real-Time Intelligent Video Surveillance
on {FPGA}},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {158:1--158:18},
year = {2017},
url = {https://doi.org/10.1145/3126549},
doi = {10.1145/3126549},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RouhaniMK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RouxelDP17,
author = {Benjamin Rouxel and
Steven Derrien and
Isabelle Puaut},
title = {Tightening Contention Delays While Scheduling Parallel Applications
on Multi-core Architectures},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {164:1--164:20},
year = {2017},
url = {https://doi.org/10.1145/3126496},
doi = {10.1145/3126496},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/RouxelDP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchlatowE17,
author = {Johannes Schlatow and
Rolf Ernst},
title = {Response-Time Analysis for Task Chains with Complex Precedence and
Blocking Relations},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {172:1--172:19},
year = {2017},
url = {https://doi.org/10.1145/3126505},
doi = {10.1145/3126505},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SchlatowE17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchulzeC17,
author = {Christoph Schulze and
Rance Cleaveland},
title = {Improving Invariant Mining via Static Analysis},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {167:1--167:20},
year = {2017},
url = {https://doi.org/10.1145/3126504},
doi = {10.1145/3126504},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SchulzeC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SchusterUSDS17,
author = {Simon Schuster and
Peter Ulbrich and
Isabella Stilkerich and
Christian Dietrich and
Wolfgang Schr{\"{o}}der{-}Preikschat},
title = {Demystifying Soft-Error Mitigation by Control-Flow Checking - {A}
New Perspective on its Effectiveness},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {180:1--180:19},
year = {2017},
url = {https://doi.org/10.1145/3126503},
doi = {10.1145/3126503},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SchusterUSDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ShresthamaliKN17,
author = {Shaswot Shresthamali and
Masaaki Kondo and
Hiroshi Nakamura},
title = {Adaptive Power Management in Solar Energy Harvesting Sensor Node Using
Reinforcement Learning},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {181:1--181:21},
year = {2017},
url = {https://doi.org/10.1145/3126495},
doi = {10.1145/3126495},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ShresthamaliKN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SinghPRMA17,
author = {Amit Kumar Singh and
Alok Prakash and
Basireddy Karunakar Reddy and
Geoff V. Merrett and
Bashir M. Al{-}Hashimi},
title = {Energy-Efficient Run-Time Mapping and Thread Partitioning of Concurrent
OpenCL Applications on {CPU-GPU} MPSoCs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {147:1--147:22},
year = {2017},
url = {https://doi.org/10.1145/3126548},
doi = {10.1145/3126548},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SinghPRMA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SogokonGJ17,
author = {Andrew Sogokon and
Khalil Ghorbal and
Taylor T. Johnson},
title = {Operational Models for Piecewise-Smooth Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {185:1--185:19},
year = {2017},
url = {https://doi.org/10.1145/3126506},
doi = {10.1145/3126506},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SogokonGJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SuWX17,
author = {Xuesong Su and
Hui Wu and
Jingling Xue},
title = {An Efficient WCET-Aware Instruction Scheduling and Register Allocation
Approach for Clustered {VLIW} Processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {120:1--120:21},
year = {2017},
url = {https://doi.org/10.1145/3126524},
doi = {10.1145/3126524},
timestamp = {Fri, 18 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/SuWX17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SunN17,
author = {Youcheng Sun and
Marco Di Natale},
title = {Weakly Hard Schedulability Analysis for Fixed Priority Scheduling
of Periodic Real-Time Tasks},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {171:1--171:19},
year = {2017},
url = {https://doi.org/10.1145/3126497},
doi = {10.1145/3126497},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SunN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TanBS17,
author = {Benjamin Tan and
Morteza Biglari{-}Abhari and
Zoran Salcic},
title = {An Automated Security-Aware Approach for Design of Embedded Systems
on MPSoC},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {143:1--143:20},
year = {2017},
url = {https://doi.org/10.1145/3126553},
doi = {10.1145/3126553},
timestamp = {Mon, 29 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/TanBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TretterGBT17,
author = {Andreas Tretter and
Georgia Giannopoulou and
Matthias Baer and
Lothar Thiele},
title = {Minimising Access Conflicts on Shared Multi-Bank Memory},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {135:1--135:20},
year = {2017},
url = {https://doi.org/10.1145/3126535},
doi = {10.1145/3126535},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/TretterGBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TrubGTT17,
author = {Roman Tr{\"{u}}b and
Georgia Giannopoulou and
Andreas Tretter and
Lothar Thiele},
title = {Implementation of Partitioned Mixed-Criticality Scheduling on a Multi-Core
Platform},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {122:1--122:21},
year = {2017},
url = {https://doi.org/10.1145/3126533},
doi = {10.1145/3126533},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/TrubGTT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/TsoutsourasMXS17,
author = {Vasileios Tsoutsouras and
Dimosthenis Masouros and
Sotirios Xydis and
Dimitrios Soudris},
title = {SoftRM: Self-Organized Fault-Tolerant Resource Management for Failure
Detection and Recovery in NoC Based Many-Cores},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {144:1--144:19},
year = {2017},
url = {https://doi.org/10.1145/3126562},
doi = {10.1145/3126562},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/TsoutsourasMXS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/VogelKWMB17,
author = {Pirmin Vogel and
Andreas Kurth and
Johannes Weinbuch and
Andrea Marongiu and
Luca Benini},
title = {Efficient Virtual Memory Sharing via On-Accelerator Page Table Walking
in Heterogeneous Embedded SoCs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {154:1--154:19},
year = {2017},
url = {https://doi.org/10.1145/3126560},
doi = {10.1145/3126560},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/VogelKWMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/VougioukasSDAM17,
author = {Ilias Vougioukas and
Andreas Sandberg and
Stephan Diestelhorst and
Bashir M. Al{-}Hashimi and
Geoff V. Merrett},
title = {Nucleus: Finding the Sharing Limit of Heterogeneous Cores},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {152:1--152:16},
year = {2017},
url = {https://doi.org/10.1145/3126544},
doi = {10.1145/3126544},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/VougioukasSDAM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangDM17,
author = {Yi Wang and
Lisha Dong and
Rui Mao},
title = {P-Alloc: Process-Variation Tolerant Reliability Management for 3D
Charge-Trapping Flash Memory},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {142:1--142:19},
year = {2017},
url = {https://doi.org/10.1145/3126554},
doi = {10.1145/3126554},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WangDM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangMRB17,
author = {Jiajie Wang and
Michael Mendler and
Partha S. Roop and
Bruno Bodin},
title = {Timing Analysis of Synchronous Programs using {WCRT} Algebra: Scalability
through Abstraction},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {177:1--177:19},
year = {2017},
url = {https://doi.org/10.1145/3126520},
doi = {10.1145/3126520},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/WangMRB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WangZM17,
author = {Siqi Wang and
Guanwen Zhong and
Tulika Mitra},
title = {CGPredict: Embedded {GPU} Performance Estimation from Single-Threaded
Applications},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {146:1--146:22},
year = {2017},
url = {https://doi.org/10.1145/3126546},
doi = {10.1145/3126546},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WangZM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WuZDHHXW17,
author = {Fei Wu and
Meng Zhang and
Yajuan Du and
Xubin He and
Ping Huang and
Changsheng Xie and
Jiguang Wan},
title = {A Program Interference Error Aware {LDPC} Scheme for Improving {NAND}
Flash Decoding Performance},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {141:1--141:20},
year = {2017},
url = {https://doi.org/10.1145/3126563},
doi = {10.1145/3126563},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WuZDHHXW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YanJDLJ17,
author = {Hao Yan and
Lei Jiang and
Lide Duan and
Wei{-}Ming Lin and
Eugene John},
title = {FlowPaP and FlowReR: Improving Energy Efficiency and Performance for
STT-MRAM-Based Handheld Devices under Read Disturbance},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {132:1--132:20},
year = {2017},
url = {https://doi.org/10.1145/3126532},
doi = {10.1145/3126532},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/YanJDLJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/YantirEK17,
author = {Hasan Erdem Yantir and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
title = {Approximate Memristive In-memory Computing},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {129:1--129:18},
year = {2017},
url = {https://doi.org/10.1145/3126526},
doi = {10.1145/3126526},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/YantirEK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhangLSQ17,
author = {Jiacheng Zhang and
Youyou Lu and
Jiwu Shu and
Xiongjun Qin},
title = {FlashKV: Accelerating {KV} Performance with Open-Channel SSDs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {139:1--139:19},
year = {2017},
url = {https://doi.org/10.1145/3126545},
doi = {10.1145/3126545},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ZhangLSQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ZhaoPZG17,
author = {Yecheng Zhao and
Chao Peng and
Haibo Zeng and
Zonghua Gu},
title = {Optimization of Real-Time Software Implementing Multi-Rate Synchronous
Finite State Machines},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {175:1--175:21},
year = {2017},
url = {https://doi.org/10.1145/3126515},
doi = {10.1145/3126515},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ZhaoPZG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AboutalebiD17,
author = {Armin Haj Aboutalebi and
Lide Duan},
title = {Enabling reliable main memory using {STT-MRAM} via restore-aware memory
management: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {21:1--21:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125517},
doi = {10.1145/3125501.3125517},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/cases/AboutalebiD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AguilarASLACF17,
author = {Miguel Angel Aguilar and
Abhishek Aggarwal and
Awaid Shaheen and
Rainer Leupers and
Gerd Ascheid and
Jer{\'{o}}nimo Castrill{\'{o}}n and
Liam Fitzpatrick},
title = {Multi-grained performance estimation for MPSoC compilers: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {14:1--14:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125521},
doi = {10.1145/3125501.3125521},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AguilarASLACF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AmrouchKPHKK17,
author = {Hussam Amrouch and
Prashanth Krishnamurthy and
Naman Patel and
J{\"{o}}rg Henkel and
Ramesh Karri and
Farshad Khorrami},
title = {Emerging (un-)reliability based security threats and mitigations for
embedded systems: special session},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {17:1--17:10},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125529},
doi = {10.1145/3125501.3125529},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AmrouchKPHKK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AvasalcaiBP17,
author = {Cosmin Avasalcai and
Dhanesh Budhrani and
Paul Pop},
title = {Towards industry strength mapping of {AUTOSAR} automotive functionality
on multicore architectures: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {22:1--22:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125623},
doi = {10.1145/3125501.3125623},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AvasalcaiBP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DuMLLOG17,
author = {Gaoming Du and
Shibi Ma and
Zhenmin Li and
Zhonghai Lu and
Yiming Ouyang and
Minglun Gao},
title = {{SSS:} self-aware system-on-chip using static-dynamic hybrid method
(work-in-progress)},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {8:1--8:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125527},
doi = {10.1145/3125501.3125527},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DuMLLOG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ElsharkasyYKEK17,
author = {Wael M. Elsharkasy and
Hasan Erdem Yantir and
Amin Khajeh and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
title = {Efficient pulsed-latch implementation for multiport register files:
work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {5:1--5:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125515},
doi = {10.1145/3125501.3125515},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ElsharkasyYKEK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HongKH17,
author = {Sungin Hong and
Hyunjun Kim and
Hwansoo Han},
title = {Balanced cache bypassing for critical warp reduction: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {7:1--7:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125513},
doi = {10.1145/3125501.3125513},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HongKH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IturbeVPO17,
author = {Xabier Iturbe and
Balaji Venu and
John Penton and
Emre Ozer},
title = {A "high resilience" mode to minimize soft error vulnerabilities in
{ARM} cortex-R {CPU} pipelines: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {6:1--6:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125509},
doi = {10.1145/3125501.3125509},
timestamp = {Wed, 11 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/IturbeVPO17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimY17,
author = {Seonbong Kim and
Joon{-}Sung Yang},
title = {Improving NVMe {SSD} {I/O} determinism with PCIe virtual channel:
work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {19:1--19:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125520},
doi = {10.1145/3125501.3125520},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiSSXHS17,
author = {Chaofan Li and
Deepashree Sengupta and
Farhana Sharmin Snigdha and
Wenbin Xu and
Jiang Hu and
Sachin S. Sapatnekar},
title = {A quantifiable approach to approximate computing: special session},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {1:1--1:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125511},
doi = {10.1145/3125501.3125511},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiSSXHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LuGXSZWZ17,
author = {Yuntao Lu and
Lei Gong and
Chongchong Xu and
Fan Sun and
Yiwei Zhang and
Chao Wang and
Xuehai Zhou},
title = {A high-performance {FPGA} accelerator for sparse neural networks:
work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {12:1--12:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125510},
doi = {10.1145/3125501.3125510},
timestamp = {Wed, 17 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LuGXSZWZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MaS17,
author = {Mingze Ma and
Rizos Sakellariou},
title = {Code-size-aware mapping for synchronous dataflow graphs on multicore
systems: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {13:1--13:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125514},
doi = {10.1145/3125501.3125514},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MaS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MadhuSNNNB17,
author = {Kavitha T. Madhu and
Tarun Singla and
S. K. Nandy and
Ranjani Narayan and
Fran{\c{c}}ois Neumann and
Philippe Baufreton},
title = {REDEFINE\({}^{\mbox{{\textregistered}}}\){\texttrademark}: a case
for WCET-friendly hardware accelerators for real time applications
(work-in-progress)},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {15:1--15:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125526},
doi = {10.1145/3125501.3125526},
timestamp = {Wed, 15 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MadhuSNNNB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Misailovic17,
author = {Sasa Misailovic},
title = {Probabilistic reasoning for analysis of approximate computations},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {4:1},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125524},
doi = {10.1145/3125501.3125524},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Misailovic17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MoghaddamHKBKMC17,
author = {Mansureh S. Moghaddam and
Barend Harris and
Duseok Kang and
Inpyo Bae and
Euiseok Kim and
Hyemi Min and
Hansu Cho and
Sukjin Kim and
Bernhard Egger and
Soonhoi Ha and
Kiyoung Choi},
title = {Incremental training of CNNs for user customization: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {9:1--9:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125519},
doi = {10.1145/3125501.3125519},
timestamp = {Sun, 05 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MoghaddamHKBKMC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkKM17,
author = {Hyukwoo Park and
SungKook Kim and
Soo{-}Mook Moon},
title = {Advanced ahead-of-time compilation for Javascript engine: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {16:1--16:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125512},
doi = {10.1145/3125501.3125512},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ParkKM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkLLYPKY17,
author = {Hanwool Park and
Changdae Lee and
Hakkyung Lee and
Yechan Yoo and
Yoonjin Park and
Injung Kim and
Kang Yi},
title = {Optimizing {DCNN} {FPGA} accelerator design for handwritten hangul
character recognition: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {11:1--11:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125522},
doi = {10.1145/3125501.3125522},
timestamp = {Sat, 24 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ParkLLYPKY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SaadatP17,
author = {Hassaan Saadat and
Sri Parameswaran},
title = {Hardware approximate computing: how, why, when and where? (special
session)},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {3:1--3:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125518},
doi = {10.1145/3125501.3125518},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SaadatP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShoushtariRD17,
author = {Majid Shoushtari and
Amir M. Rahmani and
Nikil D. Dutt},
title = {Quality-configurable memory hierarchy through approximation: special
session},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {2:1--2:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125525},
doi = {10.1145/3125501.3125525},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ShoushtariRD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/UmurogluJ17,
author = {Yaman Umuroglu and
Magnus Jahre},
title = {Towards efficient quantized neural network inference on mobile devices:
work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {18:1--18:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125528},
doi = {10.1145/3125501.3125528},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/UmurogluJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YanAD17,
author = {Hao Yan and
Ethan C. Ahn and
Lide Duan},
title = {Enabling NVM-based deep learning acceleration using nonuniform data
quantization: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {20:1--20:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125516},
doi = {10.1145/3125501.3125516},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/YanAD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YaoL17,
author = {Yuan Yao and
Zhonghai Lu},
title = {Prediction based convolution neural network acceleration: work-in-progress},
booktitle = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
pages = {10:1--10:2},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501.3125523},
doi = {10.1145/3125501.3125523},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YaoL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2017,
title = {Proceedings of the 2017 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2017, Seoul, Republic
of Korea, October 15-20, 2017},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3125501},
doi = {10.1145/3125501},
isbn = {978-1-4503-5184-3},
timestamp = {Thu, 11 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AbhinavN16,
author = {Abhinav and
Rupesh Nasre},
title = {FastCollect: offloading generational garbage collection to integrated
GPUs},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {21:1--21:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968520},
doi = {10.1145/2968455.2968520},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/AbhinavN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BogdanPASH16,
author = {Paul Bogdan and
Partha Pratim Pande and
Hussam Amrouch and
Muhammad Shafique and
J{\"{o}}rg Henkel},
title = {Power and thermal management in massive multicore chips: theoretical
foundation meets architectural innovation and resource allocation},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {4:1--4:2},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2974013},
doi = {10.1145/2968455.2974013},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BogdanPASH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarlePMMHB16,
author = {Thomas Carle and
Dimitra Papagiannopoulou and
Tali Moreshet and
Andrea Marongiu and
Maurice Herlihy and
R. Iris Bahar},
title = {Thrifty-malloc: {A} {HW/SW} codesign for the dynamic management of
hardware transactional memory in embedded multicore systems},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {20:1--20:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968513},
doi = {10.1145/2968455.2968513},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CarlePMMHB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChoiDKDPMM16,
author = {Wonje Choi and
Karthi Duraisamy and
Ryan Gary Kim and
Janardhan Rao Doppa and
Partha Pratim Pande and
Radu Marculescu and
Diana Marculescu},
title = {Hybrid network-on-chip architectures for accelerating deep learning
kernels on heterogeneous manycore platforms},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {13:1--13:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968510},
doi = {10.1145/2968455.2968510},
timestamp = {Fri, 12 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChoiDKDPMM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FedericoA16,
author = {Alessandro Di Federico and
Giovanni Agosta},
title = {A jump-target identification method for multi-architecture static
binary translation},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {17:1--17:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968514},
doi = {10.1145/2968455.2968514},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FedericoA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HegdeSRK16,
author = {Gopalakrishna Hegde and
Siddhartha and
Nachiappan Ramasamy and
Nachiket Kapre},
title = {CaffePresso: an optimized library for deep learning on embedded accelerator-based
platforms},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {14:1--14:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968511},
doi = {10.1145/2968455.2968511},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HegdeSRK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IbrahimBCSP16,
author = {Mohamed Ibrahim and
Craig Boswell and
Krishnendu Chakrabarty and
Kristin Scott and
Miroslav Pajic},
title = {A real-time digital-microfluidic platform for epigenetics},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {10:1--10:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968516},
doi = {10.1145/2968455.2968516},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/IbrahimBCSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KhadraSK16,
author = {M. Ammar {Ben Khadra} and
Dominik Stoffel and
Wolfgang Kunz},
title = {Speculative disassembly of binary code},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {16:1--16:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968505},
doi = {10.1145/2968455.2968505},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KhadraSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MantovaniCPGC16,
author = {Paolo Mantovani and
Emilio G. Cota and
Christian Pilato and
Giuseppe Di Guglielmo and
Luca P. Carloni},
title = {Handling large data sets for high-performance embedded applications
in heterogeneous systems-on-chip},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {3:1--3:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968509},
doi = {10.1145/2968455.2968509},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MantovaniCPGC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MitropoulouPJ16,
author = {Konstantina Mitropoulou and
Vasileios Porpodas and
Timothy M. Jones},
title = {{COMET:} communication-optimised multi-threaded error-detection technique},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {7:1--7:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968508},
doi = {10.1145/2968455.2968508},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MitropoulouPJ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Oppermann0RS16,
author = {Julian Oppermann and
Andreas Koch and
Melanie Reuter{-}Oppermann and
Oliver Sinnen},
title = {ILP-based modulo scheduling for high-level synthesis},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {1:1--1:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968512},
doi = {10.1145/2968455.2968512},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Oppermann0RS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PonugotiTM16,
author = {Mounika Ponugoti and
Amrish K. Tewar and
Aleksandar Milenkovic},
title = {On-the-fly load data value tracing in multicores},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {18:1--18:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968507},
doi = {10.1145/2968455.2968507},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PonugotiTM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SanchezGMSWLM16,
author = {Carlos Sanchez and
Peter Gavin and
Daniel Moreau and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors and
Sally A. McKee},
title = {Redesigning a tagless access buffer to require minimal {ISA} changes},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {19:1--19:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968504},
doi = {10.1145/2968455.2968504},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SanchezGMSWLM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SteuwerRD16,
author = {Michel Steuwer and
Toomas Remmelg and
Christophe Dubach},
title = {Matrix multiplication beyond auto-tuning: rewrite-based {GPU} code
generation},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {15:1--15:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968521},
doi = {10.1145/2968455.2968521},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SteuwerRD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SutarRR16,
author = {Soubhagya Sutar and
Arnab Raha and
Vijay Raghunathan},
title = {{D-PUF:} an intrinsically reconfigurable {DRAM} {PUF} for device authentication
in embedded systems},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {12:1--12:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968519},
doi = {10.1145/2968455.2968519},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SutarRR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TagliaviniHMB16,
author = {Giuseppe Tagliavini and
Germain Haugou and
Andrea Marongiu and
Luca Benini},
title = {Enabling OpenVX support in mW-scale parallel accelerators},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {2:1--2:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968518},
doi = {10.1145/2968455.2968518},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TagliaviniHMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TanKVKMP16,
author = {Cheng Tan and
Aditi Kulkarni Mohite and
Vanchinathan Venkataramani and
Manupa Karunaratne and
Tulika Mitra and
Li{-}Shiuan Peh},
title = {{LOCUS:} low-power customizable many-core architecture for wearables},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {11:1--11:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968506},
doi = {10.1145/2968455.2968506},
timestamp = {Sat, 25 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/TanKVKMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TzilisSVRS16,
author = {Stavros Tzilis and
Ioannis Sourdis and
Vasileios Vasilikos and
Dimitrios Rodopoulos and
Dimitrios Soudris},
title = {Runtime management of adaptive MPSoCs for graceful degradation},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {5:1--5:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968517},
doi = {10.1145/2968455.2968517},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TzilisSVRS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangXCTLY16,
author = {Yu Wang and
Lixue Xia and
Ming Cheng and
Tianqi Tang and
Boxun Li and
Huazhong Yang},
title = {{RRAM} based learning acceleration},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {9:1--9:2},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2981124},
doi = {10.1145/2968455.2981124},
timestamp = {Tue, 24 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WangXCTLY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZengHT16,
author = {Luyuan Zeng and
Pengcheng Huang and
Lothar Thiele},
title = {Towards the design of fault-tolerant mixed-criticality systems on
multicores},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {6:1--6:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968515},
doi = {10.1145/2968455.2968515},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZengHT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangJCX16,
author = {Youhui Zhang and
Yu Ji and
Wenguang Chen and
Yuan Xie},
title = {Neural network transformation under hardware constraints},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {8:1},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2981122},
doi = {10.1145/2968455.2981122},
timestamp = {Wed, 19 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhangJCX16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2016,
title = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455},
doi = {10.1145/2968455},
isbn = {978-1-4503-4482-1},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AlvesSMDC15,
author = {Marco A. Z. Alves and
Paulo C. Santos and
Francis B. Moreira and
Matthias Diener and
Luigi Carro},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Saving memory movements through vector processing in the {DRAM}},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {117--126},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324552},
doi = {10.1109/CASES.2015.7324552},
timestamp = {Fri, 08 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AlvesSMDC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Atoofian15,
author = {Ehsan Atoofian},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Reducing shift penalty in Domain Wall Memory through register locality},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {177--186},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324558},
doi = {10.1109/CASES.2015.7324558},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Atoofian15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ColinSL15,
author = {Alexei Colin and
Alanson P. Sample and
Brandon Lucia},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Energy-interference-free system and toolchain support for energy-harvesting
devices},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {35--36},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324542},
doi = {10.1109/CASES.2015.7324542},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ColinSL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DavisBGSFRCUWT15,
author = {B. Davis and
Ryan Baird and
Peter Gavin and
Magnus Sj{\"{a}}lander and
Ian Finlayson and
F. Rasapour and
G. Cook and
Gang{-}Ryung Uh and
David B. Whalley and
Gary S. Tyson},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Scheduling instruction effects for a statically pipelined processor},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {167--176},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324557},
doi = {10.1109/CASES.2015.7324557},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/DavisBGSFRCUWT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DillSO15,
author = {Russ Dill and
Aviral Shrivastava and
Hyunok Oh},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Optimization of multi-channel {BCH} error decoding for common cases},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {59--68},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324546},
doi = {10.1109/CASES.2015.7324546},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DillSO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DuraisamyLPK15,
author = {Karthi Duraisamy and
Hao Lu and
Partha Pratim Pande and
Ananth Kalyanaraman},
editor = {Ravi Iyer and
Siddharth Garg},
title = {High performance and energy efficient wireless NoC-enabled multicore
architectures for graph analytics},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {147--156},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324555},
doi = {10.1109/CASES.2015.7324555},
timestamp = {Tue, 03 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DuraisamyLPK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Esmaeilzadeh15,
author = {Hadi Esmaeilzadeh},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Approximate acceleration: {A} path through the era of dark silicon
and big data},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {31--32},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324540},
doi = {10.1109/CASES.2015.7324540},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Esmaeilzadeh15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HeDJ15,
author = {Xuejing He and
Robert P. Dick and
Russ Joseph},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Embedded system and application aware design of deregulated energy
delivery systems},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {1--10},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324537},
doi = {10.1109/CASES.2015.7324537},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HeDJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IngoleMAP15,
author = {Ashutosh Ingole and
Biswaroop Maiti and
John Augustine and
Krishna V. Palem},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Does customizing inexactness help over simplistic precision (bit-width)
reduction? {A} case study},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {33--34},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324541},
doi = {10.1109/CASES.2015.7324541},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/IngoleMAP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IrickZSN15,
author = {Kevin M. Irick and
Peter A. Zientara and
Jack Sampson and
Vijaykrishnan Narayanan},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Cognitive cameras: Assistive vision systems},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {188},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324560},
doi = {10.1109/CASES.2015.7324560},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/IrickZSN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JayasingheIARP15,
author = {Darshana Jayasinghe and
Aleksandar Ignjatovic and
Jude Angelo Ambrose and
Roshan G. Ragel and
Sri Parameswaran},
editor = {Ravi Iyer and
Siddharth Garg},
title = {QuadSeal: Quadruple algorithmic symmetrizing countermeasure against
power based side-channel attacks},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {21--30},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324539},
doi = {10.1109/CASES.2015.7324539},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JayasingheIARP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LaiCG15,
author = {Liangzhen Lai and
Vikas Chandra and
Puneet Gupta},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Evaluating and exploiting impacts of dynamic power management schemes
on system reliability},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {39--48},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324544},
doi = {10.1109/CASES.2015.7324544},
timestamp = {Thu, 28 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LaiCG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuGY15,
author = {Weichen Liu and
Zonghua Gu and
Yaoyao Ye},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Efficient SAT-based application mapping and scheduling on multiprocessor
systems for throughput maximization},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {127--136},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324553},
doi = {10.1109/CASES.2015.7324553},
timestamp = {Mon, 09 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LiuGY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuLLX0Y15,
author = {Yongpan Liu and
Hehe Li and
Xueqing Li and
Chun Jason Xue and
Yuan Xie and
Huazhong Yang},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Self-powered wearable sensor node: Challenges and opportunities},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {189},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324561},
doi = {10.1109/CASES.2015.7324561},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LiuLLX0Y15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Misailovic15,
author = {Sasa Misailovic},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Accuracy-aware optimization of approximate programs},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {37--38},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324543},
doi = {10.1109/CASES.2015.7324543},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Misailovic15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MisraCBLDOBOS15,
author = {Veena Misra and
Benton H. Calhoun and
Shekhar Bhansali and
John C. Lach and
Suman Datta and
Mehmet Ozturk and
Alper Bozkurt and
{\"{O}}mer Oralkan and
Jason Strohmaier},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Self-powered wearable sensor platforms for wellness},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {187},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324559},
doi = {10.1109/CASES.2015.7324559},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MisraCBLDOBOS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NassarKE15,
author = {Ahmed Nassar and
Fadi J. Kurdahi and
Wael M. Elsharkasy},
editor = {Ravi Iyer and
Siddharth Garg},
title = {{NUVA:} Architectural support for runtime verification of parametric
specifications over multicores},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {137--146},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324554},
doi = {10.1109/CASES.2015.7324554},
timestamp = {Wed, 21 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NassarKE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NurvitadhiMM15,
author = {Eriko Nurvitadhi and
Asit K. Mishra and
Debbie Marr},
editor = {Ravi Iyer and
Siddharth Garg},
title = {A sparse matrix vector multiply accelerator for support vector machine},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {109--116},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324551},
doi = {10.1109/CASES.2015.7324551},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/NurvitadhiMM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RahaJSR15,
author = {Arnab Raha and
Hrishikesh Jayakumar and
Soubhagya Sutar and
Vijay Raghunathan},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Quality-aware data allocation in approximate DRAM?},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {89--98},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324549},
doi = {10.1109/CASES.2015.7324549},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RahaJSR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RoyWW15,
author = {Pooja Roy and
Jianxing Wang and
Weng{-}Fai Wong},
editor = {Ravi Iyer and
Siddharth Garg},
title = {{PAC:} Program Analysis for Approximation-aware Compilation},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {69--78},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324547},
doi = {10.1109/CASES.2015.7324547},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/RoyWW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SampaioSZBH15,
author = {Felipe Sampaio and
Muhammad Shafique and
Bruno Zatt and
Sergio Bampi and
J{\"{o}}rg Henkel},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Approximation-aware Multi-Level Cells {STT-RAM} cache architecture},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {79--88},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324548},
doi = {10.1109/CASES.2015.7324548},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SampaioSZBH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SantiniRCW15,
author = {Thiago Santini and
Paolo Rech and
Luigi Carro and
Fl{\'{a}}vio Rech Wagner},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Exploiting cache conflicts to reduce radiation sensitivity of operating
systems on embedded systems},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {49--58},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324545},
doi = {10.1109/CASES.2015.7324545},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SantiniRCW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchuchhardtJAKM15,
author = {Matthew Schuchhardt and
Susmit Jha and
Raid Ayoub and
Michael Kishinevsky and
Gokhan Memik},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Optimizing mobile display brightness by leveraging human visual perception},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {11--20},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324538},
doi = {10.1109/CASES.2015.7324538},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SchuchhardtJAKM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SerranoMVMBQ15,
author = {Maria A. Serrano and
Alessandra Melani and
Roberto Vargas and
Andrea Marongiu and
Marko Bertogna and
Eduardo Qui{\~{n}}ones},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Timing characterization of OpenMP4 tasking model},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {157--166},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324556},
doi = {10.1109/CASES.2015.7324556},
timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SerranoMVMBQ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YouC15,
author = {Yi{-}Ping You and
Szu{-}Chieh Chen},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Vector-aware register allocation for {GPU} shader processors},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {99--108},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324550},
doi = {10.1109/CASES.2015.7324550},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/YouC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2015,
editor = {Ravi Iyer and
Siddharth Garg},
title = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
publisher = {{IEEE}},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7313573/proceeding},
isbn = {978-1-4673-8320-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BelhadjVVDHT14,
author = {Bilel Belhadj and
Alexandre Valentian and
Pascal Vivet and
Marc Duranton and
Liqiang He and
Olivier Temam},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {The improbable but highly appropriate marriage of 3D stacking and
neuromorphic accelerators},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {1:1--1:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656130},
doi = {10.1145/2656106.2656130},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BelhadjVVDHT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChandramohanO14,
author = {Kiran Chandramohan and
Michael F. P. O'Boyle},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A compiler framework for automatically mapping data parallel programs
to heterogeneous MPSoCs},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {9:1--9:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656107},
doi = {10.1145/2656106.2656107},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChandramohanO14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DardaillonMRMC14,
author = {Micka{\"{e}}l Dardaillon and
Kevin Marquet and
Tanguy Risset and
J{\'{e}}r{\^{o}}me Martin and
Henri{-}Pierre Charles},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A compilation flow for parametric dataflow: Programming model, scheduling,
and application to heterogeneous MPSoC},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {8:1--8:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656110},
doi = {10.1145/2656106.2656110},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/DardaillonMRMC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GrudnitskyBH14,
author = {Artjom Grudnitsky and
Lars Bauer and
J{\"{o}}rg Henkel},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {{COREFAB:} Concurrent reconfigurable fabric utilization in heterogeneous
multi-core systems},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {5:1--5:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656119},
doi = {10.1145/2656106.2656119},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GrudnitskyBH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HaabBH14,
author = {Martin Haa{\ss} and
Lars Bauer and
J{\"{o}}rg Henkel},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Automatic custom instruction identification in memory streaming algorithms},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {6:1--6:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656114},
doi = {10.1145/2656106.2656114},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HaabBH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HeppB14,
author = {Stefan Hepp and
Florian Brandner},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Splitting functions into single-entry regions},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {17:1--17:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656128},
doi = {10.1145/2656106.2656128},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HeppB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HoltonBSR14,
author = {Bryce Holton and
Ke Bai and
Aviral Shrivastava and
Harini Ramaprasad},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Construction of {GCCFG} for inter-procedural optimizations in Software
Managed Manycore {(SMM)} architectures},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {18:1--18:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656122},
doi = {10.1145/2656106.2656122},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HoltonBSR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuDHC14,
author = {Kai Hu and
Trung Anh Dinh and
Tsung{-}Yi Ho and
Krishnendu Chakrabarty},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Control-layer optimization for flow-based mVLSI microfluidic biochips},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {16:1--16:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656118},
doi = {10.1145/2656106.2656118},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuDHC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuangHTICW14,
author = {Jing Huang and
Yuanjie Huang and
Olivier Temam and
Paolo Ienne and
Yunji Chen and
Chengyong Wu},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A low-cost memory interface for high-throughput accelerators},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {11:1--11:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656109},
doi = {10.1145/2656106.2656109},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HuangHTICW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimLWMMP14,
author = {Ryan Gary Kim and
Guangshuo Liu and
Paul Wettin and
Radu Marculescu and
Diana Marculescu and
Partha Pratim Pande},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Energy-efficient VFI-partitioned multicore design using wireless NoC
architectures},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {3:1--3:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656120},
doi = {10.1145/2656106.2656120},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimLWMMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LuPGR14,
author = {Qining Lu and
Karthik Pattabiraman and
Meeta Sharma Gupta and
Jude A. Rivers},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {SDCTune: {A} model for predicting the {SDC} proneness of an application
for configurable protection},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {23:1--23:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656127},
doi = {10.1145/2656106.2656127},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LuPGR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MiniskarKPY14,
author = {Narasinga Rao Miniskar and
Soma Kohli and
Haewoo Park and
Donghoon Yoo},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Retargetable automatic generation of compound instructions for {CGRA}
based reconfigurable processor applications},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {4:1--4:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656125},
doi = {10.1145/2656106.2656125},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MiniskarKPY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Nasre14,
author = {Rupesh Nasre},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Auto-parallelization of data structure operations for GPUs},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {7:1--7:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656115},
doi = {10.1145/2656106.2656115},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Nasre14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OttlikSVRB14,
author = {Sebastian Ottlik and
Stefan Stattelmann and
Alexander Viehl and
Wolfgang Rosenstiel and
Oliver Bringmann},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Context-sensitive timing simulation of binary embedded software},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {14:1--14:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656117},
doi = {10.1145/2656106.2656117},
timestamp = {Fri, 29 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/OttlikSVRB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PallisterEHB14,
author = {James Pallister and
Kerstin Eder and
Simon J. Hollis and
Jeremy Bennett},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A high-level model of embedded flash energy consumption},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {20:1--20:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656108},
doi = {10.1145/2656106.2656108},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PallisterEHB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/QuanP14,
author = {Wei Quan and
Andy D. Pimentel},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {A system-level simulation framework for evaluating task migration
in MPSoCs},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {13:1--13:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656111},
doi = {10.1145/2656106.2656111},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/QuanP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RoyMW14,
author = {Pooja Roy and
Manmohan Manoharan and
Weng{-}Fai Wong},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {EnVM: Virtual memory design for new memory architectures},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {12:1--12:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656121},
doi = {10.1145/2656106.2656121},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/RoyMW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchorBYT14,
author = {Lars Schor and
Iuliana Bacivarov and
Hoeseok Yang and
Lothar Thiele},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {AdaPNet: Adapting process networks in response to resource variations},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {22:1--22:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656112},
doi = {10.1145/2656106.2656112},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchorBYT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchuchhardtJAKM14,
author = {Matthew Schuchhardt and
Susmit Jha and
Raid Ayoub and
Michael Kishinevsky and
Gokhan Memik},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {{CAPED:} Context-aware personalized display brightness for mobile
devices},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {19:1--19:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656116},
doi = {10.1145/2656106.2656116},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchuchhardtJAKM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShiWLZBVX14,
author = {Weidong Shi and
Yuanfeng Wen and
Ziyi Liu and
Xi Zhao and
Dainis Boumber and
Ricardo Vilalta and
Lei Xu},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Fault resilient physical neural networks on a single chip},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {24:1--24:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656126},
doi = {10.1145/2656106.2656126},
timestamp = {Thu, 03 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ShiWLZBVX14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/StilkerichTEDWS14,
author = {Isabella Stilkerich and
Philip Taffner and
Christoph Erhardt and
Christian Dietrich and
Christian Wawersich and
Michael Stilkerich},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Team up: Cooperative memory management in embedded systems},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {10:1--10:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656129},
doi = {10.1145/2656106.2656129},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/StilkerichTEDWS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ViitanenKJT14,
author = {Timo Viitanen and
Heikki Kultala and
Pekka J{\"{a}}{\"{a}}skel{\"{a}}inen and
Jarmo Takala},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Heuristics for greedy transport triggered architecture interconnect
exploration},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {2:1--2:7},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656123},
doi = {10.1145/2656106.2656123},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ViitanenKJT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WagstaffSF14,
author = {Harry Wagstaff and
Tom Spink and
Bj{\"{o}}rn Franke},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Automated {ISA} branch coverage analysis and test case generation
for retargetable instruction set simulators},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {15:1--15:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656113},
doi = {10.1145/2656106.2656113},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WagstaffSF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WenZ14,
author = {Hao Wen and
Wei Zhang},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Reducing cache leakage energy for hybrid SPM-cache architectures},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {21:1--21:9},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656124},
doi = {10.1145/2656106.2656124},
timestamp = {Thu, 04 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WenZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2014,
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106},
doi = {10.1145/2656106},
isbn = {978-1-4503-3050-3},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CanisCFLHCGQACBA13,
author = {Andrew Canis and
Jongsok Choi and
Blair Fort and
Ruolong Lian and
Qijing Huang and
Nazanin Calagar and
Marcel Gort and
Jia Jun Qin and
Mark Aldham and
Tomasz S. Czajkowski and
Stephen Dean Brown and
Jason Helge Anderson},
title = {From software to accelerators with LegUp high-level synthesis},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {18:1--18:9},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662524},
doi = {10.1109/CASES.2013.6662524},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CanisCFLHCGQACBA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChakrabortyP13,
author = {Prasenjit Chakraborty and
Preeti Ranjan Panda},
title = {SPM-Sieve: {A} framework for assisting data partitioning in scratch
pad memory based systems},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {21:1--21:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662527},
doi = {10.1109/CASES.2013.6662527},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChakrabortyP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenSOYH13,
author = {Jiunn{-}Yeu Chen and
Bor{-}Yeh Shen and
Quan{-}Huei Ou and
Wuu Yang and
Wei{-}Chung Hsu},
title = {Effective code discovery for ARM/Thumb mixed {ISA} binaries in a static
binary translator},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {19:1--19:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662525},
doi = {10.1109/CASES.2013.6662525},
timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChenSOYH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenY13,
author = {Hao Chen and
Chengmo Yang},
title = {Fault detection and recovery efficiency co-optimization through compile-time
analysis and runtime adaptation},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {22:1--22:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662528},
doi = {10.1109/CASES.2013.6662528},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChenY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ClemonsPSA13,
author = {Jason Clemons and
Andrea Pellegrini and
Silvio Savarese and
Todd M. Austin},
title = {{EVA:} An efficient vision architecture for mobile systems},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {13:1--13:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662517},
doi = {10.1109/CASES.2013.6662517},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ClemonsPSA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CordesENM13,
author = {Daniel Cordes and
Michael Engel and
Olaf Neugebauer and
Peter Marwedel},
title = {Automatic Extraction of pipeline parallelism for embedded heterogeneous
multi-core platforms},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {4:1--4:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662508},
doi = {10.1109/CASES.2013.6662508},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CordesENM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DasKV13,
author = {Anup Das and
Akash Kumar and
Bharadwaj Veeravalli},
title = {Aging-aware hardware-software task partitioning for reliable reconfigurable
multiprocessor systems},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {1:1--1:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662505},
doi = {10.1109/CASES.2013.6662505},
timestamp = {Sat, 24 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DasKV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GauthierUI13,
author = {Lovic Gauthier and
Shinya Ueno and
Koji Inoue},
title = {Hybrid compile and run-time memory management for a 3D-stacked reconfigurable
accelerator},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {10:1--10:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662514},
doi = {10.1109/CASES.2013.6662514},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GauthierUI13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HalsteadN13,
author = {Robert J. Halstead and
Walid A. Najjar},
title = {Compiled multithreaded data paths on FPGAs for dynamic workloads},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {3:1--3:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662507},
doi = {10.1109/CASES.2013.6662507},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HalsteadN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HameedBH13,
author = {Fazal Hameed and
Lars Bauer and
J{\"{o}}rg Henkel},
title = {Simultaneously optimizing {DRAM} cache hit latency and miss rate via
novel set mapping policies},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {11:1--11:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662515},
doi = {10.1109/CASES.2013.6662515},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HameedBH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JacobsonSL13,
author = {Clas A. Jacobson and
Richard Schooler and
Michel Laurence},
title = {Cyber physical systems: Systems engineering of industrial embedded
systems - Barriers, enablers and opportunities},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {1--3},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662503},
doi = {10.1109/CASES.2013.6662503},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JacobsonSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JantzK13,
author = {Michael R. Jantz and
Prasad A. Kulkarni},
title = {Exploiting phase inter-dependencies for faster iterative compiler
optimization phase order searches},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {7:1--7:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662511},
doi = {10.1109/CASES.2013.6662511},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JantzK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimPSL13,
author = {BaekGyu Kim and
Linh T. X. Phan and
Oleg Sokolsky and
Insup Lee},
title = {Platform-dependent code generation for embedded real-time software},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {8:1--8:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662512},
doi = {10.1109/CASES.2013.6662512},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/KimPSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LepleyPF13,
author = {Thierry Lepley and
Pierre G. Paulin and
Eric Flamand},
title = {A novel compilation approach for image processing graphs on a many-core
platform with explicitly managed memory},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {6:1--6:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662510},
doi = {10.1109/CASES.2013.6662510},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LepleyPF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MohrGMBHH13,
author = {Manuel Mohr and
Artjom Grudnitsky and
Tobias Modschiedler and
Lars Bauer and
Sebastian Hack and
J{\"{o}}rg Henkel},
title = {Hardware acceleration for programs in {SSA} form},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {14:1--14:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662518},
doi = {10.1109/CASES.2013.6662518},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MohrGMBHH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NazarSC13,
author = {Gabriel L. Nazar and
Leonardo P. Santos and
Luigi Carro},
title = {Scrubbing unit repositioning for fast error repair in FPGAs},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {2:1--2:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662506},
doi = {10.1109/CASES.2013.6662506},
timestamp = {Thu, 01 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/NazarSC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PorpodasC13,
author = {Vasileios Porpodas and
Marcelo Cintra},
title = {CAeSaR: Unified cluster-assignment scheduling and communication reuse
for clustered {VLIW} processors},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {9:1--9:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662513},
doi = {10.1109/CASES.2013.6662513},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/PorpodasC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PricopiMVMV13,
author = {Mihai Pricopi and
Thannirmalai Somu Muthukaruppan and
Vanchinathan Venkataramani and
Tulika Mitra and
Sanjay Vishin},
title = {Power-performance modeling on asymmetric multi-cores},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {15:1--15:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662519},
doi = {10.1109/CASES.2013.6662519},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PricopiMVMV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Sankaralingam13,
author = {Karthikeyan Sankaralingam},
title = {Dynamic hardware specialization-using moore's bounty without burning
the chip down},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {17:1},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662522},
doi = {10.1109/CASES.2013.6662522},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Sankaralingam13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchorYBT13,
author = {Lars Schor and
Hoeseok Yang and
Iuliana Bacivarov and
Lothar Thiele},
title = {Expandable process networks to efficiently specify and explore task,
data, and pipeline parallelism},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {5:1--5:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662509},
doi = {10.1109/CASES.2013.6662509},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SchorYBT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Taylor13,
author = {Michael Bedford Taylor},
title = {Bitcoin and the age of Bespoke Silicon},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {16:1--16:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662520},
doi = {10.1109/CASES.2013.6662520},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Taylor13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangL13,
author = {Man Wang and
Zhiyuan Li},
title = {Global property violation detection and diagnosis for wireless sensor
networks},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {23:1--23:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662529},
doi = {10.1109/CASES.2013.6662529},
timestamp = {Wed, 20 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WangL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangRA13,
author = {Jia Jie Wang and
Partha S. Roop and
Sidharta Andalam},
title = {ILPc: {A} novel approach for scalable timing analysis of synchronous
programs},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {20:1--20:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662526},
doi = {10.1109/CASES.2013.6662526},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WangRA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YuanXYLZ13,
author = {Mengting Yuan and
Chun Jason Xue and
Chen Yong and
Qing'an Li and
Yingchao Zhao},
title = {Minimizing code size via page selection optimization on partitioned
memory architectures},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {12:1--12:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662516},
doi = {10.1109/CASES.2013.6662516},
timestamp = {Tue, 17 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/YuanXYLZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangZSDZ13,
author = {Xian Zhang and
Chao Zhang and
Guangyu Sun and
Jia Di and
Tao Zhang},
title = {An efficient run-time encryption scheme for non-volatile main memory},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {24:1--24:10},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662530},
doi = {10.1109/CASES.2013.6662530},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhangZSDZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Zilic13,
author = {Zeljko Zilic},
title = {Tutorial: Methodologies and tools for embedded multisensory systems
based on {ARM} cortex {M} processors},
booktitle = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CASES.2013.6662504},
doi = {10.1109/CASES.2013.6662504},
timestamp = {Fri, 19 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Zilic13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2013,
title = {International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
publisher = {{IEEE}},
year = {2013},
url = {https://ieeexplore.ieee.org/xpl/conhome/6648478/proceeding},
isbn = {978-1-4799-1400-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AnselPWCOOA12,
author = {Jason Ansel and
Maciej Pacula and
Yee Lok Wong and
Cy P. Chan and
Marek Olszewski and
Una{-}May O'Reilly and
Saman P. Amarasinghe},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Siblingrivalry: online autotuning through local competitions},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {91--100},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380425},
doi = {10.1145/2380403.2380425},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AnselPWCOOA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChadhaMN12,
author = {Gaurav Chadha and
Scott A. Mahlke and
Satish Narayanasamy},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {When less is more {(LIMO):} controlled parallelism forimproved efficiency},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {141--150},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380431},
doi = {10.1145/2380403.2380431},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChadhaMN12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChakrabortyP12,
author = {Prasenjit Chakraborty and
Preeti Ranjan Panda},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Integrating software caches with scratch pad memory},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {201--210},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380440},
doi = {10.1145/2380403.2380440},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChakrabortyP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DuongKZV12,
author = {Nam Duong and
Taesu Kim and
Dali Zhao and
Alexander V. Veidenbaum},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Revisiting level-0 caches in embedded processors},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {171--180},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380435},
doi = {10.1145/2380403.2380435},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DuongKZV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DykaWWWL12,
author = {Zoya Dyka and
Christian Walczyk and
Damian Walczyk and
Christian Wenger and
Peter Langend{\"{o}}rfer},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Side channel attacks and the non volatile memory of the future},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {13--16},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380413},
doi = {10.1145/2380403.2380413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DykaWWWL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GutierrezPDM12,
author = {Anthony Gutierrez and
Joseph Pusdesris and
Ronald G. Dreslinski and
Trevor N. Mudge},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Lazy cache invalidation for self-modifying codes},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {151--160},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380433},
doi = {10.1145/2380403.2380433},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GutierrezPDM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HongGH12,
author = {Mei Hong and
Hui Guo and
Xiaobo Sharon Hu},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {A cost-effective tag design for memory data authentication in embedded
systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {17--26},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380414},
doi = {10.1145/2380403.2380414},
timestamp = {Sun, 19 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HongGH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JeongKHLM12,
author = {Jinkyu Jeong and
Hwanju Kim and
Jeaho Hwang and
Joonwon Lee and
Seungryoul Maeng},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {DaaC: device-reserved memory as an eviction-based file cache},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {191--200},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380439},
doi = {10.1145/2380403.2380439},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JeongKHLM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KiasariJBBL12,
author = {Abbas Eslami Kiasari and
Axel Jantsch and
Marco Bekooij and
Alan Burns and
Zhonghai Lu},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Analytical approaches for performance evaluation of networks-on-chip},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {211--212},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380442},
doi = {10.1145/2380403.2380442},
timestamp = {Thu, 17 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KiasariJBBL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LandyS12,
author = {Aaron Landy and
Greg Stitt},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {A low-overhead interconnect architecture for virtual reconfigurable
fabrics},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {111--120},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380427},
doi = {10.1145/2380403.2380427},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LandyS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MinhassPMB12,
author = {Wajid Hassan Minhass and
Paul Pop and
Jan Madsen and
Felician Stefan Blaga},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Architectural synthesis of flow-based microfluidic large-scale integration
biochips},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {181--190},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380437},
doi = {10.1145/2380403.2380437},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MinhassPMB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MiniskarGKY12,
author = {Narasinga Rao Miniskar and
Pankaj Shailendra Gode and
Soma Kohli and
Donghoon Yoo},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Function inlining and loop unrolling for loop acceleration in reconfigurable
processors},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {101--110},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380426},
doi = {10.1145/2380403.2380426},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MiniskarGKY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PerezKCH12,
author = {Guillermo A. P{\'{e}}rez and
Chung{-}Min Kao and
Yeh{-}Ching Chung and
Wei{-}Chung Hsu},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {A hybrid just-in-time compiler for android: comparing {JIT} types
and the result of cooperation},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {41--50},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380418},
doi = {10.1145/2380403.2380418},
timestamp = {Thu, 08 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/PerezKCH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RaiYBT12,
author = {Devendra Rai and
Hoeseok Yang and
Iuliana Bacivarov and
Lothar Thiele},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Power agnostic technique for efficient temperature estimation of multicore
embedded systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {61--70},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380421},
doi = {10.1145/2380403.2380421},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RaiYBT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RamanLA12,
author = {Arun Raman and
Jae W. Lee and
David I. August},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {From sequential programming to flexible parallel execution},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {37--40},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380417},
doi = {10.1145/2380403.2380417},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RamanLA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SantosFS12,
author = {Juan Carlos Mart{\'{\i}}nez Santos and
Yunsi Fei and
Zhijie Jerry Shi},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Static secure page allocation for light-weight dynamic information
flow tracking},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {27--36},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380415},
doi = {10.1145/2380403.2380415},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SantosFS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SarkarMR12,
author = {Abhik Sarkar and
Frank Mueller and
Harini Ramaprasad},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Static task partitioning for locked caches in multi-core real-time
systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {161--170},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380434},
doi = {10.1145/2380403.2380434},
timestamp = {Mon, 22 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SarkarMR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchorBRYKT12,
author = {Lars Schor and
Iuliana Bacivarov and
Devendra Rai and
Hoeseok Yang and
Shin{-}Haeng Kang and
Lothar Thiele},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Scenario-based design flow for mapping streaming applications onto
on-chip many-core systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {71--80},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380422},
doi = {10.1145/2380403.2380422},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchorBRYKT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SheHC12,
author = {Dongrui She and
Yifan He and
Henk Corporaal},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Energy efficient special instruction support in an embedded processor
with compact isa},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {131--140},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380430},
doi = {10.1145/2380403.2380430},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SheHC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShenCHY12,
author = {Bor{-}Yeh Shen and
Jiunn{-}Yeu Chen and
Wei{-}Chung Hsu and
Wuu Yang},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {{LLBT:} an LLVM-based static binary translator},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {51--60},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380419},
doi = {10.1145/2380403.2380419},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShenCHY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WenLSJCLW12,
author = {Yuanfeng Wen and
Ziyi Liu and
Weidong Shi and
Yifei Jiang and
Albert M. K. Cheng and
Khoa Le},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Energy efficient hybrid display and predictive models for embedded
and mobile systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {121--130},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380429},
doi = {10.1145/2380403.2380429},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WenLSJCLW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WernsingSF12,
author = {John Robert Wernsing and
Greg Stitt and
Jeremy Fowers},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {The {RACECAR} heuristic for automatic function specialization on multi-core
heterogeneous systems},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {81--90},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380423},
doi = {10.1145/2380403.2380423},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WernsingSF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WongCKKPSGK12,
author = {Stephan Wong and
Luigi Carro and
Stamatios Kavvadias and
Georgios Keramidas and
Francesco Papariello and
Claudio Scordino and
Roberto Giorgi and
Stefanos Kaxiras},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Embedded reconfigurable architectures},
booktitle = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
pages = {213--214},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403.2380444},
doi = {10.1145/2380403.2380444},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WongCKKPSGK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2012,
editor = {Ahmed Jerraya and
Luca P. Carloni and
Vincent John Mooney III and
Rodric M. Rabbah},
title = {Proceedings of the 15th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2012, part of the Eighth
Embedded Systems Week, ESWeek 2012, Tampere, Finland, October 7-12,
2012},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380403},
doi = {10.1145/2380403},
isbn = {978-1-4503-1424-4},
timestamp = {Thu, 11 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Arvind11,
author = {Arvind},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Automatic generation of hardware/software interfaces},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {1--2},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038700},
doi = {10.1145/2038698.2038700},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Arvind11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiLS11,
author = {Ke Bai and
Di Lu and
Aviral Shrivastava},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Vector class on limited local memory {(LLM)} multi-core processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {215--224},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038731},
doi = {10.1145/2038698.2038731},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BaiLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BanaiyanMofradHD11,
author = {Abbas BanaiyanMofrad and
Houman Homayoun and
Nikil D. Dutt},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {FFT-cache: a flexible fault-tolerant cache architecture for ultra
low voltage operation},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {95--104},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038715},
doi = {10.1145/2038698.2038715},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BanaiyanMofradHD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ColombetBBHR11,
author = {Quentin Colombet and
Benoit Boissinot and
Philip Brisk and
Sebastian Hack and
Fabrice Rastello},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Graph-coloring and treescan register allocation using repairing},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {45--54},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038708},
doi = {10.1145/2038698.2038708},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ColombetBBHR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ColombetBD11,
author = {Quentin Colombet and
Florian Brandner and
Alain Darte},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Studying optimal spilling in the light of {SSA}},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {25--34},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038706},
doi = {10.1145/2038698.2038706},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ColombetBD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FalkK11,
author = {Heiko Falk and
Helena Kotthaus},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {WCET-driven cache-aware code positioning},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {145--154},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038722},
doi = {10.1145/2038698.2038722},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FalkK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FerreiraVMPC11,
author = {Ricardo S. Ferreira and
Julio C. Goldner Vendramini and
Lucas Mucida and
Monica Magalh{\~{a}}es Pereira and
Luigi Carro},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {An FPGA-based heterogeneous coarse-grained dynamically reconfigurable
architecture},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {195--204},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038728},
doi = {10.1145/2038698.2038728},
timestamp = {Fri, 04 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FerreiraVMPC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Heiser11,
author = {Gernot Heiser},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Low-overhead virtualization of mobile platforms},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {3--4},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038702},
doi = {10.1145/2038698.2038702},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Heiser11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IslamS11,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {A unified approach to eliminate memory accesses early},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {55--64},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038710},
doi = {10.1145/2038698.2038710},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/IslamS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JeyapaulS11,
author = {Reiley Jeyapaul and
Aviral Shrivastava},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Smart cache cleaning: energy efficient vulnerability reduction in
embedded processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {105--114},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038716},
doi = {10.1145/2038698.2038716},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JeyapaulS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KrishnamurthyPT11,
author = {Viswanath Krishnamurthy and
Swamy D. Ponpandi and
Akhilesh Tyagi},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {A novel thread scheduler design for polymorphic embedded systems},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {75--84},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038712},
doi = {10.1145/2038698.2038712},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KrishnamurthyPT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeM11,
author = {Seong{-}Won Lee and
Soo{-}Mook Moon},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Selective just-in-time compilation for client-side mobile javascript
engine},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {5--14},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038703},
doi = {10.1145/2038698.2038703},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MahmoodK11,
author = {Tayyeb Mahmood and
Soontae Kim},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Realizing near-true voltage scaling in variation-sensitive l1 caches
via fault buffers},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {85--94},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038714},
doi = {10.1145/2038698.2038714},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MahmoodK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MeyerCLS11,
author = {Brett H. Meyer and
Benton H. Calhoun and
John C. Lach and
Kevin Skadron},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Cost-effective safety and fault localization using distributed temporal
redundancy},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {125--134},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038719},
doi = {10.1145/2038698.2038719},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MeyerCLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MinN11,
author = {Sang Lyul Min and
Eyee Hyun Nam},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Hardware/software architecture for flash memory storage systems},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {235--236},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038735},
doi = {10.1145/2038698.2038735},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MinN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MinhassPM11,
author = {Wajid Hassan Minhass and
Paul Pop and
Jan Madsen},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {System-level modeling and synthesis of flow-based microfluidic biochips},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {225--234},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038733},
doi = {10.1145/2038698.2038733},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MinhassPM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NilakantanAGSH11,
author = {Siddharth Nilakantan and
Srikanth Annangi and
Nikhil Gulati and
Karthik Sangaiah and
Mark Hempstead},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Evaluation of an accelerator architecture for speckle reducing anisotropic
diffusion},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {185--194},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038727},
doi = {10.1145/2038698.2038727},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NilakantanAGSH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkKC11,
author = {Eunjung Park and
Sameer Kulkarni and
John Cavazos},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {An evaluation of different modeling techniques for iterative compilation},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {65--74},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038711},
doi = {10.1145/2038698.2038711},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkKC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PhanLS11,
author = {Linh T. X. Phan and
Insup Lee and
Oleg Sokolsky},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Compositional analysis of real-time embedded systems},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {237--238},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038736},
doi = {10.1145/2038698.2038736},
timestamp = {Thu, 26 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PhanLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PlazarKFM11,
author = {Sascha Plazar and
Jan C. Kleinsorge and
Heiko Falk and
Peter Marwedel},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {WCET-driven branch prediction aware code positioning},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {165--174},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038724},
doi = {10.1145/2038698.2038724},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PlazarKFM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SartoriK11,
author = {John Sartori and
Rakesh Kumar},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Architecting processors to allow voltage/reliability tradeoffs},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {115--124},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038718},
doi = {10.1145/2038698.2038718},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SartoriK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SartoriSK11,
author = {John Sartori and
Joseph Sloan and
Rakesh Kumar},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Stochastic computing: embracing errors in architectureand design of
processors and applications},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {135--144},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038720},
doi = {10.1145/2038698.2038720},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SartoriSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SimalatsarRLPPT11,
author = {Alena Simalatsar and
Yusi Ramadian and
Kai Lampka and
Simon Perathoner and
Roberto Passerone and
Lothar Thiele},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Enabling parametric feasibility analysis in real-time calculus driven
performance evaluation},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {155--164},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038723},
doi = {10.1145/2038698.2038723},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SimalatsarRLPPT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SinghKS11,
author = {Amit Kumar Singh and
Akash Kumar and
Thambipillai Srikanthan},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {A hybrid strategy for mapping multiple throughput-constrained applications
on MPSoCs},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {175--184},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038726},
doi = {10.1145/2038698.2038726},
timestamp = {Fri, 24 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SinghKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SmithK11,
author = {Adam R. Smith and
Prasad A. Kulkarni},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Localizing globals and statics to make {C} programs thread-safe},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {205--214},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038730},
doi = {10.1145/2038698.2038730},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SmithK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangPCHSH11,
author = {Chih{-}Sheng Wang and
Guillermo A. P{\'{e}}rez and
Yeh{-}Ching Chung and
Wei{-}Chung Hsu and
Wei{-}Kuan Shih and
Hong{-}Rong Hsu},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {A method-based ahead-of-time compiler for android applications},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {15--24},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038704},
doi = {10.1145/2038698.2038704},
timestamp = {Thu, 08 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WangPCHSH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangWX11,
author = {Xuemeng Zhang and
Hui Wu and
Jingling Xue},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {An efficient heuristic for instruction scheduling on clustered vliw
processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {35--44},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038707},
doi = {10.1145/2038698.2038707},
timestamp = {Fri, 18 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZhangWX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2011,
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
publisher = {{ACM}},
year = {2011},
isbn = {978-1-4503-0713-0},
timestamp = {Mon, 05 Feb 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Barr10,
author = {Alan H. Barr},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Parsimonious information technologies for pixels, perception, wetware
and simulation: issues for Petrasek's global virtual hospital system},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {55--56},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878931},
doi = {10.1145/1878921.1878931},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Barr10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BuchwaldZ10,
author = {Sebastian Buchwald and
Andreas Zwinkau},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Instruction selection by graph transformation},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {31--40},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878926},
doi = {10.1145/1878921.1878926},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BuchwaldZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarroG10,
author = {Luigi Carro and
Georgi Gaydadjiev},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Challenges for embedded multicore architecture},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {259--260},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878960},
doi = {10.1145/1878921.1878960},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CarroG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChakrabortyHKDEK10,
author = {Arup Chakraborty and
Houman Homayoun and
Amin Khajeh and
Nikil D. Dutt and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {E {\textless} {MC2:} less energy through multi-copy cache},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {237--246},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878956},
doi = {10.1145/1878921.1878956},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChakrabortyHKDEK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenSS10,
author = {Zhimin Chen and
Ambuj Sinha and
Patrick Schaumont},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Implementing virtual secure circuit using a custom-instruction approach},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {57--66},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878933},
doi = {10.1145/1878921.1878933},
timestamp = {Mon, 28 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChenSS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DasikaWSCMM10,
author = {Ganesh S. Dasika and
Mark Woh and
Sangwon Seo and
Nathan Clark and
Trevor N. Mudge and
Scott A. Mahlke},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Mighty-morphing power-SIMD},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {67--76},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878934},
doi = {10.1145/1878921.1878934},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DasikaWSCMM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GauthierITTT10,
author = {Lovic Gauthier and
Tohru Ishihara and
Hideki Takase and
Hiroyuki Tomiyama and
Hiroaki Takada},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Minimizing inter-task interferences in scratch-pad memory usage for
reducing the energy consumption of multi-task systems},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {157--166},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878945},
doi = {10.1145/1878921.1878945},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GauthierITTT10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GirbalTYBL10,
author = {Sylvain Girbal and
Olivier Temam and
Sami Yehia and
Hugues Berry and
Zheng Li},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {A memory interface for multi-purpose multi-stream accelerators},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {107--116},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878939},
doi = {10.1145/1878921.1878939},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GirbalTYBL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuG10,
author = {Ji Gu and
Hui Guo},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Enabling large decoded instruction loop caching for energy-aware embedded
processors},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {247--256},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878957},
doi = {10.1145/1878921.1878957},
timestamp = {Thu, 30 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GuG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuhaHS10,
author = {Apala Guha and
Kim M. Hazelwood and
Mary Lou Soffa},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Balancing memory and performance through selective flushing of software
code caches},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {1--10},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878923},
doi = {10.1145/1878921.1878923},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GuhaHS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IslamS10,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Characterization and exploitation of narrow-width loads: the narrow-width
cache approach},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {227--236},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878955},
doi = {10.1145/1878921.1878955},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/IslamS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JantzK10,
author = {Michael R. Jantz and
Prasad A. Kulkarni},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Eliminating false phase interactions to reduce optimization phase
order search space},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {187--196},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878950},
doi = {10.1145/1878921.1878950},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JantzK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KedemMMPDP10,
author = {Zvi M. Kedem and
Vincent John Mooney and
Kirthi Krishna Muntimadugu and
Krishna V. Palem and
Avani Devarasetty and
Phani Deepak Parasuramuni},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Optimizing energy to minimize errors in dataflow graphs using approximate
adders},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {177--186},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878948},
doi = {10.1145/1878921.1878948},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KedemMMPDP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KrishnamoorthyVGANNF10,
author = {Ratna Krishnamoorthy and
Keshavan Varadarajan and
Ganesh Garga and
Mythri Alle and
S. K. Nandy and
Ranjani Narayan and
Masahiro Fujita},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Towards minimizing execution delays on dynamically reconfigurable
processors: a case study on {REDEFINE}},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {77--86},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878935},
doi = {10.1145/1878921.1878935},
timestamp = {Tue, 27 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/KrishnamoorthyVGANNF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeWK10,
author = {Dongwon Lee and
Marilyn Wolf and
Hyesoon Kim},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Design space exploration of the turbo decoding algorithm on GPUs},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {217--226},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878953},
doi = {10.1145/1878921.1878953},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeWK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiangM10,
author = {Yun Liang and
Tulika Mitra},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Improved procedure placement for set associative caches},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {147--156},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878944},
doi = {10.1145/1878921.1878944},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiangM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MafteiPM10,
author = {Elena Maftei and
Paul Pop and
Jan Madsen},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Routing-based synthesis of digital microfluidic biochips},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {41--50},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878928},
doi = {10.1145/1878921.1878928},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MafteiPM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MallikMSS10,
author = {Arindam Mallik and
Peter Marwedel and
Dimitrios Soudris and
Sander Stuijk},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {{MNEMEE:} a framework for memory management and optimization of static
and dynamic data in MPSoCs},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {257--258},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878959},
doi = {10.1145/1878921.1878959},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MallikMSS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MarongiuBB10,
author = {Andrea Marongiu and
Paolo Burgio and
Luca Benini},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Vertical stealing: robust, locality-aware do-all workload distribution
for 3D MPSoCs},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {207--216},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878952},
doi = {10.1145/1878921.1878952},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MarongiuBB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MirandaPDCD10,
author = {Cupertino Miranda and
Antoniu Pop and
Philippe Dumont and
Albert Cohen and
Marc Duranton},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Erbium: a deterministic, concurrent intermediate representation to
map data-flow tasks to scalable, persistent streaming processes},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {11--20},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878924},
doi = {10.1145/1878921.1878924},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MirandaPDCD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NamolaruCFZF10,
author = {Mircea Namolaru and
Albert Cohen and
Grigori Fursin and
Ayal Zaks and
Ari Freund},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Practical aggregation of semantical program properties for machine
learning based optimization},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {197--206},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878951},
doi = {10.1145/1878921.1878951},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NamolaruCFZF10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Palem10,
author = {Krishna V. Palem},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Compilers, architectures and synthesis for embedded computing: retrospect
and prospect},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {167--176},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878947},
doi = {10.1145/1878921.1878947},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Palem10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkBD10,
author = {JongSoo Park and
James D. Balfour and
William J. Dally},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Fine-grain dynamic instruction placement for {L0} scratch-pad memory},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {137--146},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878943},
doi = {10.1145/1878921.1878943},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkBD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkPMK10,
author = {Yongjun Park and
Hyunchul Park and
Scott A. Mahlke and
Sukjin Kim},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Resource recycling: putting idle resources to work on a composable
accelerator},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {21--30},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878925},
doi = {10.1145/1878921.1878925},
timestamp = {Mon, 07 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkPMK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PetrasekBP10,
author = {Danny Petrasek and
Alan Barr and
Krishna V. Palem},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {The virtual hospital: the emergence of telemedicine},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {53--54},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878930},
doi = {10.1145/1878921.1878930},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PetrasekBP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PingaliN10,
author = {Rajeswari Pingali and
P. Niranjana},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Mosaic of organic development through technology intervention in the
rural indian context},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {51--52},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878929},
doi = {10.1145/1878921.1878929},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PingaliN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/UzelacM10,
author = {Vladimir Uzelac and
Aleksandar Milenkovic},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Hardware-based data value and address trace filtering techniques},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {117--126},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878940},
doi = {10.1145/1878921.1878940},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/UzelacM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/UzelacMBM10,
author = {Vladimir Uzelac and
Aleksandar Milenkovic and
Martin Burtscher and
Milena Milenkovic},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Real-time unobtrusive program execution trace compression using branch
predictor events},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {97--106},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878938},
doi = {10.1145/1878921.1878938},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/UzelacMBM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangWXTRY10,
author = {Xuejun Yang and
Li Wang and
Jingling Xue and
Tao Tang and
Xiaoguang Ren and
Sen Ye},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Improving scratchpad allocation with demand-driven data tiling},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {127--136},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878942},
doi = {10.1145/1878921.1878942},
timestamp = {Wed, 01 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangWXTRY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YounLPKC10,
author = {Jonghee M. Youn and
Jongwon Lee and
Yunheung Paek and
Jongwung Kim and
Jeonghun Cho},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Implementing dynamic implied addressing mode for multi-output instructions},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {87--96},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878937},
doi = {10.1145/1878921.1878937},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YounLPKC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2010,
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
publisher = {{ACM}},
year = {2010},
isbn = {978-1-60558-903-9},
timestamp = {Wed, 26 Jan 2011 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AnandB09,
author = {Kapil Anand and
Rajeev Barua},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Instruction cache locking inside a binary rewriter},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {185--194},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629422},
doi = {10.1145/1629395.1629422},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AnandB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BahiE09,
author = {Mouad Bahi and
Christine Eisenbeis},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Spatial complexity of reversibly computable {DAG}},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {47--56},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629404},
doi = {10.1145/1629395.1629404},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BahiE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BournoutianO09,
author = {Garo Bournoutian and
Alex Orailoglu},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Reducing impact of cache miss stalls in embedded systems by extracting
guaranteed independent instructions},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {117--126},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629413},
doi = {10.1145/1629395.1629413},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BournoutianO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarpenterRA09,
author = {Paul M. Carpenter and
Alex Ram{\'{\i}}rez and
Eduard Ayguad{\'{e}}},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Mapping stream programs onto heterogeneous multiprocessor systems},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {57--66},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629406},
doi = {10.1145/1629395.1629406},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CarpenterRA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChokshiBSP09,
author = {Rooju Chokshi and
Krzysztof S. Berezowski and
Aviral Shrivastava and
Stanislaw J. Piestrak},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Exploiting residue number system for power-efficient digital signal
processing in embedded processors},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {19--28},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629401},
doi = {10.1145/1629395.1629401},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChokshiBSP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DouXJ09,
author = {Yong Dou and
Fei Xia and
Jingfei Jiang},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Fine-grained parallel application specific computing for {RNA} secondary
structure prediction using {SCFGS} on {FPGA}},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {107--116},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629412},
doi = {10.1145/1629395.1629412},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DouXJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/EbnerSK09,
author = {Dietmar Ebner and
Bernhard Scholz and
Andreas Krall},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Progressive spill code placement},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {77--86},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629408},
doi = {10.1145/1629395.1629408},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/EbnerSK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FaySG09,
author = {Dan Fay and
Li Shang and
Dirk Grunwald},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {A platform for developing adaptable multicore applications},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {157--166},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629418},
doi = {10.1145/1629395.1629418},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/FaySG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FellAVBDCNN09,
author = {Alexander Fell and
Mythri Alle and
Keshavan Varadarajan and
Prasenjit Biswas and
Saptarsi Das and
Jugantor Chetia and
S. K. Nandy and
Ranjani Narayan},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Streaming {FFT} on REDEFINE-v2: an application-architecture design
space exploration},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {127--136},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629414},
doi = {10.1145/1629395.1629414},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/FellAVBDCNN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GrayA09,
author = {Ian Gray and
Neil C. Audsley},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Exposing non-standard architectures to embedded software using compile-time
virtualisation},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {147--156},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629417},
doi = {10.1145/1629395.1629417},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GrayA09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuptaSL09,
author = {Manoj Gupta and
Ferm{\'{\i}}n S{\'{a}}nchez and
Josep Llosa},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Hybrid multithreading for {VLIW} processors},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {37--46},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629403},
doi = {10.1145/1629395.1629403},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GuptaSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HempsteadWB09,
author = {Mark Hempstead and
Gu{-}Yeon Wei and
David M. Brooks},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {An accelerator-based wireless sensor network processor in 130nm {CMOS}},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {215--222},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629426},
doi = {10.1145/1629395.1629426},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HempsteadWB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JamaaCLM09,
author = {M. Haykel Ben Jamaa and
Gianfranco Cerofolini and
Yusuf Leblebici and
Giovanni De Micheli},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Complete nanowire crossbar framework optimized for the multi-spacer
patterning technique},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {11--16},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629398},
doi = {10.1145/1629395.1629398},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JamaaCLM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KandemirZMON09,
author = {Mahmut T. Kandemir and
Yuanrui Zhang and
Sai Prashanth Muralidhara and
Ozcan Ozturk and
Sri Hari Krishna Narayanan},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Slicing based code parallelization for minimizing inter-processor
communication},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {87--96},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629409},
doi = {10.1145/1629395.1629409},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KandemirZMON09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LauLC09,
author = {Mark S. K. Lau and
Keck Voon Ling and
Yun{-}Chung Chu},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Energy-aware probabilistic multiplier: design and analysis},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {281--290},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629434},
doi = {10.1145/1629395.1629434},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LauLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiSJL09,
author = {Tao Li and
Zhigang Sun and
Wu Jigang and
Xicheng Lu},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Fast enumeration of maximal valid subgraphs for custom-instruction
identification},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {29--36},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629402},
doi = {10.1145/1629395.1629402},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiSJL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuSWGX09,
author = {Duo Liu and
Zili Shao and
Meng Wang and
Minyi Guo and
Jingling Xue},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Optimal loop parallelization for maximizing iteration-level parallelism},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {67--76},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629407},
doi = {10.1145/1629395.1629407},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LiuSWGX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MafteiPM09,
author = {Elena Maftei and
Paul Pop and
Jan Madsen},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Tabu search-based synthesis of dynamically reconfigurable digital
microfluidic biochips},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {195--204},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629423},
doi = {10.1145/1629395.1629423},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MafteiPM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NarasimhanGR09,
author = {Priya Narasimhan and
Rajeev Gandhi and
Dan Rossi},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Smartphone-based assistive technologies for the blind},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {223--232},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629427},
doi = {10.1145/1629395.1629427},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NarasimhanGR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OuyangRMZXM09,
author = {Jin Ouyang and
Raghuveer Raghavendra and
Sibin Mohan and
Tao Zhang and
Yuan Xie and
Frank Mueller},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {CheckerCore: enhancing an {FPGA} soft core to capture worst-case execution
times},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {175--184},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629421},
doi = {10.1145/1629395.1629421},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/OuyangRMZXM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PalemCKAM09,
author = {Krishna V. Palem and
Lakshmi N. Chakrapani and
Zvi M. Kedem and
Lingamneni Avinash and
Kirthi Krishna Muntimadugu},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Sustaining moore's law in embedded computing through probabilistic
and approximate design: retrospects and prospects},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {1--10},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629397},
doi = {10.1145/1629395.1629397},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PalemCKAM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkPM09,
author = {Yongjun Park and
Hyunchul Park and
Scott A. Mahlke},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {{CGRA} express: accelerating execution using dynamic operation fusion},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {271--280},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629433},
doi = {10.1145/1629395.1629433},
timestamp = {Mon, 07 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkPM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RoopAHYT09,
author = {Partha S. Roop and
Sidharta Andalam and
Reinhard von Hanxleden and
Simon Yuan and
Claus Traulsen},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Tight {WCRT} analysis of synchronous {C} programs},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {205--214},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629424},
doi = {10.1145/1629395.1629424},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RoopAHYT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SasanHEK09,
author = {Avesta Sasan and
Houman Homayoun and
Ahmed M. Eltawil and
Fadi J. Kurdahi},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {A fault tolerant cache architecture for sub 500mV operation: resizable
data composer cache (RDC-cache)},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {251--260},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629431},
doi = {10.1145/1629395.1629431},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SasanHEK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchelerHOPSL09,
author = {Fabian Scheler and
Wanja Hofer and
Benjamin Oechslein and
Rudi Pfister and
Wolfgang Schr{\"{o}}der{-}Preikschat and
Daniel Lohmann},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Parallel, hardware-supported interrupt handling in an event-triggered
real-time operating system},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {167--174},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629419},
doi = {10.1145/1629395.1629419},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SchelerHOPSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SeolSKM09,
author = {Jinho Seol and
Hyotaek Shim and
Jaegeuk Kim and
Seungryoul Maeng},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {A buffer replacement algorithm exploiting multi-chip parallelism in
solid state disks},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {137--146},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629416},
doi = {10.1145/1629395.1629416},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SeolSKM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SloanK09,
author = {Joseph Sloan and
Rakesh Kumar},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Towards scalable reliability frameworks for error prone CMPs},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {261--270},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629432},
doi = {10.1145/1629395.1629432},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SloanK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangWQX09,
author = {Yuexuan Wang and
Yongcai Wang and
Xiao Qi and
Liwen Xu},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {{OPAIMS:} open architecture precision agriculture information monitoring
system},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {233--240},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629428},
doi = {10.1145/1629395.1629428},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WangWQX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangXHLY09,
author = {Yu Wang and
Jiang Xu and
Shengxi Huang and
Weichen Liu and
Huazhong Yang},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {A case study of on-chip sensor network in multiprocessor system-on-chip},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {241--250},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629430},
doi = {10.1145/1629395.1629430},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WangXHLY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YiannacourasSR09,
author = {Peter Yiannacouras and
J. Gregory Steffan and
Jonathan Rose},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Fine-grain performance scaling of soft vector processors},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {97--106},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629411},
doi = {10.1145/1629395.1629411},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YiannacourasSR09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Yoon09,
author = {Soon Fatt Yoon},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {III-V/Si integration: potential and outlook for integrated low power
micro and nanosystems},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {17--18},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629399},
doi = {10.1145/1629395.1629399},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Yoon09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2009,
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
publisher = {{ACM}},
year = {2009},
timestamp = {Mon, 26 Oct 2009 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AlkabaniK08,
author = {Yousra Alkabani and
Farinaz Koushanfar},
editor = {Erik R. Altman},
title = {Active control and digital rights management of integrated circuit
{IP} cores},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {227--234},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450129},
doi = {10.1145/1450095.1450129},
timestamp = {Fri, 04 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AlkabaniK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Athas08,
author = {Bill Athas},
editor = {Erik R. Altman},
title = {Power on demand for mobile computing devices},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {79},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450097},
doi = {10.1145/1450095.1450097},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Athas08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiocchiCDH08,
author = {Jos{\'{e}} Baiocchi and
Bruce R. Childers and
Jack W. Davidson and
Jason Hiser},
editor = {Erik R. Altman},
title = {Reducing pressure in bounded {DBT} code caches},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {109--118},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450114},
doi = {10.1145/1450095.1450114},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BaiocchiCDH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BinderVSM08,
author = {Walter Binder and
Alex Villaz{\'{o}}n and
Martin Schoeberl and
Philippe Moret},
editor = {Erik R. Altman},
title = {Cache-aware cross-profiling for java processors},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {127--136},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450116},
doi = {10.1145/1450095.1450116},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BinderVSM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BiswasV08,
author = {Partha Biswas and
Girish Venkataramani},
editor = {Erik R. Altman},
title = {Comprehensive isomorphic subtree enumeration},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {177--186},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450122},
doi = {10.1145/1450095.1450122},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BiswasV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BonziniAP08,
author = {Paolo Bonzini and
Giovanni Ansaloni and
Laura Pozzi},
editor = {Erik R. Altman},
title = {Compiling custom instructions onto expression-grained reconfigurable
architectures},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {51--60},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450106},
doi = {10.1145/1450095.1450106},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BonziniAP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BouchezDR08,
author = {Florent Bouchez and
Alain Darte and
Fabrice Rastello},
editor = {Erik R. Altman},
title = {Advanced conservative and optimistic register coalescing},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {147--156},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450119},
doi = {10.1145/1450095.1450119},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BouchezDR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChakrapaniMAGP08,
author = {Lakshmi N. Chakrapani and
Kirthi Krishna Muntimadugu and
Lingamneni Avinash and
Jason George and
Krishna V. Palem},
editor = {Erik R. Altman},
title = {Highly energy and performance efficient embedded computing through
approximately correct arithmetic: a mathematical foundation and preliminary
experimental validation},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {187--196},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450124},
doi = {10.1145/1450095.1450124},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChakrapaniMAGP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChangS08,
author = {Hoseok Chang and
Wonyong Sung},
editor = {Erik R. Altman},
title = {Efficient vectorization of {SIMD} programs with non-aligned and irregular
data access hardware},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {167--176},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450121},
doi = {10.1145/1450095.1450121},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChangS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DubachJO08,
author = {Christophe Dubach and
Timothy M. Jones and
Michael F. P. O'Boyle},
editor = {Erik R. Altman},
title = {Exploring and predicting the architecture/optimising compiler co-design
space},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {31--40},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450103},
doi = {10.1145/1450095.1450103},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DubachJO08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GhodratGN08,
author = {Mohammad Ali Ghodrat and
Tony Givargis and
Alex Nicolau},
editor = {Erik R. Altman},
title = {Control flow optimization in loops using interval analysis},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {157--166},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450120},
doi = {10.1145/1450095.1450120},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GhodratGN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuptaFABM08,
author = {Shantanu Gupta and
Shuguang Feng and
Amin Ansari and
Jason A. Blome and
Scott A. Mahlke},
editor = {Erik R. Altman},
title = {StageNetSlice: a reconfigurable microarchitecture building block for
resilient {CMP} systems},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {1--10},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450099},
doi = {10.1145/1450095.1450099},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GuptaFABM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HenryHN08,
author = {Michael B. Henry and
Syed Imtiaz Haider and
Leyla Nazhandali},
editor = {Erik R. Altman},
title = {A low-power parallel design of discrete wavelet transform using subthreshold
voltage technology},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {235--244},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450130},
doi = {10.1145/1450095.1450130},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HenryHN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HomK08,
author = {Jerry Hom and
Ulrich Kremer},
editor = {Erik R. Altman},
title = {Execution context optimization for disk energy},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {255--264},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450132},
doi = {10.1145/1450095.1450132},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HomK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HomayounMV08,
author = {Houman Homayoun and
Mohammad A. Makhzan and
Alexander V. Veidenbaum},
editor = {Erik R. Altman},
title = {Multiple sleep mode leakage control for cache peripheral circuits
in embedded processors},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {197--206},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450125},
doi = {10.1145/1450095.1450125},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HomayounMV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HormatiKMBR08,
author = {Amir Hormati and
Manjunath Kudlur and
Scott A. Mahlke and
David F. Bacon and
Rodric M. Rabbah},
editor = {Erik R. Altman},
title = {Optimus: efficient realization of streaming applications on FPGAs},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {41--50},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450105},
doi = {10.1145/1450095.1450105},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HormatiKMBR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuangV08,
author = {Chen Huang and
Frank Vahid},
editor = {Erik R. Altman},
title = {Dynamic coprocessor management for FPGA-enhanced compute platforms},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {71--78},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450108},
doi = {10.1145/1450095.1450108},
timestamp = {Mon, 07 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuangV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KhatibH08,
author = {Mohammed G. Khatib and
Pieter H. Hartel},
editor = {Erik R. Altman},
title = {Power management of MEMS-based storage devices for mobile systems},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {245--254},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450131},
doi = {10.1145/1450095.1450131},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KhatibH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LicklyLKPEL08,
author = {Ben Lickly and
Isaac Liu and
Sungjun Kim and
Hiren D. Patel and
Stephen A. Edwards and
Edward A. Lee},
editor = {Erik R. Altman},
title = {Predictable programming on a precision timed architecture},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {137--146},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450117},
doi = {10.1145/1450095.1450117},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LicklyLKPEL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Martonosi08,
author = {Margaret Martonosi},
editor = {Erik R. Altman},
title = {ZebraNet and beyond: applications and systems support for mobile,
dynamic networks},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {21},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450096},
doi = {10.1145/1450095.1450096},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Martonosi08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NairL08,
author = {Ajay Nair and
Roman L. Lysecky},
editor = {Erik R. Altman},
title = {Non-intrusive dynamic application profiler for detailed loop execution
characterization},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {23--30},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450102},
doi = {10.1145/1450095.1450102},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NairL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NiakiCBNGLI08,
author = {Seyed{-}Hosein Attarzadeh{-}Niaki and
Alessandro Cevrero and
Philip Brisk and
Chrysostomos Nicopoulos and
Frank K. G{\"{u}}rkaynak and
Yusuf Leblebici and
Paolo Ienne},
editor = {Erik R. Altman},
title = {Design space exploration for field programmable compressor trees},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {207--216},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450126},
doi = {10.1145/1450095.1450126},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NiakiCBNGLI08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Puffitsch08,
author = {Wolfgang Puffitsch},
editor = {Erik R. Altman},
title = {Decoupled root scanning in multi-processor systems},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {91--98},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450111},
doi = {10.1145/1450095.1450111},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Puffitsch08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ReidFGL08,
author = {Alastair David Reid and
Kriszti{\'{a}}n Flautner and
Edmund Grimley{-}Evans and
Yuan Lin},
editor = {Erik R. Altman},
title = {SoC-C: efficient programming abstractions for heterogeneous multicore
systems on chip},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {95--104},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450112},
doi = {10.1145/1450095.1450112},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ReidFGL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SunZ08,
author = {Yu Sun and
Wei Zhang},
editor = {Erik R. Altman},
title = {Efficient code caching to improve performance and energy consumption
for java applications},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {119--126},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450115},
doi = {10.1145/1450095.1450115},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SunZ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TawkIN08,
author = {Melhem Tawk and
Khaled Z. Ibrahim and
Sma{\"{\i}}l Niar},
editor = {Erik R. Altman},
title = {Multi-granularity sampling for simulating concurrent heterogeneous
applications},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {217--226},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450127},
doi = {10.1145/1450095.1450127},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TawkIN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VillaPS08,
author = {Oreste Villa and
Gianluca Palermo and
Cristina Silvano},
editor = {Erik R. Altman},
title = {Efficiency and scalability of barrier synchronization on NoC based
many-core architectures},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {81--90},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450110},
doi = {10.1145/1450095.1450110},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VillaPS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangO08,
author = {Chengmo Yang and
Alex Orailoglu},
editor = {Erik R. Altman},
title = {A light-weight cache-based fault detection and checkpointing scheme
for MPSoCs enabling relaxed execution synchronization},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {11--20},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450100},
doi = {10.1145/1450095.1450100},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangO08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YiannacourasSR08,
author = {Peter Yiannacouras and
J. Gregory Steffan and
Jonathan Rose},
editor = {Erik R. Altman},
title = {{VESPA:} portable, scalable, and flexible FPGA-based vector processors},
booktitle = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {61--70},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450095.1450107},
doi = {10.1145/1450095.1450107},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YiannacourasSR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2008,
editor = {Erik R. Altman},
title = {Proceedings of the 2008 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2008, Atlanta, GA, USA,
October 19-24, 2008},
publisher = {{ACM}},
year = {2008},
timestamp = {Mon, 27 Oct 2008 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AaMS07,
author = {Tom Vander Aa and
Bingfeng Mei and
Bjorn De Sutter},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A backtracking instruction scheduler using predicate-based code hoisting
to fill delay slots},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {229--237},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289921},
doi = {10.1145/1289881.1289921},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AaMS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BadeaNV07,
author = {Carmen Badea and
Alexandru Nicolau and
Alexander V. Veidenbaum},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A simplified java bytecode compilation system for resource-constrained
embedded processors},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {218--228},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289920},
doi = {10.1145/1289881.1289920},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BadeaNV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiocchiCDHM07,
author = {Jos{\'{e}} Baiocchi and
Bruce R. Childers and
Jack W. Davidson and
Jason Hiser and
Jonathan Misurda},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Fragment cache management for dynamic binary translators in embedded
systems with scratchpad},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {75--84},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289898},
doi = {10.1145/1289881.1289898},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BaiocchiCDHM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BrandnerEK07,
author = {Florian Brandner and
Dietmar Ebner and
Andreas Krall},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Compiler generation from structural architecture descriptions},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {13--22},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289886},
doi = {10.1145/1289881.1289886},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BrandnerEK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BriskVI07,
author = {Philip Brisk and
Ajay Kumar Verma and
Paolo Ienne},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {An optimistic and conservative register assignment heuristic for chordal
graphs},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {209--217},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289919},
doi = {10.1145/1289881.1289919},
timestamp = {Tue, 03 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BriskVI07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChiYCC07,
author = {Jaw{-}Wei Chi and
Chia{-}Lin Yang and
Yi{-}Jung Chen and
Jian{-}Jia Chen},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Cache leakage control mechanism for hard real-time systems},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {248--256},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289924},
doi = {10.1145/1289881.1289924},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChiYCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChoIDYP07,
author = {Doosan Cho and
Ilya Issenin and
Nikil D. Dutt and
Jonghee W. Yoon and
Yunheung Paek},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Software controlled memory layout reorganization for irregular array
access patterns},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {179--188},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289915},
doi = {10.1145/1289881.1289915},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChoIDYP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DominguezNB07,
author = {Angel Dominguez and
Nghi Nguyen and
Rajeev Barua},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Recursive function data allocation to scratch-pad memory},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {65--74},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289897},
doi = {10.1145/1289881.1289897},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DominguezNB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GaoKLAM07,
author = {Lei Gao and
Stefan Kraemer and
Rainer Leupers and
Gerd Ascheid and
Heinrich Meyr},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A fast and generic hybrid simulation approach using {C} virtual machine},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {3--12},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289885},
doi = {10.1145/1289881.1289885},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GaoKLAM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HaiderN07,
author = {Syed Imtiaz Haider and
Leyla Nazhandali},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A hybrid code compression technique using bitmask and prefix encoding
with enhanced dictionary selection},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {58--62},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289894},
doi = {10.1145/1289881.1289894},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HaiderN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HooverBS07,
author = {Greg Hoover and
Forrest Brewer and
Timothy Sherwood},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Towards understanding architectural tradeoffs in {MEMS} closed-loop
feedback control},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {95--102},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289901},
doi = {10.1145/1289881.1289901},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HooverBS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuynhSM07,
author = {Huynh Phung Huynh and
Joon Edward Sim and
Tulika Mitra},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {An efficient framework for dynamic reconfiguration of instruction-set
customization},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {135--144},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289906},
doi = {10.1145/1289881.1289906},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuynhSM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JiSQ07,
author = {Weixing Ji and
Feng Shi and
Baojun Qiao},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A self-maintained memory module supporting {DMM}},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {189--197},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289916},
doi = {10.1145/1289881.1289916},
timestamp = {Fri, 03 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/JiSQ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JungCJKL07,
author = {Dawoon Jung and
Yoon{-}Hee Chae and
Heeseung Jo and
Jinsoo Kim and
Joonwon Lee},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A group-based wear-leveling algorithm for large-capacity flash memory
storage systems},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {160--164},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289911},
doi = {10.1145/1289881.1289911},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JungCJKL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Kirner07,
author = {Raimund Kirner},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {SCCP/x: a compilation profile to support testing and verification
of optimized code},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {38--42},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289890},
doi = {10.1145/1289881.1289890},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/Kirner07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LinKMM07,
author = {Yuan Lin and
Manjunath Kudlur and
Scott A. Mahlke and
Trevor N. Mudge},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Hierarchical coarse-grained stream compilation for software defined
radio},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {115--124},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289903},
doi = {10.1145/1289881.1289903},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LinKMM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MarongiuBK07,
author = {Andrea Marongiu and
Luca Benini and
Mahmut T. Kandemir},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Lightweight barrier-based parallelization support for non-cache-coherent
MPSoC platforms},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {145--149},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289908},
doi = {10.1145/1289881.1289908},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MarongiuBK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MoussaliGS07,
author = {Roger Moussali and
Nabil Ghanem and
Mazen A. R. Saghir},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Supporting multithreading in configurable soft processor cores},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {155--159},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289910},
doi = {10.1145/1289881.1289910},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MoussaliGS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Mudge07,
author = {Trevor N. Mudge},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Multicore architectures},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {208},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289883},
doi = {10.1145/1289881.1289883},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Mudge07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NagpalMBS07,
author = {Rahul Nagpal and
Arvind Madan and
Bharadwaj Amrutur and
Y. N. Srikant},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {{INTACTE:} an interconnect area, delay, and energy estimation tool
for microarchitectural explorations},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {238--247},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289923},
doi = {10.1145/1289881.1289923},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NagpalMBS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Najjar07,
author = {Walid A. Najjar},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Compiling code accelerators for FPGAs},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {1--2},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289882},
doi = {10.1145/1289881.1289882},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Najjar07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NguyenDB07,
author = {Nghi Nguyen and
Angel Dominguez and
Rajeev Barua},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Scratch-pad memory allocation without compiler support for java applications},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {85--94},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289899},
doi = {10.1145/1289881.1289899},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NguyenDB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OBrien07,
author = {Kevin K. O'Brien},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Techniques for code and data management in the local stores of the
cell processor},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {63--64},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289896},
doi = {10.1145/1289881.1289896},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/OBrien07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PlanaETTB07,
author = {Luis A. Plana and
Doug A. Edwards and
Sam Taylor and
Luis A. Tarazona and
Andrew Bardsley},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Performance-driven syntax-directed synthesis of asynchronous processors},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {43--47},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289891},
doi = {10.1145/1289881.1289891},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PlanaETTB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RamaniD07,
author = {Karthik Ramani and
Al Davis},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Application driven embedded system design: a face recognition case
study},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {103--114},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289902},
doi = {10.1145/1289881.1289902},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RamaniD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RaoV07,
author = {Ravishankar Rao and
Sarma B. K. Vrudhula},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Performance optimal processor throttling under thermal constraints},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {257--266},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289925},
doi = {10.1145/1289881.1289925},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RaoV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ReddyP07,
author = {Rakesh Reddy and
Peter Petrov},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Eliminating inter-process cache interference through cache reconfigurability
for real-time and low-power embedded multi-tasking systems},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {198--207},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289917},
doi = {10.1145/1289881.1289917},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ReddyP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchackelerS07,
author = {Stefan Sch{\"{a}}ckeler and
Weijia Shang},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Stack size reduction of recursive programs},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {48--52},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289892},
doi = {10.1145/1289881.1289892},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchackelerS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SinghaiKJMG07,
author = {Sharad Singhai and
MingYung Ko and
Sanjay Jinturkar and
Mayan Moudgill and
John Glossner},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {An integrated {ARM} and multi-core {DSP} simulator},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {33--37},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289889},
doi = {10.1145/1289881.1289889},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SinghaiKJMG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TitzerP07,
author = {Ben L. Titzer and
Jens Palsberg},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Vertical object layout and compression for fixed heaps},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {170--178},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289914},
doi = {10.1145/1289881.1289914},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TitzerP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VenturiniRFS07,
author = {Hugo Venturini and
Fr{\'{e}}d{\'{e}}ric Riss and
Jean{-}Claude Fernandez and
Miguel Santana},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Non-transparent debugging for software-pipelined loops},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {23--32},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289887},
doi = {10.1145/1289881.1289887},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VenturiniRFS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VermaBI07,
author = {Ajay Kumar Verma and
Philip Brisk and
Paolo Ienne},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Rethinking custom {ISE} identification: a new processor-agnostic method},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {125--134},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289905},
doi = {10.1145/1289881.1289905},
timestamp = {Tue, 03 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/VermaBI07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangKPKH07,
author = {Hoeseok Yang and
Sungchan Kim and
Hae{-}woo Park and
Jinwoo Kim and
Soonhoi Ha},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Performance evaluation and optimization of dual-port {SDRAM} architecture
for mobile embedded systems},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {53--57},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289893},
doi = {10.1145/1289881.1289893},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangKPKH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangO07,
author = {Chengmo Yang and
Alex Orailoglu},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Light-weight synchronization for inter-processor communication acceleration
on embedded MPSoCs},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {150--154},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289909},
doi = {10.1145/1289881.1289909},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangO07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZimmerHKTW07,
author = {Christopher Zimmer and
Stephen Roderick Hines and
Prasad A. Kulkarni and
Gary S. Tyson and
David B. Whalley},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Facilitating compiler optimizations through the dynamic mapping of
alternate register structures},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {165--169},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289912},
doi = {10.1145/1289881.1289912},
timestamp = {Tue, 10 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZimmerHKTW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZmilyK07,
author = {Ahmad Zmily and
Christos Kozyrakis},
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {A low power front-end for embedded processors using a block-aware
instruction set},
booktitle = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {267--276},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289881.1289926},
doi = {10.1145/1289881.1289926},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZmilyK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2007,
editor = {Taewhan Kim and
Pascal Sainrat and
Steven S. Lumetta and
Nacho Navarro},
title = {Proceedings of the 2007 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
publisher = {{ACM}},
year = {2007},
timestamp = {Fri, 23 Nov 2007 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AudsleyW06,
author = {Neil C. Audsley and
Michael Ward},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Syntax-driven implementation of software programming language control
constructs and expressions on FPGAs},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {253--260},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176792},
doi = {10.1145/1176760.1176792},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AudsleyW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiYD06,
author = {Lan S. Bai and
Lei Yang and
Robert P. Dick},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Automated compile-time and run-time techniques to increase usable
memory in MMU-less embedded systems},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {125--135},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176777},
doi = {10.1145/1176760.1176777},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BaiYD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BallapuramPLL06,
author = {Chinnakrishnan S. Ballapuram and
Kiran Puttaswamy and
Gabriel H. Loh and
Hsien{-}Hsin S. Lee},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Entropy-based low power data {TLB} design},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {304--311},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176797},
doi = {10.1145/1176760.1176797},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BallapuramPLL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BlomeGFM06,
author = {Jason A. Blome and
Shantanu Gupta and
Shuguang Feng and
Scott A. Mahlke},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Cost-efficient soft error protection for embedded microprocessors},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {421--431},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176811},
doi = {10.1145/1176760.1176811},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BlomeGFM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BonziniP06,
author = {Paolo Bonzini and
Laura Pozzi},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Code transformation strategies for extensible embedded processors},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {242--252},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176791},
doi = {10.1145/1176760.1176791},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BonziniP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BrorssonC06,
author = {Mats Brorsson and
Mikael Collin},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Adaptive and flexible dictionary code compression for embedded applications},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {113--124},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176776},
doi = {10.1145/1176760.1176776},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BrorssonC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarroMMPH06,
author = {Manuel Carro and
Jos{\'{e}} F. Morales and
Henk L. Muller and
Germ{\'{a}}n Puebla and
Manuel V. Hermenegildo},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {High-level languages for small devices: a case study},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {271--281},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176794},
doi = {10.1145/1176760.1176794},
timestamp = {Fri, 23 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CarroMMPH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CavazosDABOFT06,
author = {John Cavazos and
Christophe Dubach and
Felix V. Agakov and
Edwin V. Bonilla and
Michael F. P. O'Boyle and
Grigori Fursin and
Olivier Temam},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Automatic performance model construction for the fast software exploration
of new hardware designs},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {24--34},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176765},
doi = {10.1145/1176760.1176765},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CavazosDABOFT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Chen06,
author = {Liang{-}Gee Chen},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Dances with multimedia: embedded video codec design},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {1},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176761},
doi = {10.1145/1176760.1176761},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Chen06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChoiH06,
author = {Yoonseo Choi and
Hwansoo Han},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Protected heap sharing for memory-constrained java environments},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {212--222},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176787},
doi = {10.1145/1176760.1176787},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChoiH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ClarkHMY06,
author = {Nathan Clark and
Amir Hormati and
Scott A. Mahlke and
Sami Yehia},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Scalable subgraph mapping for acyclic computation accelerators},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {147--157},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176779},
doi = {10.1145/1176760.1176779},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ClarkHMY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DerbyshireBL06,
author = {Arran Derbyshire and
Tobias Becker and
Wayne Luk},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Incremental elaboration for run-time reconfigurable hardware designs},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {93--102},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176773},
doi = {10.1145/1176760.1176773},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DerbyshireBL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/EggerKJNLM06,
author = {Bernhard Egger and
Chihun Kim and
Choonki Jang and
Yoonsung Nam and
Jaejin Lee and
Sang Lyul Min},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {A dynamic code placement technique for scratchpad memory using postpass
optimization},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {223--233},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176788},
doi = {10.1145/1176760.1176788},
timestamp = {Sun, 05 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/EggerKJNLM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/EisleySP06,
author = {Noel Eisley and
Vassos Soteriou and
Li{-}Shiuan Peh},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {High-level power analysis for multi-core chips},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {389--400},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176807},
doi = {10.1145/1176760.1176807},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/EisleySP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GeorgeMAP06,
author = {Jason George and
Bo Marr and
Bilge Saglam Akgul and
Krishna V. Palem},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Probabilistic arithmetic and energy efficient embedded signal processing},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {158--168},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176781},
doi = {10.1145/1176760.1176781},
timestamp = {Wed, 25 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GeorgeMAP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GilbertA06,
author = {John Gilbert and
David M. Abrahamson},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Adaptive object code compression},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {282--292},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176795},
doi = {10.1145/1176760.1176795},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GilbertA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HardnettPC06,
author = {Charles Hardnett and
Krishna V. Palem and
Yogesh Chobe},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Compiler optimization of embedded applications for an adaptive SoC
architecture},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {312--322},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176798},
doi = {10.1145/1176760.1176798},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HardnettPC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HazelwoodK06,
author = {Kim M. Hazelwood and
Artur Klauser},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {A dynamic binary instrumentation engine for the {ARM} architecture},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {261--270},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176793},
doi = {10.1145/1176760.1176793},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HazelwoodK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HempsteadWB06,
author = {Mark Hempstead and
Gu{-}Yeon Wei and
David M. Brooks},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Architecture and circuit techniques for low-throughput, energy-constrained
systems across technology generations},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {368--378},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176805},
doi = {10.1145/1176760.1176805},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HempsteadWB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HinesWT06,
author = {Stephen Hines and
David B. Whalley and
Gary S. Tyson},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Adapting compilation techniques to enhance the packing of instructions
into registers},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {43--53},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176768},
doi = {10.1145/1176760.1176768},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HinesWT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HooverBS06,
author = {Greg Hoover and
Forrest Brewer and
Timothy Sherwood},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Extensible control architectures},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {323--333},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176800},
doi = {10.1145/1176760.1176800},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HooverBS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HooverBS06a,
author = {Greg Hoover and
Forrest Brewer and
Timothy Sherwood},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {A case study of multi-threading in the embedded space},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {357--367},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176803},
doi = {10.1145/1176760.1176803},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HooverBS06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JungBLMP06,
author = {Dong{-}Heon Jung and
Sung{-}Hwan Bae and
Jaemok Lee and
Soo{-}Mook Moon and
Jong Kuk Park},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time
compiler for embedded systems},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {35--42},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176767},
doi = {10.1145/1176760.1176767},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JungBLMP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KeungT06,
author = {Ka{-}Ming Keung and
Akhilesh Tyagi},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {State space reconfigurability: an implementation architecture for
self modifying finite automata},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {83--92},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176772},
doi = {10.1145/1176760.1176772},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KeungT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KgilM06,
author = {Taeho Kgil and
Trevor N. Mudge},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {FlashCache: a {NAND} flash memory file cache for low power web servers},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {103--112},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176774},
doi = {10.1145/1176760.1176774},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KgilM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeSIDV06,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt and
Nalini Venkatasubramanian},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Mitigating soft error failures for multimedia applications by selective
data protection},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {411--420},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176810},
doi = {10.1145/1176760.1176810},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeSIDV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuHHT06,
author = {Duo Liu and
Bei Hua and
Xianghui Hu and
Xinan Tang},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {High-performance packet classification algorithm for many-core and
multithreaded network processor},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {334--344},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176801},
doi = {10.1145/1176760.1176801},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiuHHT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LobBK06,
author = {Hans{-}Peter L{\"{o}}b and
Rainer Buchty and
Wolfgang Karl},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {A network agent for diagnosis and analysis of real-time Ethernet networks},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {65--73},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176770},
doi = {10.1145/1176760.1176770},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LobBK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NakashimaKN06,
author = {Hiroshi Nakashima and
Masahiro Konishi and
Takashi Nakada},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {An accurate and efficient simulation-based analysis for worst case
interruption delay},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {2--12},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176763},
doi = {10.1145/1176760.1176763},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NakashimaKN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkFKM06,
author = {Hyunchul Park and
Kevin Fan and
Manjunath Kudlur and
Scott A. Mahlke},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Modulo graph embedding: mapping applications onto coarse-grained reconfigurable
architectures},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {136--146},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176778},
doi = {10.1145/1176760.1176778},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkFKM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkJKKL06,
author = {Seon{-}Yeong Park and
Dawoon Jung and
Jeong{-}Uk Kang and
Jinsoo Kim and
Joonwon Lee},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {{CFLRU:} a replacement algorithm for flash memory},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {234--241},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176789},
doi = {10.1145/1176760.1176789},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkJKKL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RacuHEMH06,
author = {Razvan Racu and
Arne Hamann and
Rolf Ernst and
Bren Mochocki and
Xiaobo Sharon Hu},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Methods for power optimization in distributed embedded systems with
real-time requirements},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {379--388},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176806},
doi = {10.1145/1176760.1176806},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RacuHEMH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ScholzBX06,
author = {Bernhard Scholz and
Bernd Burgstaller and
Jingling Xue},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Minimizing bank selection instructions for partitioned memory architecture},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {201--211},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176786},
doi = {10.1145/1176760.1176786},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ScholzBX06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SeghirL06,
author = {Rachid Seghir and
Vincent Loechner},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Memory optimization by counting points in integer transformations
of parametric polytopes},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {74--82},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176771},
doi = {10.1145/1176760.1176771},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SeghirL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShahbahramiJV06,
author = {Asadollah Shahbahrami and
Ben H. H. Juurlink and
Stamatis Vassiliadis},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Limitations of special-purpose instructions for similarity measurements
in media {SIMD} extensions},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {293--303},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176796},
doi = {10.1145/1176760.1176796},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShahbahramiJV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShayestehRJSS06,
author = {Anahita Shayesteh and
Glenn Reinman and
Norman P. Jouppi and
Timothy Sherwood and
Suleyman Sair},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Improving the performance and power efficiency of shared helpers in
CMPs},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {345--356},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176802},
doi = {10.1145/1176760.1176802},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ShayestehRJSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SoD06,
author = {Won So and
Alexander G. Dean},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Reaching fast code faster: using modeling for efficient software thread
integration on a {VLIW} {DSP}},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {13--23},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176764},
doi = {10.1145/1176760.1176764},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SoD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/StrozekB06,
author = {Lukasz Strozek and
David M. Brooks},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Efficient architectures through application clustering and architectural
heterogeneity},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {190--200},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176784},
doi = {10.1145/1176760.1176784},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/StrozekB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SuhendraRM06,
author = {Vivy Suhendra and
Chandrashekar Raghavan and
Tulika Mitra},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Integrated scratchpad memory optimization and task scheduling for
MPSoC architectures},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {401--410},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176809},
doi = {10.1145/1176760.1176809},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SuhendraRM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VarmaAAKHJ06,
author = {Ankush Varma and
Muhammad Yaqub Afridi and
Akin Akturk and
Paul Klein and
Allen R. Hefner and
Bruce L. Jacob},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {54--64},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176769},
doi = {10.1145/1176760.1176769},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VarmaAAKHJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WooGOBL06,
author = {Dong Hyuk Woo and
Mrinmoy Ghosh and
Emre {\"{O}}zer and
Stuart Biles and
Hsien{-}Hsin S. Lee},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Reducing energy of virtual cache synonym lookup using bloom filters},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {179--189},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176783},
doi = {10.1145/1176760.1176783},
timestamp = {Thu, 12 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WooGOBL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangO06,
author = {Chengmo Yang and
Alex Orailoglu},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Power efficient branch prediction through early identification of
branch addresses},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {169--178},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176782},
doi = {10.1145/1176760.1176782},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2006,
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
publisher = {{ACM}},
year = {2006},
isbn = {1-59593-543-6},
timestamp = {Tue, 02 Aug 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AgrawalTA05,
author = {Sitij Agrawal and
William Thies and
Saman P. Amarasinghe},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Optimizing stream programs using linear state space analysis},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {126--136},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086315},
doi = {10.1145/1086297.1086315},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/AgrawalTA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CazorlaKSFRV05,
author = {Francisco J. Cazorla and
Peter M. W. Knijnenburg and
Rizos Sakellariou and
Enrique Fern{\'{a}}ndez and
Alex Ram{\'{\i}}rez and
Mateo Valero},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Architectural support for real-time task scheduling in {SMT} processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {166--176},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086320},
doi = {10.1145/1086297.1086320},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CazorlaKSFRV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenK05,
author = {Guangyu Chen and
Mahmut T. Kandemir},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Verifiable annotations for embedded java environments},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {105--114},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086312},
doi = {10.1145/1086297.1086312},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChenK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CheungLMLC05,
author = {Ray C. C. Cheung and
Dong{-}U Lee and
Oskar Mencer and
Wayne Luk and
Peter Y. K. Cheung},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Automating custom-precision function evaluation for embedded processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {22--31},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086302},
doi = {10.1145/1086297.1086302},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CheungLMLC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CoburnRRC05,
author = {Joel Coburn and
Srivaths Ravi and
Anand Raghunathan and
Srimat T. Chakradhar},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {{SECA:} security-enhanced communication architecture},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {78--89},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086308},
doi = {10.1145/1086297.1086308},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CoburnRRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/El-Haj-MahmoudAAR05,
author = {Ali El{-}Haj{-}Mahmoud and
Ahmed S. Al{-}Zawawi and
Aravindh Anantaraman and
Eric Rotenberg},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Virtual multiprocessor: an analyzable, high-performance architecture
for real-time computing},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {213--224},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086326},
doi = {10.1145/1086297.1086326},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/El-Haj-MahmoudAAR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GhattasD05,
author = {Rony Ghattas and
Alexander G. Dean},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Energy management for commodity short-bit-width microcontrollers},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {32--42},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086303},
doi = {10.1145/1086297.1086303},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GhattasD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GheorghitaBC05,
author = {Stefan Valentin Gheorghita and
Twan Basten and
Henk Corporaal},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Intra-task scenario-aware voltage scheduling},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {177--184},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086321},
doi = {10.1145/1086297.1086321},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GheorghitaBC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GhodratGN05,
author = {Mohammad Ali Ghodrat and
Tony Givargis and
Alexandru Nicolau},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Equivalence checking of arithmetic expressions using fast evaluation},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {147--156},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086317},
doi = {10.1145/1086297.1086317},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GhodratGN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GoelKK05,
author = {A. Goel and
C. Mani Krishna and
Israel Koren},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Energy aware kernel for hard real-time systems},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {185--190},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086322},
doi = {10.1145/1086297.1086322},
timestamp = {Sat, 10 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GoelKK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeM05,
author = {Hyunseok Lee and
Trevor N. Mudge},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {A dual-processor solution for the {MAC} layer of a software defined
radio terminal},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {257--265},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086331},
doi = {10.1145/1086297.1086331},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiCKI05,
author = {Feihui Li and
Guangyu Chen and
Mahmut T. Kandemir and
Mary Jane Irwin},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Compiler-directed proactive power management for networks},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {137--146},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086316},
doi = {10.1145/1086297.1086316},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiCKI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiLBHH05,
author = {Xin Li and
Jan Lukoschus and
Marian Boldt and
Michael Harder and
Reinhard von Hanxleden},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {An Esterel processor with full preemption support and its worst case
reaction time analysis},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {225--236},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086327},
doi = {10.1145/1086297.1086327},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiLBHH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MamidiBSGIIMJ05,
author = {Suman Mamidi and
Emily R. Blem and
Michael J. Schulte and
C. John Glossner and
Daniel Iancu and
Andrei Iancu and
Mayan Moudgill and
Sanjay Jinturkar},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Instruction set extensions for software defined radio on a multithreaded
processor},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {266--273},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086332},
doi = {10.1145/1086297.1086332},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MamidiBSGIIMJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MiddhaSB05,
author = {Bhuvan Middha and
Matthew S. Simpson and
Rajeev Barua},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {{MTSS:} multi task stack sharing for embedded systems},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {191--201},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086323},
doi = {10.1145/1086297.1086323},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MiddhaSB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MilenkovicMJ05,
author = {Milena Milenkovic and
Aleksandar Milenkovic and
Emil Jovanov},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Hardware support for code integrity in embedded processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {55--65},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086306},
doi = {10.1145/1086297.1086306},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MilenkovicMJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NazhandaliMZOAB05,
author = {Leyla Nazhandali and
Michael Minuth and
Bo Zhai and
Javin Olson and
Todd M. Austin and
David T. Blaauw},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {A second-generation sensor network processor with application-driven
memory optimizations and out-of-order execution},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {249--256},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086330},
doi = {10.1145/1086297.1086330},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NazhandaliMZOAB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NguyenDB05,
author = {Nghi Nguyen and
Angel Dominguez and
Rajeev Barua},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Memory allocation for embedded systems with a compile-time-unknown
scratch-pad size},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {115--125},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086313},
doi = {10.1145/1086297.1086313},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NguyenDB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OhDH05,
author = {Hyunok Oh and
Nikil D. Dutt and
Soonhoi Ha},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Single appearance schedule with dynamic loop count for minimum data
buffer from synchronous dataflow graphs},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {157--165},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086318},
doi = {10.1145/1086297.1086318},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/OhDH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PozziI05,
author = {Laura Pozzi and
Paolo Ienne},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Exploiting pipelining to relax register-file port constraints of instruction-set
extensions},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {2--10},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086300},
doi = {10.1145/1086297.1086300},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PozziI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RagelPK05,
author = {Roshan G. Ragel and
Sri Parameswaran and
Sayed Mohammad Kia},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Micro embedded monitoring for security in application specific instruction-set
processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {304--314},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086337},
doi = {10.1145/1086297.1086337},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/RagelPK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RoperO05,
author = {Matthew D. Roper and
Ronald A. Olsson},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Developing embedded multi-threaded applications with CATAPULTS, a
domain-specific language for generating thread schedulers},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {295--303},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086336},
doi = {10.1145/1086297.1086336},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RoperO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RosS05,
author = {Montserrat Ros and
Peter Sutton},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {A post-compilation register reassignment technique for improving hamming
distance code compression},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {97--104},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086311},
doi = {10.1145/1086297.1086311},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RosS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShivshankarVD05,
author = {Siddhartha Shivshankar and
Sunil Vangara and
Alexander G. Dean},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Balancing register pressure and context-switching delays in {ASTI}
systems},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {286--294},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086335},
doi = {10.1145/1086297.1086335},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShivshankarVD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShrivastavaID05,
author = {Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Compilation techniques for energy reduction in horizontally partitioned
cache architectures},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {90--96},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086310},
doi = {10.1145/1086297.1086310},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShrivastavaID05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SimpsonMB05,
author = {Matthew S. Simpson and
Bhuvan Middha and
Rajeev Barua},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Segment protection for embedded systems using run-time checks},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {66--77},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086307},
doi = {10.1145/1086297.1086307},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SimpsonMB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SoteriouEP05,
author = {Vassos Soteriou and
Noel Eisley and
Li{-}Shiuan Peh},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Software-directed power-aware interconnection networks},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {274--285},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086333},
doi = {10.1145/1086297.1086333},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SoteriouEP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Wolfe05,
author = {Michael Wolfe},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {How compilers and tools differ for embedded systems},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {1},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086298},
doi = {10.1145/1086297.1086298},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Wolfe05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YehR05,
author = {Thomas Y. Yeh and
Glenn Reinman},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Fast and fair: data-stream quality of service},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {237--248},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086328},
doi = {10.1145/1086297.1086328},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YehR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YehiaCMF05,
author = {Sami Yehia and
Nathan Clark and
Scott A. Mahlke and
Kriszti{\'{a}}n Flautner},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Exploring the design space of LUT-based transparent accelerators},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {11--21},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086301},
doi = {10.1145/1086297.1086301},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YehiaCMF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YiannacourasRS05,
author = {Peter Yiannacouras and
Jonathan Rose and
J. Gregory Steffan},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {The microarchitecture of FPGA-based soft processors},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {202--212},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086325},
doi = {10.1145/1086297.1086325},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YiannacourasRS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangZPL05,
author = {Tao Zhang and
Xiaotong Zhuang and
Santosh Pande and
Wenke Lee},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Anomalous path detection with hardware support},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {43--54},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086305},
doi = {10.1145/1086297.1086305},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhangZPL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2005,
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
publisher = {{ACM}},
year = {2005},
isbn = {1-59593-149-X},
timestamp = {Wed, 15 Feb 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AlluZ04,
author = {Bramha Allu and
Wei Zhang},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Static next sub-bank prediction for drowsy instruction cache},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {124--131},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023852},
doi = {10.1145/1023833.1023852},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AlluZ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AngioliniMFBO04,
author = {Federico Angiolini and
Francesco Menichelli and
Alberto Ferrero and
Luca Benini and
Mauro Olivieri},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {A post-compiler approach to scratchpad mapping of code},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {259--267},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023869},
doi = {10.1145/1023833.1023869},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AngioliniMFBO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AsokanD04,
author = {Vasanth Asokan and
Alexander G. Dean},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Providing time- and space- efficient procedure calls for asynchronous
software thread integration},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {167--178},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023858},
doi = {10.1145/1023833.1023858},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AsokanD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BatcherW04,
author = {Ken W. Batcher and
Robert A. Walker},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Cluster miss prediction with prefetch on miss for embedded {CPU} instruction
caches},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {24--34},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023839},
doi = {10.1145/1023833.1023839},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BatcherW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BeltramePSS04,
author = {Giovanni Beltrame and
Gianluca Palermo and
Donatella Sciuto and
Cristina Silvano},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Plug-in of power models in the StepNP exploration platform: analysis
of power/performance trade-offs},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {85--92},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023847},
doi = {10.1145/1023833.1023847},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BeltramePSS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BernerTGS04,
author = {David Berner and
Jean{-}Pierre Talpin and
Paul {Le Guernic} and
Sandeep K. Shukla},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Modular design through component abstraction},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {202--211},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023862},
doi = {10.1145/1023833.1023862},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BernerTGS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BiswasSB04,
author = {Surupa Biswas and
Matthew S. Simpson and
Rajeev Barua},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Memory overflow protection for embedded systems using run-time checks,
reuse and compression},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {280--291},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023872},
doi = {10.1145/1023833.1023872},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BiswasSB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarrS04,
author = {Steve Carr and
Philip H. Sweany},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Automatic data partitioning for the agere payload plus network processor},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {238--247},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023867},
doi = {10.1145/1023833.1023867},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CarrS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Cornish04,
author = {John Cornish},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Balanced energy optimization},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {156},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023835},
doi = {10.1145/1023833.1023835},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Cornish04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/EisleyP04,
author = {Noel Eisley and
Li{-}Shiuan Peh},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {High-level power analysis for on-chip networks},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {104--115},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023849},
doi = {10.1145/1023833.1023849},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/EisleyP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/El-Haj-MahmoudR04,
author = {Ali El{-}Haj{-}Mahmoud and
Eric Rotenberg},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Safely exploiting multithreaded processors to tolerate memory latency
in real-time systems},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {2--13},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023837},
doi = {10.1145/1023833.1023837},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/El-Haj-MahmoudR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GarciaABK04,
author = {Jesus Garcia and
Mark G. Arnold and
Leonidas G. Bleris and
Mayuresh V. Kothare},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {{LNS} architectures for embedded model predictive control processors},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {79--84},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023845},
doi = {10.1145/1023833.1023845},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GarciaABK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GuillonRBB04,
author = {Christophe Guillon and
Fabrice Rastello and
Thierry Bidault and
Florent Bouchez},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Procedure placement using temporal-ordering information: dealing with
code size expansion},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {268--279},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023870},
doi = {10.1145/1023833.1023870},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GuillonRBB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HuaQ04,
author = {Shaoxiong Hua and
Gang Qu},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Energy-efficient dual-voltage soft real-time system with (m, k)-firm
deadline guarantee},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {116--123},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023850},
doi = {10.1145/1023833.1023850},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HuaQ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KandemirOK04,
author = {Mahmut T. Kandemir and
Ozcan Ozturk and
Mustafa Karak{\"{o}}y},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Dynamic on-chip memory management for chip multiprocessors},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {14--23},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023838},
doi = {10.1145/1023833.1023838},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KandemirOK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KiembC04,
author = {Mary Kiemb and
Kiyoung Choi},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Memory and architecture exploration with thread shifting for multithreaded
processors in embedded systems},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {230--237},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023865},
doi = {10.1145/1023833.1023865},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KiembC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuZSS04,
author = {Meilin Liu and
Qingfeng Zhuge and
Zili Shao and
Edwin Hsing{-}Mean Sha},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {General loop fusion technique for nested loops considering timing
and code size},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {190--201},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023860},
doi = {10.1145/1023833.1023860},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiuZSS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MathewDP04,
author = {Binu K. Mathew and
Al Davis and
Michael A. Parker},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {A low power architecture for embedded perception},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {46--56},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023842},
doi = {10.1145/1023833.1023842},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MathewDP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MatsuokaSTV04,
author = {Yusuke Matsuoka and
Patrick Schaumont and
Kris Tiri and
Ingrid Verbauwhede},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Java cryptography on {KVM} and its performance and security optimization
using {HW/SW} co-design techniques},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {303--311},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023874},
doi = {10.1145/1023833.1023874},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MatsuokaSTV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NiuQ04,
author = {Linwei Niu and
Gang Quan},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Reducing both dynamic and leakage energy consumption for hard real-time
systems},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {140--148},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023854},
doi = {10.1145/1023833.1023854},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NiuQ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PisharathCK04,
author = {Jayaprakash Pisharath and
Alok N. Choudhary and
Mahmut T. Kandemir},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Reducing energy consumption of queries in memory-resident database
systems},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {35--45},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023840},
doi = {10.1145/1023833.1023840},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PisharathCK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RaoVK04,
author = {Ravishankar Rao and
Sarma B. K. Vrudhula and
Musaravakkam S. Krishnan},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Disk drive energy optimization for audio-video applications},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {93--103},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023848},
doi = {10.1145/1023833.1023848},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RaoVK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RosS04,
author = {Montserrat Ros and
Peter Sutton},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {A hamming distance based {VLIW/EPIC} code compression technique},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {132--139},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023853},
doi = {10.1145/1023833.1023853},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RosS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SalapuraGN04,
author = {Valentina Salapura and
Christos J. Georgiou and
Indira Nair},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {An efficient system-on-a-chip design methodology for networking applications},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {212--219},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023863},
doi = {10.1145/1023833.1023863},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SalapuraGN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchneiderBS04,
author = {Klaus Schneider and
Jens Brandt and
Tobias Sch{\"{u}}le},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Causality analysis of synchronous programs with delayed actions},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {179--189},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023859},
doi = {10.1145/1023833.1023859},
timestamp = {Thu, 14 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchneiderBS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SherwoodOC04,
author = {Timothy Sherwood and
Mark Oskin and
Brad Calder},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Balancing design options with Sherpa},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {57--68},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023843},
doi = {10.1145/1023833.1023843},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SherwoodOC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TurjanKD04,
author = {Alexandru Turjan and
Bart Kienhuis and
Ed F. Deprettere},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Translating affine nested-loop programs to process networks},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {220--229},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023864},
doi = {10.1145/1023833.1023864},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TurjanKD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VenkitaramanG04,
author = {Ramakrishnan Venkitaraman and
Gopal Gupta},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Static program analysis of embedded executable assembly code},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {157--166},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023857},
doi = {10.1145/1023833.1023857},
timestamp = {Wed, 26 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/VenkitaramanG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VerdoolaegeSBLB04,
author = {Sven Verdoolaege and
Rachid Seghir and
Kristof Beyls and
Vincent Loechner and
Maurice Bruynooghe},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Analytical computation of Ehrhart polynomials: enabling more compiler
analyses and optimizations},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {248--258},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023868},
doi = {10.1145/1023833.1023868},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VerdoolaegeSBLB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Vissers04,
author = {Kees A. Vissers},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Programming models and architectures for {FPGA} platforms},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {1},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023834},
doi = {10.1145/1023833.1023834},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Vissers04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YuM04,
author = {Pan Yu and
Tulika Mitra},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Scalable custom instructions identification for instruction-set extensible
processors},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {69--78},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023844},
doi = {10.1145/1023833.1023844},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YuM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangA04,
author = {Wei Zhang and
Bramha Allu},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Loop-based leakage control for branch predictors},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {149--155},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023855},
doi = {10.1145/1023833.1023855},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZhangA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhuangZLP04,
author = {Xiaotong Zhuang and
Tao Zhang and
Hsien{-}Hsin S. Lee and
Santosh Pande},
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Hardware assisted control flow obfuscation for embedded processors},
booktitle = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
pages = {292--302},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1023833.1023873},
doi = {10.1145/1023833.1023873},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhuangZLP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2004,
editor = {Mary Jane Irwin and
Wei Zhao and
Luciano Lavagno and
Scott A. Mahlke},
title = {Proceedings of the 2004 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2004, Washington DC, USA,
September 22 - 25, 2004},
publisher = {{ACM}},
year = {2004},
isbn = {1-58113-890-3},
timestamp = {Wed, 15 Feb 2006 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AngioliniBC03,
author = {Federico Angiolini and
Luca Benini and
Alberto Caprara},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Polynomial-time algorithm for on-chip scratchpad memory partitioning},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {318--326},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951751},
doi = {10.1145/951710.951751},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AngioliniBC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaleaniFMSPP03,
author = {Massimo Baleani and
Alberto Ferrari and
Leonardo Mangeruca and
Alberto L. Sangiovanni{-}Vincentelli and
Maurizio Peri and
Saverio Pezzini},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Fault-tolerant platforms for automotive safety-critical applications},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {170--177},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951734},
doi = {10.1145/951710.951734},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BaleaniFMSPP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BiswasD03,
author = {Partha Biswas and
Nikil D. Dutt},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Reducing code size for heterogeneous-connectivity-based {VLIW} DSPs
through synthesis of instruction set extensions},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {104--112},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951726},
doi = {10.1145/951710.951726},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BiswasD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChenKSI03,
author = {Guilin Chen and
Mahmut T. Kandemir and
Hendra Saputra and
Mary Jane Irwin},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Exploiting bank locality in multi-bank memories},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {287--297},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951748},
doi = {10.1145/951710.951748},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChenKSI03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ColavinR03,
author = {Osvaldo Colavin and
Davide Rizzo},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {A scalable wide-issue clustered {VLIW} with a reconfigurable interconnect},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {148--158},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951731},
doi = {10.1145/951710.951731},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ColavinR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DarteSV03,
author = {Alain Darte and
Robert Schreiber and
Gilles Villard},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Lattice-based memory allocation},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {298--308},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951749},
doi = {10.1145/951710.951749},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DarteSV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ErmedahlSE03,
author = {Andreas Ermedahl and
Friedhelm Stappert and
Jakob Engblom},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Clustered calculation of worst-case execution times},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {51--62},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951720},
doi = {10.1145/951710.951720},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ErmedahlSE03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Fisher03,
author = {Joseph A. Fisher},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Moving from embedded systems to embedded computing},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {1},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951711},
doi = {10.1145/951710.951711},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Fisher03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GoodwinP03,
author = {David Goodwin and
Darin Petkov},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Automatic generation of application specific processors},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {137--147},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951730},
doi = {10.1145/951710.951730},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GoodwinP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Gordon-RossV03,
author = {Ann Gordon{-}Ross and
Frank Vahid},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Frequent loop detection using efficient non-intrusive on-chip hardware},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {117--124},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951728},
doi = {10.1145/951710.951728},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Gordon-RossV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HunterM03,
author = {Hillery C. Hunter and
Jaime H. Moreno},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {A new look at exploiting data parallelism in embedded systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {159--169},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951733},
doi = {10.1145/951710.951733},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HunterM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KrishnaMA03,
author = {Rajeev Krishna and
Scott A. Mahlke and
Todd M. Austin},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Architectural optimizations for low-power, real-time speech recognition},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {220--231},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951740},
doi = {10.1145/951710.951740},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KrishnaMA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KulkarniGSK03,
author = {Chidamber Kulkarni and
Matthias Gries and
Christian Sauer and
Kurt Keutzer},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Programming challenges in network processor deployment},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {178--187},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951735},
doi = {10.1145/951710.951735},
timestamp = {Thu, 19 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/KulkarniGSK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LauSSC03,
author = {Jeremy Lau and
Stefan Schoenmackers and
Timothy Sherwood and
Brad Calder},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Reducing code size with echo instructions},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {84--94},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951724},
doi = {10.1145/951710.951724},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LauSSC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiG03,
author = {Bengu Li and
Rajiv Gupta},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Simple offset assignment in presence of subword data},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {12--23},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951715},
doi = {10.1145/951710.951715},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MathewDF03,
author = {Binu K. Mathew and
Al Davis and
Zhen Fang},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {A low-power accelerator for the {SPHINX} 3 speech recognition system},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {210--219},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951739},
doi = {10.1145/951710.951739},
timestamp = {Wed, 30 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MathewDF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MohantyP03,
author = {Sumit Mohanty and
Viktor K. Prasanna},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {A hierarchical approach for energy efficient application design using
heterogeneous embedded systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {243--254},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951743},
doi = {10.1145/951710.951743},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MohantyP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NaishlosBBZ03,
author = {Dorit Naishlos and
Marina Biberstein and
Shay Ben{-}David and
Ayal Zaks},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Vectorizing for a SIMdD {DSP} architecture},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {2--11},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951714},
doi = {10.1145/951710.951714},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NaishlosBBZ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NandivadaP03,
author = {V. Krishna Nandivada and
Jens Palsberg},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Efficient spill code for {SDRAM}},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {24--31},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951716},
doi = {10.1145/951710.951716},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NandivadaP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NogueraB03,
author = {Juanjo Noguera and
Rosa M. Badia},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {System-level power-performance trade-offs in task scheduling for dynamically
reconfigurable architectures},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {73--83},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951722},
doi = {10.1145/951710.951722},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NogueraB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/OlivaBH03,
author = {Dino Oliva and
Rainer Buchty and
Nevin Heintze},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {{AES} and the cryptonite crypto processor},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {198--209},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951738},
doi = {10.1145/951710.951738},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/OlivaBH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Palem03,
author = {Krishna V. Palem},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Energy aware algorithm design via probabilistic computing: from algorithms
and models to Moore's law and novel (semiconductor) devices},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {113--116},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951712},
doi = {10.1145/951710.951712},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Palem03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PoplavkoBBMM03,
author = {Peter Poplavko and
Twan Basten and
Marco Bekooij and
Jef L. van Meerbergen and
Bart Mesman},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Task-level timing models for guaranteed performance in multiprocessor
networks-on-chip},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {63--72},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951721},
doi = {10.1145/951710.951721},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PoplavkoBBMM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RavindranSMDGMB03,
author = {Rajiv A. Ravindran and
Robert M. Senger and
Eric D. Marsman and
Ganesh S. Dasika and
Matthew R. Guthaus and
Scott A. Mahlke and
Richard B. Brown},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Increasing the number of effective registers in a low-power processor
using a windowed register file},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {125--136},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951729},
doi = {10.1145/951710.951729},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RavindranSMDGMB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RosS03,
author = {Montserrat Ros and
Peter Sutton},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Compiler optimization and ordering effects on {VLIW} code compression},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {95--103},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951725},
doi = {10.1145/951710.951725},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RosS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SureshAYNB03,
author = {Dinesh C. Suresh and
Banit Agrawal and
Jun Yang and
Walid A. Najjar and
Laxmi N. Bhuyan},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Power efficient encoding techniques for off-chip data buses},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {267--275},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951745},
doi = {10.1145/951710.951745},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SureshAYNB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TerechkoTC03,
author = {Andrei Sergeevich Terechko and
Erwan Le Thenaff and
Henk Corporaal},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Cluster assignment of global values for clustered {VLIW} processors},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {32--40},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951717},
doi = {10.1145/951710.951717},
timestamp = {Fri, 26 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/TerechkoTC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/UdayakumaranB03,
author = {Sumesh Udayakumaran and
Rajeev Barua},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Compiler-decided dynamic memory allocation for scratch-pad based embedded
systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {276--286},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951747},
doi = {10.1145/951710.951747},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/UdayakumaranB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VarmaGSCSB03,
author = {Ankush Varma and
Brinda Ganesh and
Mainak Sen and
Suchismita Roy Choudhury and
Lakshmi Srinivasan and
Bruce L. Jacob},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {A control-theoretic approach to dynamic voltage scheduling},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {255--266},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951744},
doi = {10.1145/951710.951744},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VarmaGSCSB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VenugopalanGPDMS03,
author = {Ramnath Venugopalan and
Prasanth Ganesan and
Pushkin Peddabachagari and
Alexander G. Dean and
Frank Mueller and
Mihail L. Sichitiu},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Encryption overhead in embedded systems and sensor network nodes:
modeling and analysis},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {188--197},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951737},
doi = {10.1145/951710.951737},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VenugopalanGPDMS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WelchKSTD03,
author = {Benjamin J. Welch and
Shobhit O. Kanaujia and
Adarsh Seetharam and
Deepaksrivats Thirumalai and
Alexander G. Dean},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Extending {STI} for demanding hard-real-time systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {41--50},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951719},
doi = {10.1145/951710.951719},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WelchKSTD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangKSI03,
author = {Wei Zhang and
Mahmut T. Kandemir and
Anand Sivasubramaniam and
Mary Jane Irwin},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Performance, energy, and reliability tradeoffs in replicating hot
cache lines},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {309--317},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951750},
doi = {10.1145/951710.951750},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZhangKSI03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhongJ03,
author = {Lin Zhong and
Niraj K. Jha},
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Graphical user interface energy characterization for handheld computers},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
pages = {232--242},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/951710.951742},
doi = {10.1145/951710.951742},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ZhongJ03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2003,
editor = {Jaime H. Moreno and
Praveen K. Murthy and
Thomas M. Conte and
Paolo Faraboschi},
title = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2003, San Jose, California,
USA, October 30 - November 1, 2003},
publisher = {{ACM}},
year = {2003},
isbn = {1-58113-676-5},
timestamp = {Thu, 22 Apr 2004 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BakshiOP02,
author = {Amol Bakshi and
Jingzhao Ou and
Viktor K. Prasanna},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Towards automatic synthesis of a class of application-specific sensor
networks},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {50--58},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581639},
doi = {10.1145/581630.581639},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BakshiOP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BriskKKS02,
author = {Philip Brisk and
Adam Kaplan and
Ryan Kastner and
Majid Sarrafzadeh},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Instruction generation and regularity extraction for reconfigurable
processors},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {262--269},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581672},
doi = {10.1145/581630.581672},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BriskKKS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BruniBR02,
author = {Davide Bruni and
Luca Benini and
Bruno Ricc{\`{o}}},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {System lifetime extension by battery management: an experimental work},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {232--237},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581667},
doi = {10.1145/581630.581667},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BruniBR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChehidaA02,
author = {Karim Ben Chehida and
Michel Auguin},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {{HW} / {SW} partitioning approach for reconfigurable system design},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {247--251},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581670},
doi = {10.1145/581630.581670},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChehidaA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FischerTTW02,
author = {Dirk Fischer and
J{\"{u}}rgen Teich and
Michael Thies and
Ralph Weper},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Efficient architecture/compiler co-exploration for ASIPs},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {27--34},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581635},
doi = {10.1145/581630.581635},
timestamp = {Wed, 10 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/FischerTTW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GattiABR02,
author = {Franco Gatti and
Andrea Acquaviva and
Luca Benini and
Bruno Ricc{\`{o}}},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Low Power Control Techniques For {TFT} {LCD} Displays},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {218--224},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581664},
doi = {10.1145/581630.581664},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GattiABR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GensslerCWNDWASMS02,
author = {Thomas Genssler and
Alexander Christoph and
Michael Winter and
Oscar Nierstrasz and
St{\'{e}}phane Ducasse and
Roel Wuyts and
Gabriela Ar{\'{e}}valo and
Bastiaan Sch{\"{o}}nhage and
Peter O. M{\"{u}}ller and
Christian Stich},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Components for embedded software: the {PECOS} approach},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {19--26},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581634},
doi = {10.1145/581630.581634},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/GensslerCWNDWASMS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/GoodloeMGA02,
author = {Alwyn Goodloe and
Michael McDougall and
Carl A. Gunter and
Rajeev Alur},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Predictable programs in barcodes},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {298--303},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581679},
doi = {10.1145/581630.581679},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/GoodloeMGA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HunterH02,
author = {Hillery C. Hunter and
Wen{-}mei W. Hwu},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Code coverage and input variability: effects on architecture and compiler
research},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {79--87},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581643},
doi = {10.1145/581630.581643},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HunterH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JainBK02,
author = {Manoj Kumar Jain and
M. Balakrishnan and
Anshul Kumar},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {An efficient technique for exploring register file size in {ASIP}
synthesis},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {252--261},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581671},
doi = {10.1145/581630.581671},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JainBK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JejurikarG02,
author = {Ravindra Jejurikar and
Rajesh K. Gupta},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Energy aware task scheduling with task synchronization for embedded
real time systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {164--169},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581655},
doi = {10.1145/581630.581655},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JejurikarG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JonesBPTCB02,
author = {Alex K. Jones and
Debabrata Bagchi and
Satrajit Pal and
Xiaoyong Tang and
Alok N. Choudhary and
Prithviraj Banerjee},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {{PACT} {HDL:} a {C} compiler targeting ASICs and FPGAs with power
and performance optimizations},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {188--197},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581659},
doi = {10.1145/581630.581659},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JonesBPTCB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KandemirKCZ02,
author = {Mahmut T. Kandemir and
Ismail Kadayif and
Alok N. Choudhary and
Joseph Zambreno},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Optimizing inter-nest data locality},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {127--135},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581650},
doi = {10.1145/581630.581650},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KandemirKCZ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimJPU02,
author = {Jinhwan Kim and
Sungjoon Jung and
Yunheung Paek and
Gang{-}Ryung Uh},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Experience with a retargetable compiler for a commercial network processor},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {178--187},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581658},
doi = {10.1145/581630.581658},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimJPU02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimL02,
author = {Dae{-}Hwan Kim and
Hyuk{-}Jae Lee},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Iterative procedural abstraction for code size reduction},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {277--279},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581675},
doi = {10.1145/581630.581675},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KoppanalilRDVR02,
author = {Jinson Koppanalil and
Prakash Ramrakhyani and
Sameer Desai and
Anu Vaidyanathan and
Eric Rotenberg},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {A case for dynamic pipeline scaling},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {1--8},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581632},
doi = {10.1145/581630.581632},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KoppanalilRDVR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KowshikDA02,
author = {Sumant Kowshik and
Dinakar Dhurjati and
Vikram S. Adve},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Ensuring code safety without runtime checks for real-time control
systems},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {288--297},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581678},
doi = {10.1145/581630.581678},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KowshikDA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KuoC02,
author = {Jian{-}Liang Kuo and
Tien{-}Fu Chen},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Dynamic voltage leveling scheduling for real-time embedded systems
on low-power variable speed processors},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {147--155},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581653},
doi = {10.1145/581630.581653},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KuoC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeviathanP02,
author = {Raya Leviathan and
Amir Pnueli},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Validating software pipelining optimizations},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {280--287},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581676},
doi = {10.1145/581630.581676},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeviathanP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiG02,
author = {Bengu Li and
Rajiv Gupta},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Bit section instruction set extension of {ARM} for embedded applications},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {69--78},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581642},
doi = {10.1145/581630.581642},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LiG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiuC02,
author = {Jack Liu and
Fred C. Chow},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {A near-optimal instruction scheduler for a tightly constrained, variable
instruction set embedded processor},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {9--18},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581633},
doi = {10.1145/581630.581633},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiuC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LuHHSLS02,
author = {Zhijian Lu and
Jason Hein and
Marty Humphrey and
Mircea R. Stan and
John C. Lach and
Kevin Skadron},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Control-theoretic dynamic frequency and voltage scaling for multimedia
workloads},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {156--163},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581654},
doi = {10.1145/581630.581654},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LuHHSLS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MalikMZ02,
author = {Afzal Malik and
Bill Moyer and
Roger Zhou},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Embedded cache architecture with programmable write buffer support
for power and performance flexibility},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {98--107},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581646},
doi = {10.1145/581630.581646},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MalikMZ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MelvinP02,
author = {Stephen W. Melvin and
Yale N. Patt},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Handling of packet dependencies: a critical issue for highly parallel
network processors},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {202--209},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581662},
doi = {10.1145/581630.581662},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MelvinP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MemikM02,
author = {Gokhan Memik and
William H. Mangione{-}Smith},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Increasing power efficiency of multi-core network processors through
data filtering},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {108--116},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581647},
doi = {10.1145/581630.581647},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MemikM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MenardCCS02,
author = {Daniel M{\'{e}}nard and
Daniel Chillet and
Fran{\c{c}}ois Charot and
Olivier Sentieys},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Automatic floating-point to fixed-point conversion for {DSP} code
generation},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {270--276},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581674},
doi = {10.1145/581630.581674},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/MenardCCS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NikitovicB02,
author = {Mladen Nikitovic and
Mats Brorsson},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {An adaptive chip-multiprocessor architecture for future mobile terminals},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {43--49},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581638},
doi = {10.1145/581630.581638},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NikitovicB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NilssonEN02,
author = {Anders Nilsson and
Torbj{\"{o}}rn Ekman and
Klas Nilsson},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Real Java for real time - gain and pain},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {304--311},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581680},
doi = {10.1145/581630.581680},
timestamp = {Fri, 20 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/NilssonEN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkS02,
author = {Sung I. Park and
Mani B. Srivastava},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Dynamic battery state aware approaches for improving battery utilization},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {225--231},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581666},
doi = {10.1145/581630.581666},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PisharathC02,
author = {Jayaprakash Pisharath and
Alok N. Choudhary},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {An integrated approach to reducing power dissipation in memory hierarchies},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {88--97},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581645},
doi = {10.1145/581630.581645},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PisharathC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RussellJ02,
author = {Jeffry T. Russell and
Margarida F. Jacome},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Scenario-based software characterization as a contingency to traditional
program profiling},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {170--177},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581657},
doi = {10.1145/581630.581657},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RussellJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SalamiCAV02,
author = {Esther Salam{\'{\i}} and
Jes{\'{u}}s Corbal and
Carlos {\'{A}}lvarez and
Mateo Valero},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Cost effective memory disambiguation for multimedia codes},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {117--126},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581649},
doi = {10.1145/581630.581649},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SalamiCAV02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SivaramanA02,
author = {Mukund Sivaraman and
Shail Aditya},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Cycle-time aware architecture synthesis of custom hardware accelerators},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {35--42},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581637},
doi = {10.1145/581630.581637},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SivaramanA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WardA02,
author = {Michael Ward and
Neil C. Audsley},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Hardware implementation of the Ravenscar Ada tasking profile},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {59--68},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581641},
doi = {10.1145/581630.581641},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WardA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WeisselB02,
author = {Andreas Weissel and
Frank Bellosa},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Process cruise control: event-driven clock scaling for dynamic power
management},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {238--246},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581668},
doi = {10.1145/581630.581668},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WeisselB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/XuW02,
author = {Jiang Xu and
Wayne H. Wolf},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Wave pipelining for application-specific networks-on-chips},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {198--201},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581661},
doi = {10.1145/581630.581661},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/XuW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangGL02,
author = {Hongbo Yang and
Guang R. Gao and
Clement Leung},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {On achieving balanced power consumption in software pipelined loops},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {210--217},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581663},
doi = {10.1145/581630.581663},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangGL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ZhangPSB02,
author = {Tao Zhang and
Santosh Pande and
Andr{\'{e}} L. M. dos Santos and
Franz Josef Bruecklmayr},
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Leakage-proof program partitioning},
booktitle = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
pages = {136--145},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/581630.581651},
doi = {10.1145/581630.581651},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ZhangPSB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2002,
editor = {Shuvra S. Bhattacharyya and
Trevor N. Mudge and
Wayne H. Wolf and
Ahmed Amine Jerraya},
title = {Proceedings of the International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2002, Greenoble, France,
October 8-11, 2002},
publisher = {{ACM}},
year = {2002},
isbn = {1-58113-575-0},
timestamp = {Tue, 02 Aug 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/2002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AdityaS01,
author = {Shail Aditya and
Michael S. Schlansker},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {ShiftQ: a bufferred interconnect for custom loop accelerators},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {158--167},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502243},
doi = {10.1145/502217.502243},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/AdityaS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AkgulLM01,
author = {Bilge Saglam Akgul and
Jaehwan Lee and
Vincent John Mooney III},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A system-on-a-chip lock cache with task preemption support},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {149--157},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502242},
doi = {10.1145/502217.502242},
timestamp = {Fri, 15 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AkgulLM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AvissarBS01,
author = {Oren Avissar and
Rajeev Barua and
Dave Stewart},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Heterogeneous memory management for embedded systems},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {34--43},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502223},
doi = {10.1145/502217.502223},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AvissarBS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaynesCFGKSZJ01,
author = {Kathleen Baynes and
Chris Collins and
Eric Fiterman and
Brinda Ganesh and
Paul Kohout and
Christine Smit and
Tiebing Zhang and
Bruce L. Jacob},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {The performance and energy consumption of three embedded real-time
operating systems},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {203--210},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502253},
doi = {10.1145/502217.502253},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BaynesCFGKSZJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BussACA01,
author = {Marcio Buss and
Rodolfo Azevedo and
Paulo Centoducatte and
Guido Araujo},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Tailoring pipeline bypassing and functional unit mapping to application
in clustered {VLIW} architectures},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {141--148},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502241},
doi = {10.1145/502217.502241},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BussACA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChakrapaniKMPPW01,
author = {Lakshmi N. Chakrapani and
Pinar Korkmaz and
Vincent John Mooney III and
Krishna V. Palem and
Kiran Puttaswamy and
Weng{-}Fai Wong},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {The emerging power crisis in embedded processors: what can a poor
compiler do?},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {176--180},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502246},
doi = {10.1145/502217.502246},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ChakrapaniKMPPW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FischerTWKT01,
author = {Dirk Fischer and
J{\"{u}}rgen Teich and
Ralph Weper and
Uwe Kastens and
Michael Thies},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Design space characterization for architecture/compiler co-exploration},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {108--115},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502234},
doi = {10.1145/502217.502234},
timestamp = {Wed, 10 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/FischerTWKT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/FrankeO01,
author = {Bj{\"{o}}rn Franke and
Michael F. P. O'Boyle},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {An empirical evaluation of high level transformations for embedded
processors},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {59--66},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502227},
doi = {10.1145/502217.502227},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/FrankeO01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JohnsonM01,
author = {Adam Johnson and
Kenneth Mackenzie},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Pattern matching in reconfigurable logic for packet classification},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {126--130},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502236},
doi = {10.1145/502217.502236},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JohnsonM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JungP01,
author = {Sungjoon Jung and
Yunheung Paek},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {The very portable optimizer for digital signal processors},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {84--92},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502230},
doi = {10.1145/502217.502230},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JungP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KaxirasNBH01,
author = {Stefanos Kaxiras and
Girija J. Narlikar and
Alan D. Berenbaum and
Zhigang Hu},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Comparing power consumption of an {SMT} and a {CMP} {DSP} for mobile
phone workloads},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {211--220},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502254},
doi = {10.1145/502217.502254},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KaxirasNBH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/KimVKI01,
author = {Hyun Suk Kim and
Narayanan Vijaykrishnan and
Mahmut T. Kandemir and
Mary Jane Irwin},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Energy-efficient instruction cache using page-based placement},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {229--237},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502256},
doi = {10.1145/502217.502256},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/KimVKI01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeDK01,
author = {Yann{-}Hang Lee and
Yoonmee Doh and
C. Mani Krishna},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {{EDF} scheduling using two-mode voltage-clock-scaling for hard real-time
systems},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {221--228},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502255},
doi = {10.1145/502217.502255},
timestamp = {Sat, 10 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/LeeDK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LiWX01,
author = {Zhiyuan Li and
Cheng Wang and
Rong Xu},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Computation offloading to save energy on handheld devices: a partition
scheme},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {238--246},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502257},
doi = {10.1145/502217.502257},
timestamp = {Wed, 05 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LiWX01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LuthjeCK01,
author = {Olaf L{\"{u}}thje and
Martin Coors and
Holger Keding},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A novel approach to code analysis of digital signal processing systems},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {76--83},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502229},
doi = {10.1145/502217.502229},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LuthjeCK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MackenzieHMJP01,
author = {Kenneth Mackenzie and
Eric Hudson and
Drew Maule and
Sundaresan Jayaraman and
Sungmee Park},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A prototype network embedded in textile fabric},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {188--194},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502250},
doi = {10.1145/502217.502250},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MackenzieHMJP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/NaiDF01,
author = {Harry Dwyer and
John Fernando},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Establishing a tight bound on task interference in embedded system
instruction caches},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {8--14},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502220},
doi = {10.1145/502217.502220},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/NaiDF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/PanA01,
author = {Heidi Pan and
Krste Asanovic},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Heads and tails: a variable-length instruction format supporting parallel
fetch and decode},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {168--175},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502244},
doi = {10.1145/502217.502244},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/PanA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ParkJ01,
author = {Sungmee Park and
Sundaresan Jayaraman},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Textiles and computing: background and opportunities for convergence},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {186--187},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502249},
doi = {10.1145/502217.502249},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ParkJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RosaLP01,
author = {Alberto La Rosa and
Luciano Lavagno and
Claudio Passerone},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A software development tool chain for a reconfigurable processor},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {93--98},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502232},
doi = {10.1145/502217.502232},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/RosaLP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Sangiovanni-VincentelliM01,
author = {Alberto L. Sangiovanni{-}Vincentelli and
Grant Martin},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A vision for embedded software},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {1--7},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502219},
doi = {10.1145/502217.502219},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Sangiovanni-VincentelliM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchneiderW01,
author = {Klaus Schneider and
Michael Wenz},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A new method for compiling schizophrenic synchronous programs},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {49--58},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502226},
doi = {10.1145/502217.502226},
timestamp = {Wed, 05 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SchneiderW01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SethKV01,
author = {Anil Seth and
Ravindra B. Keskar and
R. Venugopal},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Algorithms for energy optimization using processor instructions},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {195--202},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502252},
doi = {10.1145/502217.502252},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SethKV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SherwoodC01,
author = {Timothy Sherwood and
Brad Calder},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Patchable instruction {ROM} architecture},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {24--33},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502222},
doi = {10.1145/502217.502222},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SherwoodC01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SjodinP01,
author = {Jan Sj{\"{o}}din and
Carl von Platen},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Storage allocation for embedded processors},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {15--23},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502221},
doi = {10.1145/502217.502221},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SjodinP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SrinivasanCJ01,
author = {Sadagopan Srinivasan and
Vinodh Cuppu and
Bruce L. Jacob},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Transparent data-memory organizations for digital signal processors},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {44--48},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502224},
doi = {10.1145/502217.502224},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SrinivasanCJ01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/StappertEE01,
author = {Friedhelm Stappert and
Andreas Ermedahl and
Jakob Engblom},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Efficient longest executable path search for programs with complex
flows and pipeline effects},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {132--140},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502240},
doi = {10.1145/502217.502240},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/StappertEE01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/VenkataramaniNKBB01,
author = {Girish Venkataramani and
Walid A. Najjar and
Fadi J. Kurdahi and
Nader Bagherzadeh and
A. P. Wim B{\"{o}}hm},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {A compiler framework for mapping applications to a coarse-grained
reconfigurable computer architecture},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {116--125},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502235},
doi = {10.1145/502217.502235},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/VenkataramaniNKBB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangSH01,
author = {Zhong Wang and
Edwin Hsing{-}Mean Sha and
Xiaobo Hu},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Combined partitioning and data padding for scheduling multiple loop
nests},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {67--75},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502228},
doi = {10.1145/502217.502228},
timestamp = {Tue, 14 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WangSH01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WardA01,
author = {Michael Ward and
Neil C. Audsley},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Hardware compilation of sequential Ada},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {99--107},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502233},
doi = {10.1145/502217.502233},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WardA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WeaverKWA01,
author = {Christopher T. Weaver and
Rajeev Krishna and
Lisa Wu and
Todd M. Austin},
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Application specific architectures: a recipe for fast, flexible and
power efficient designs},
booktitle = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
pages = {181--185},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217.502247},
doi = {10.1145/502217.502247},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/WeaverKWA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2001,
editor = {Guang R. Gao and
Trevor N. Mudge and
Krishna V. Palem},
title = {Proceedings of the 2001 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2001, Atlanta, Georgia,
USA, November 16-17, 2001},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/502217},
doi = {10.1145/502217},
isbn = {1-58113-399-5},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AamodtC00,
author = {Tor M. Aamodt and
Paul Chow},
title = {Embedded {ISA} support for enhanced floating-point to fixed-point
{ANSI-C} compilation},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {128--137},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354899},
doi = {10.1145/354880.354899},
timestamp = {Tue, 06 Nov 2018 11:07:42 +0100},
biburl = {https://dblp.org/rec/conf/cases/AamodtC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AbrahamR00,
author = {Santosh G. Abraham and
B. Ramakrishna Rau},
title = {Efficient design space exploration in {PICO}},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {71--79},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354891},
doi = {10.1145/354880.354891},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AbrahamR00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/AroraG00,
author = {Prashant Arora and
Rajesh K. Gupta},
title = {Design and implementation of a hierarchical exception handling extension
to systemC},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {80--84},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354892},
doi = {10.1145/354880.354892},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/AroraG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BarreteauMGLSBK00,
author = {Michel Barreteau and
Juliette Mattioli and
Thierry Grandpierre and
Christophe Lavarenne and
Yves Sorel and
Philippe Bonnot and
Philippe Kajfasz},
title = {{PROMPT:} a mapping environment for telecom applications on "system-on-a-chip"},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {41--47},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354887},
doi = {10.1145/354880.354887},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/BarreteauMGLSBK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CallahanW00,
author = {Timothy J. Callahan and
John Wawrzynek},
title = {Adapting software pipelining for reconfigurable computing},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {57--64},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354889},
doi = {10.1145/354880.354889},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/CallahanW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DanckaertCM00,
author = {Koen Danckaert and
Francky Catthoor and
Hugo De Man},
title = {A preprocessing step for global loop transformations for data transfer
optimization},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {34--40},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354886},
doi = {10.1145/354880.354886},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DanckaertCM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DelaluzKVI00,
author = {Victor Delaluz and
Mahmut T. Kandemir and
Narayanan Vijaykrishnan and
Mary Jane Irwin},
title = {Energy-oriented compiler optimizations for partitioned memory architectures},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {138--147},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354900},
doi = {10.1145/354880.354900},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DelaluzKVI00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DinechinFGS00,
author = {Beno{\^{\i}}t Dupont de Dinechin and
Fran{\c{c}}ois de Ferri{\`{e}}re and
Christophe Guillon and
Artour Stoutchinin},
title = {Code generator optimizations for the {ST120} {DSP-MCU} core},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {93--102},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354894},
doi = {10.1145/354880.354894},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DinechinFGS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HaldarNCB00,
author = {Malay Haldar and
Anshuman Nayak and
Alok N. Choudhary and
Prithviraj Banerjee},
title = {Scheduling algorithms for automated synthesis of pipelined designs
on FPGAs for applications described in {MATLAB}},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {85--93},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354893},
doi = {10.1145/354880.354893},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/HaldarNCB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JankaW00,
author = {Randall S. Janka and
Linda M. Wills},
title = {Specification and synthesis of real-time embedded distributed and
parallel multiprocessor-based signal processing systems},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {65--70},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354890},
doi = {10.1145/354880.354890},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JankaW00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeT00,
author = {Hsien{-}Hsin S. Lee and
Gary S. Tyson},
title = {Region-based caching: an energy-delay efficient memory architecture
for embedded processors},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {120--127},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354898},
doi = {10.1145/354880.354898},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/MalikMC00,
author = {Afzal Malik and
Bill Moyer and
Dan Cermak},
title = {A programmable unified cache architecture for embedded applications},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {165--171},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354903},
doi = {10.1145/354880.354903},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/MalikMC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Pnueli00,
author = {Amir Pnueli},
title = {Rigorous development of embedded systems},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {1},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354881},
doi = {10.1145/354880.354881},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Pnueli00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/RajagopalanVM00,
author = {Subramanian Rajagopalan and
Manish Vachharajani and
Sharad Malik},
title = {Handling irregular {ILP} within conventional {VLIW} schedulers using
artificial resource constraints},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {157--164},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354902},
doi = {10.1145/354880.354902},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/RajagopalanVM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Rau00,
author = {B. Ramakrishna Rau},
title = {The era of embedded computing},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {119},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354897},
doi = {10.1145/354880.354897},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Rau00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SchulteBRG00,
author = {Michael J. Schulte and
Pablo I. Balzola and
Jie Ruan and
C. John Glossner},
title = {Parallel saturating multioperand adders},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {172--179},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354904},
doi = {10.1145/354880.354904},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SchulteBRG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SengLC00,
author = {Shay Ping Seng and
Wayne Luk and
Peter Y. K. Cheung},
title = {Flexible instruction processors},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {193--200},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354907},
doi = {10.1145/354880.354907},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SengLC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShalanM00,
author = {Mohamed Shalan and
Vincent John Mooney III},
title = {A dynamic memory management unit for embedded real-time system-on-a-chip},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {180--186},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354905},
doi = {10.1145/354880.354905},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShalanM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/Siebert00,
author = {Fridtjof Siebert},
title = {Eliminating external fragmentation in a non-moving garbage collector
for Java},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {9--17},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354883},
doi = {10.1145/354880.354883},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/Siebert00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SongL00,
author = {Yonghong Song and
Yuan Lin},
title = {Unroll-and-jam for imperfectly-nested loops in {DSP} applications},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {148--156},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354901},
doi = {10.1145/354880.354901},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/SongL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/StittVGL00,
author = {Greg Stitt and
Frank Vahid and
Tony Givargis and
Roman L. Lysecky},
title = {A first-step towards an architecture tuning methodology for low power},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {187--192},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354906},
doi = {10.1145/354880.354906},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/StittVGL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TakkoHKHS00,
author = {Antti Takko and
Marko H{\"{a}}nnik{\"{a}}inen and
Jarno Knuutila and
Timo H{\"{a}}m{\"{a}}l{\"{a}}inen and
Jukka Saarinen},
title = {Embedding {SDL} implemented protocols into {DSP}},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {48--56},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354888},
doi = {10.1145/354880.354888},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TakkoHKHS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TeichWFT00,
author = {J{\"{u}}rgen Teich and
Ralph Weper and
Dirk Fischer and
Stefan Trinkert},
title = {A joined architecture/compiler design environment for ASIPs},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {26--33},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354885},
doi = {10.1145/354880.354885},
timestamp = {Wed, 10 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/TeichWFT00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/TsayHL00,
author = {Jeff Tsay and
Christopher Hylands and
Edward A. Lee},
title = {A code generation framework for Java component-based designs},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {18--25},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354884},
doi = {10.1145/354880.354884},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/TsayHL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WangS00,
author = {Shige Wang and
Kang G. Shin},
title = {An architecture for embedded software integration using reusable components},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {110--118},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354896},
doi = {10.1145/354880.354896},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WangS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/WeilBCPVP00,
author = {Daniel Weil and
Val{\'{e}}rie Bertin and
Etienne Closse and
Michel Poize and
Patrick Venier and
Jacques Pulou},
title = {Efficient compilation of {ESTEREL} for real-time embedded systems},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {2--8},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354882},
doi = {10.1145/354880.354882},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/WeilBCPVP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/YangDCV00,
author = {Peng Yang and
Dirk Desmet and
Francky Catthoor and
Diederik Verkest},
title = {Dynamic scheduling of concurrent tasks with cost performance trade-off},
booktitle = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
pages = {103--109},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880.354895},
doi = {10.1145/354880.354895},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/YangDCV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cases/2000,
title = {Proceedings of the 2000 International Conference on Compilers, Architectures
and Synthesis for Embedded Systems, {CASES} 2000, San Jose, California,
USA, November 7-18, 2000},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/354880},
doi = {10.1145/354880},
isbn = {1-58113-338-3},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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