:facetid:toc:\"db/conf/itc/itc2004.bht\"OK:facetid:toc:db/conf/itc/itc2004.bhtErkan AcarSule OzevDelayed-RF Based Test Development for FM Transceivers Using Signature Analysis.ITC783-7922004Conference and Workshop Papersclosedconf/itc/AcarO0410.1109/TEST.2004.1387341https://doi.org/10.1109/TEST.2004.1387341https://dblp.org/rec/conf/itc/AcarO04URL#6067291Robert C. AitkenA Modular Wrapper Enabling High Speed BIST and Repair for Small Wide Memories.ITC997-10052004Conference and Workshop Papersclosedconf/itc/Aitken0410.1109/TEST.2004.1387365https://doi.org/10.1109/TEST.2004.1387365https://dblp.org/rec/conf/itc/Aitken04URL#6067292Greg Aldrich100 DPPM in Nanometer Technology - Is it achievable?ITC14172004Conference and Workshop Papersclosedconf/itc/Aldrich0410.1109/TEST.2004.1387425https://doi.org/10.1109/TEST.2004.1387425https://dblp.org/rec/conf/itc/Aldrich04URL#6067293M. Enamul AmyeenSrikanth VenkataramanAjay OjhaSangbong LeeEvaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor.ITC669-6782004Conference and Workshop Papersclosedconf/itc/AmyeenVOL0410.1109/TEST.2004.1387328https://doi.org/10.1109/TEST.2004.1387328https://dblp.org/rec/conf/itc/AmyeenVOL04URL#6067294Thomas J. AndersonPractical Instrumentation Integration Considerations.ITC1078-10802004Conference and Workshop Papersclosedconf/itc/Anderson0410.1109/TEST.2004.1387381https://doi.org/10.1109/TEST.2004.1387381https://dblp.org/rec/conf/itc/Anderson04URL#6067295Baris ArslanAlex OrailogluTest Cost Reduction Through A Reconfigurable Scan Architecture.ITC945-9522004Conference and Workshop Papersclosedconf/itc/ArslanO0410.1109/TEST.2004.1387359https://doi.org/10.1109/TEST.2004.1387359https://dblp.org/rec/conf/itc/ArslanO04URL#6067296Kendrick BakerMehrdad NouraniInterconnect Test Pattern Generation Algorithm For Meeting Device and Global SSO Limits With Safe Initial Vectors.ITC163-1722004Conference and Workshop Papersclosedconf/itc/BakerN0410.1109/TEST.2004.1386949https://doi.org/10.1109/TEST.2004.1386949https://dblp.org/rec/conf/itc/BakerN04URL#6067297Kedarnath J. BalakrishnanNur A. ToubaImproving Encoding Efficiency for Linear Decompressors Using Scan Inversion.ITC936-9442004Conference and Workshop Papersclosedconf/itc/BalakrishnanT0410.1109/TEST.2004.1387358https://doi.org/10.1109/TEST.2004.1387358https://dblp.org/rec/conf/itc/BalakrishnanT04URL#6067298Tiago R. BalenAntonio Andrade Jr.Florence AzaïsMichel RenovellMarcelo LubaszewskiTesting the Configurable Analog Blocks of Field Programmable Analog Arrays.ITC893-9022004Conference and Workshop Papersclosedconf/itc/BalenAARL0410.1109/TEST.2004.1387353https://doi.org/10.1109/TEST.2004.1387353https://dblp.org/rec/conf/itc/BalenAARL04URL#6067299Thomas BartensteinPanel 9 - Diagnostics vs. Failure Analysis.ITC14392004Conference and Workshop Papersclosedconf/itc/Bartenstein0410.1109/TEST.2004.1387447https://doi.org/10.1109/TEST.2004.1387447https://dblp.org/rec/conf/itc/Bartenstein04URL#6067300Brady BenwareAchieving Sub 100 DPPM Defect Levels on VDSM and Nanometer ASICs.ITC14182004Conference and Workshop Papersclosedconf/itc/Benware0410.1109/TEST.2004.1387426https://doi.org/10.1109/TEST.2004.1387426https://dblp.org/rec/conf/itc/Benware04URL#6067301Brady BenwareCam LuJohn Van SlykePrabhu KrishnamurthyRobert MadgeMartin KeimMark KassabJanusz RajskiAffordable and Effective Screening of Delay Defects in ASICs using the Inline Resistance Fault Model.ITC1285-12942004Conference and Workshop Papersclosedconf/itc/BenwareLSKMKKR0410.1109/TEST.2004.1387403https://doi.org/10.1109/TEST.2004.1387403https://dblp.org/rec/conf/itc/BenwareLSKMKKR04URL#6067302Soumendu BhattacharyaAbhijit ChatterjeeUse of Embedded Sensors for Built-In-Test of RF Circuits.ITC801-8092004Conference and Workshop Papersclosedconf/itc/BhattacharyaC0410.1109/TEST.2004.1387343https://doi.org/10.1109/TEST.2004.1387343https://dblp.org/rec/conf/itc/BhattacharyaC04URL#6067303Sebastià A. BotaM. RosalesJosé Luis RossellóJaume Segura 0001Ali KeshavarziWithin Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism.ITC1276-12842004Conference and Workshop Papersclosedconf/itc/BotaRRSK0410.1109/TEST.2004.1387402https://doi.org/10.1109/TEST.2004.1387402https://dblp.org/rec/conf/itc/BotaRRSK04URL#6067304Kenneth A. BrandErik H. VolkerinkEdward J. McCluskeySubhasish MitraSpeed Clustering of Integrated Circuits.ITC1128-11372004Conference and Workshop Papersclosedconf/itc/BrandVMM0410.1109/TEST.2004.1387387https://doi.org/10.1109/TEST.2004.1387387https://dblp.org/rec/conf/itc/BrandVMM04URL#6067305Jason G. BrownR. D. (Shawn) BlantonCAEN-BIST: Testing the NanoFabric.ITC462-4712004Conference and Workshop Papersclosedconf/itc/BrownB0410.1109/TEST.2004.1386982https://doi.org/10.1109/TEST.2004.1386982https://dblp.org/rec/conf/itc/BrownB04URL#6067306Dana BrownJohn FerrarioRandy WolfJing LiJayendra BhagatRF Testing on a Mixed Signal Tester.ITC793-8002004Conference and Workshop Papersclosedconf/itc/BrownFWLB0410.1109/TEST.2004.1387342https://doi.org/10.1109/TEST.2004.1387342https://dblp.org/rec/conf/itc/BrownFWLB04URL#6067307Kenneth M. ButlerSure You Can Get to 100 DPPM in Deep Submicron, But It'll Cost Ya.ITC14192004Conference and Workshop Papersclosedconf/itc/Butler0410.1109/TEST.2004.1387427https://doi.org/10.1109/TEST.2004.1387427https://dblp.org/rec/conf/itc/Butler04URL#6067308Kenneth M. ButlerJayashree SaxenaTony FryarsGraham HetheringtonMinimizing Power Consumption in Scan Testing: Pattern Generation and DFT Techniques.ITC355-3642004Conference and Workshop Papersclosedconf/itc/ButlerSFH0410.1109/TEST.2004.1386971https://doi.org/10.1109/TEST.2004.1386971https://dblp.org/rec/conf/itc/ButlerSFH04URL#6067309A. CabbiboJ. ConderM. JacobsFeed Forward Test Methodology Utilizing Device Identification.ITC655-6602004Conference and Workshop Papersclosedconf/itc/CabbiboCJ0410.1109/TEST.2004.1387326https://doi.org/10.1109/TEST.2004.1387326https://dblp.org/rec/conf/itc/CabbiboCJ04URL#6067310Sreejit ChakravartyEric W. SavageEric N. TranDefect Coverage Analysis of Partitioned Testing.ITC907-9152004Conference and Workshop Papersclosedconf/itc/ChakravartyST0410.1109/TEST.2004.1387355https://doi.org/10.1109/TEST.2004.1387355https://dblp.org/rec/conf/itc/ChakravartyST04URL#6067311Kameshwar ChandrasekarMichael S. HsiaoDecision Selection and Learning for an All-Solutions ATPG Engine.ITC607-6162004Conference and Workshop Papersclosedconf/itc/ChandrasekarH0410.1109/TEST.2004.1386998https://doi.org/10.1109/TEST.2004.1386998https://dblp.org/rec/conf/itc/ChandrasekarH04URL#6067312Bhaskar ChatterjeeManoj SachdevAli KeshavarziA DFT Technique for Delay Fault Testability and Diagnostics in 32-Bit High Performance CMOS ALUs.ITC1108-11172004Conference and Workshop Papersclosedconf/itc/ChatterjeeSK0410.1109/TEST.2004.1387385https://doi.org/10.1109/TEST.2004.1387385https://dblp.org/rec/conf/itc/ChatterjeeSK04URL#6067313Kuo-Liang ChengJing-Reng HuangChih-Wea WangChih-Yen LoLi-Ming DenqChih-Tsun HuangShin-Wei HungJye-Yuan LeeAn SOC Test Integration Platform and Its Industrial Realization.ITC1213-12222004Conference and Workshop Papersclosedconf/itc/ChengHWLDHHL0410.1109/TEST.2004.1387394https://doi.org/10.1109/TEST.2004.1387394https://dblp.org/rec/conf/itc/ChengHWLDHHL04URL#6067314Chen-Huan ChiangPaul J. WheatleyKenneth Y. HoKen L. CheungTesting and Remote Field Update of Distributed Base Stations in a Wireless Network.ITC711-7182004Conference and Workshop Papersclosedconf/itc/ChiangWHC0410.1109/TEST.2004.1387333https://doi.org/10.1109/TEST.2004.1387333https://dblp.org/rec/conf/itc/ChiangWHC04URL#6067315Man Wah ChiangZeljko ZilicJean-Samuel ChenardKatarzyna RadeckaArchitectures of Increased Availability Wireless Sensor Network Nodes.ITC1232-12412004Conference and Workshop Papersclosedconf/itc/ChiangZCR0410.1109/TEST.2004.1387396https://doi.org/10.1109/TEST.2004.1387396https://dblp.org/rec/conf/itc/ChiangZCR04URL#6067316Vivek ChickermaneBrian FoutzBrion L. KellerChannel Masking Synthesis for Efficient On-Chip Test Compression.ITC452-4612004Conference and Workshop Papersclosedconf/itc/ChickermaneFK0410.1109/TEST.2004.1386981https://doi.org/10.1109/TEST.2004.1386981https://dblp.org/rec/conf/itc/ChickermaneFK04URL#6067317C. J. ClarkMike RicchettiA Code-less BIST Processor for Embedded Test and in-system configuration of Boards and Systems.ITC857-8662004Conference and Workshop Papersclosedconf/itc/ClarkR0410.1109/TEST.2004.1387349https://doi.org/10.1109/TEST.2004.1387349https://dblp.org/rec/conf/itc/ClarkR04URL#6067318Edward I. Cole Jr.Global Failure Localization: We Have To, But on What and How?ITC14402004Conference and Workshop Papersclosedconf/itc/Cole0410.1109/TEST.2004.1387448https://doi.org/10.1109/TEST.2004.1387448https://dblp.org/rec/conf/itc/Cole04URL#6067319Fulvio CornoMatteo Sonza ReordaSimonluca TosatoF. EspositoEvaluating the Effects of Transient Faults on Vehicle Dynamic Performance in Automotive Systems.ITC1332-13392004Conference and Workshop Papersclosedconf/itc/CornoRTE0410.1109/TEST.2004.1387408https://doi.org/10.1109/TEST.2004.1387408https://dblp.org/rec/conf/itc/CornoRTE04URL#6067320Alfred L. CrouchFuture Trends in Test: The Adoption and Use of Low Cost Structural Testers.ITC698-7032004Conference and Workshop Papersclosedconf/itc/Crouch0410.1109/TEST.2004.1387331https://doi.org/10.1109/TEST.2004.1387331https://dblp.org/rec/conf/itc/Crouch04URL#6067321W. Robert DaaschManu RehaniDude! Where's my data? - Cracking Open the Hermetically Sealed Tester.ITC14282004Conference and Workshop Papersclosedconf/itc/DaaschR0410.1109/TEST.2004.1387436https://doi.org/10.1109/TEST.2004.1387436https://dblp.org/rec/conf/itc/DaaschR04URL#6067322Foster F. DaiCharles E. StroudDayu YangShuying QiAutomatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer.ITC271-2802004Conference and Workshop Papersclosedconf/itc/DaiSYQ0410.1109/TEST.2004.1386961https://doi.org/10.1109/TEST.2004.1386961https://dblp.org/rec/conf/itc/DaiSYQ04URL#6067323Ramyanshu DattaRavi GuptaAntony SebastineJacob A. AbrahamManuel A. d'AbreuTri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing.ITC1118-11272004Conference and Workshop Papersclosedconf/itc/DattaGSAd0410.1109/TEST.2004.1387386https://doi.org/10.1109/TEST.2004.1387386https://dblp.org/rec/conf/itc/DattaGSAd04URL#6067324Baolin DengWolfram GlauertFormal Description of Test Specification and ATE Architecture for Mixed-Signal Test.ITC1081-10902004Conference and Workshop Papersclosedconf/itc/DengG0410.1109/TEST.2004.1387382https://doi.org/10.1109/TEST.2004.1387382https://dblp.org/rec/conf/itc/DengG04URL#6067325David DowdingErnie WahlDon OrganExtending STIL 1450 Standard for Test Program Flow.ITC423-4312004Conference and Workshop Papersclosedconf/itc/DowdingWO0410.1109/TEST.2004.1386978https://doi.org/10.1109/TEST.2004.1386978https://dblp.org/rec/conf/itc/DowdingWO04URL#6067326Bill EklowWhat Do You Mean My Board Test Stinks?ITC14232004Conference and Workshop Papersclosedconf/itc/Eklow0410.1109/TEST.2004.1387431https://doi.org/10.1109/TEST.2004.1387431https://dblp.org/rec/conf/itc/Eklow04URL#6067327Bill EklowAnoosh HosseiniChi KhuongShyam PullelaToai VoHien ChauSimulation Based System Level Fault Insertion Using Co-verification Tools.ITC704-7102004Conference and Workshop Papersclosedconf/itc/EklowHKPVC0410.1109/TEST.2004.1387332https://doi.org/10.1109/TEST.2004.1387332https://dblp.org/rec/conf/itc/EklowHKPVC04URL#6067328Hérvé FleuryElectronic circuit comprising a secret sub-module.ITC14122004Conference and Workshop Papersclosedconf/itc/Fleury0410.1109/TEST.2004.1387420https://doi.org/10.1109/TEST.2004.1387420https://dblp.org/rec/conf/itc/Fleury04URL#6067329Anne E. GattikerDiagnosis Meets Physical Failure Analysis: How Long can we Succeed?ITC14412004Conference and Workshop Papersclosedconf/itc/Gattiker0410.1109/TEST.2004.1387449https://doi.org/10.1109/TEST.2004.1387449https://dblp.org/rec/conf/itc/Gattiker04URL#6067330Maurizio GavardoniMichael JonesRussell PoffenbergerMiguel Conde 0002System Monitor for Diagnostic, Calibration and System Configuration.ITC1263-12682004Conference and Workshop Papersclosedconf/itc/GavardoniJPC0410.1109/TEST.2004.1387400https://doi.org/10.1109/TEST.2004.1387400https://dblp.org/rec/conf/itc/GavardoniJPC04URL#6067331Valentin GhermanHans-Joachim WunderlichHarald P. E. VrankenFriedrich HapkeMichael WittkeMichael GarbersEfficient Pattern Mapping for Deterministic Logic BIST.ITC48-562004Conference and Workshop Papersclosedconf/itc/GhermanWVHWG0410.1109/TEST.2004.1386936https://doi.org/10.1109/TEST.2004.1386936https://dblp.org/rec/conf/itc/GhermanWVHWG04URL#6067332Shalini GhoshNur A. ToubaSugato BasuReducing Power Consumption in Memory ECC Checkers.ITC1322-13312004Conference and Workshop Papersclosedconf/itc/GhoshTB0410.1109/TEST.2004.1387407https://doi.org/10.1109/TEST.2004.1387407https://dblp.org/rec/conf/itc/GhoshTB04URL#6067333Pamela S. GillisFrancis WoytowichAndrew FerkoKevin McCauleyLow Overhead Delay Testing of ASICS.ITC534-5422004Conference and Workshop Papersclosedconf/itc/GillisWFM0410.1109/TEST.2004.1386990https://doi.org/10.1109/TEST.2004.1386990https://dblp.org/rec/conf/itc/GillisWFM04URL#6067334Ad J. van de GoorSaid HamdiouiRob WadsworthDetecting Faults in the Peripheral Circuits and an Evaluation of SRAM Tests.ITC114-1232004Conference and Workshop Papersclosedconf/itc/GoorHW0410.1109/TEST.2004.1386943https://doi.org/10.1109/TEST.2004.1386943https://dblp.org/rec/conf/itc/GoorHW04URL#6067335Xinli GuCyndee WangAbby LeeBill EklowKun-Han TsaiJan Arild TofteMark KassabJanusz RajskiRealizing High Test Quality Goals with Smart Test Resource Usage.ITC525-5332004Conference and Workshop Papersclosedconf/itc/GuWLETTKR0410.1109/TEST.2004.1386989https://doi.org/10.1109/TEST.2004.1386989https://dblp.org/rec/conf/itc/GuWLETTKR04URL#6067336Puneet GuptaMichael S. HsiaoALAPTF: A new Transition Faultmodel and the ATPG Algorithm.ITC1053-10602004Conference and Workshop Papersclosedconf/itc/GuptaH0410.1109/TEST.2004.1387378https://doi.org/10.1109/TEST.2004.1387378https://dblp.org/rec/conf/itc/GuptaH04URL#6067337José Pineda de GyvezGuido GronthoudCristiano CenciMartin PoschThomas BurgerManfred KollerPower Supply Ramping for Quasi-static Testing of PLLs.ITC980-9872004Conference and Workshop Papersclosedconf/itc/GyvezGCPBK0410.1109/TEST.2004.1387363https://doi.org/10.1109/TEST.2004.1387363https://dblp.org/rec/conf/itc/GyvezGCPBK04URL#6067338Mohamed HafedGlamorous Analog Testability - We Already Test them and Ship Them - So What is the Problem?ITC14162004Conference and Workshop Papersclosedconf/itc/Hafed0410.1109/TEST.2004.1387424https://doi.org/10.1109/TEST.2004.1387424https://dblp.org/rec/conf/itc/Hafed04URL#6067339Mohamed M. HafedAntonio H. ChanGeoffrey D. DuerdenBardia PishdadClarence TamSébastien LabergeGordon W. RobertsA High-Throughput 5 GBps Timing and Jitter Test Module Featuring Localized Processing.ITC728-7372004Conference and Workshop Papersclosedconf/itc/HafedCDPTLR0410.1109/TEST.2004.1387335https://doi.org/10.1109/TEST.2004.1387335https://dblp.org/rec/conf/itc/HafedCDPTLR04URL#6067340Juha HäkkinenPekka SyriJuha-Veikko VoutilainenMarkku MoilanenA Frequency Mixing and Sub-Sampling Based RF-Measurement Apparatus for IEEE 1149.4.ITC551-5592004Conference and Workshop Papersclosedconf/itc/HakkinenSVM0410.1109/TEST.2004.1386992https://doi.org/10.1109/TEST.2004.1386992https://dblp.org/rec/conf/itc/HakkinenSVM04URL#6067341Gert HanselKorbinian StieglbauerImplementation of an Economic Jitter Compliance Test for a Multi-Gigabit Device on ATE.ITC1303-13122004Conference and Workshop Papersclosedconf/itc/HanselS0410.1109/TEST.2004.1387405https://doi.org/10.1109/TEST.2004.1387405https://dblp.org/rec/conf/itc/HanselS04URL#6067342Hans T. HeinekenJitendra KhareTest Strategies For a 40Gbps Framer SoC.ITC758-7632004Conference and Workshop Papersclosedconf/itc/HeinekenK0410.1109/TEST.2004.1387338https://doi.org/10.1109/TEST.2004.1387338https://dblp.org/rec/conf/itc/HeinekenK04URL#6067343Dongwoo HongChee-Kian OngKwang-Ting (Tim) ChengBER Estimation for Serial Links Based on Jitter Spectrum and Clock Recovery Characteristics.ITC1138-11472004Conference and Workshop Papersclosedconf/itc/HongOC0410.1109/TEST.2004.1387388https://doi.org/10.1109/TEST.2004.1387388https://dblp.org/rec/conf/itc/HongOC04URL#6067344Jonathan HopsBrian SwingBrian PhelpsBruce SudweeksJohn PaneJames KinslowNon-Deterministic DUT Behavior During Functional Testing of High Speed Serial Busses: Challenges and Solutions.ITC190-1962004Conference and Workshop Papersclosedconf/itc/HopsSPSPK0410.1109/TEST.2004.1386952https://doi.org/10.1109/TEST.2004.1386952https://dblp.org/rec/conf/itc/HopsSPSPK04URL#6067345Jing Huang 0001Mehdi Baradaran TahooriFabrizio LombardiRoutability and Fault Tolerance of FPGA Interconnect Architectures.ITC479-4882004Conference and Workshop Papersclosedconf/itc/HuangTL0410.1109/TEST.2004.1386984https://doi.org/10.1109/TEST.2004.1386984https://dblp.org/rec/conf/itc/HuangTL04URL#6067346Leendert M. HuismanMaroun KassabLeah PastelData Mining Integrated Circuit Fails with Fail Commonalities.ITC661-6682004Conference and Workshop Papersclosedconf/itc/HuismanKP0410.1109/TEST.2004.1387327https://doi.org/10.1109/TEST.2004.1387327https://dblp.org/rec/conf/itc/HuismanKP04URL#6067347Shahdad IrajpourSandeep K. Gupta 0001Melvin A. BreuerTiming-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models.ITC1024-10332004Conference and Workshop Papersclosedconf/itc/IrajpourGB0410.1109/TEST.2004.1387368https://doi.org/10.1109/TEST.2004.1387368https://dblp.org/rec/conf/itc/IrajpourGB04URL#6067348Hanjun JiangBeatriz OlletaDegang Chen 0001Randall L. GeigerTesting High Resolution ADCs with Low Resolution/Accuracy Deterministic Dynamic Element Matched DACs.ITC1379-13882004Conference and Workshop Papersclosedconf/itc/JiangOCG0410.1109/TEST.2004.1387413https://doi.org/10.1109/TEST.2004.1387413https://dblp.org/rec/conf/itc/JiangOCG04URL#6067349John C. JohnsonOptions for High-Volume Test of Multi-GB/s Ports.ITC14352004Conference and Workshop Papersclosedconf/itc/Johnson0410.1109/TEST.2004.1387443https://doi.org/10.1109/TEST.2004.1387443https://dblp.org/rec/conf/itc/Johnson04URL#6067350Rob JuknaTo Test or To Inspect, What is the Coverage?ITC14252004Conference and Workshop Papersclosedconf/itc/Jukna0410.1109/TEST.2004.1387433https://doi.org/10.1109/TEST.2004.1387433https://dblp.org/rec/conf/itc/Jukna04URL#6067351Hong Shin JunSung Soo ChungSang H. BaegRemoving JTAG Bottlenecks in System Interconnect Test.ITC173-1802004Conference and Workshop Papersclosedconf/itc/JunCB0410.1109/TEST.2004.1386950https://doi.org/10.1109/TEST.2004.1386950https://dblp.org/rec/conf/itc/JunCB04URL#6067352Sunil KalidindiNghia HuynhBill EklowJosh Goldstein"Real Life" System Testing of Networking Equipment.ITC1072-10772004Conference and Workshop Papersclosedconf/itc/KalidindiHEG0410.1109/TEST.2004.1387380https://doi.org/10.1109/TEST.2004.1387380https://dblp.org/rec/conf/itc/KalidindiHEG04URL#6067353Rohit KapurSecurity vs. Test Quality: Are they mutually exclusive?ITC14142004Conference and Workshop Papersclosedconf/itc/Kapur0410.1109/TEST.2004.1387422https://doi.org/10.1109/TEST.2004.1387422https://dblp.org/rec/conf/itc/Kapur04URL#6067354David C. KeezerDany MinierF. BinetteModular Extension of ATE to 5 Gbps.ITC748-7572004Conference and Workshop Papersclosedconf/itc/KeezerMB0410.1109/TEST.2004.1387337https://doi.org/10.1109/TEST.2004.1387337https://dblp.org/rec/conf/itc/KeezerMB04URL#6067355Brion L. KellerMick TegethoffThomas BartensteinVivek ChickermaneAn Economic Analysis and ROI Model for Nanometer Test.ITC518-5242004Conference and Workshop Papersclosedconf/itc/KellerTBC0410.1109/TEST.2004.1386988https://doi.org/10.1109/TEST.2004.1386988https://dblp.org/rec/conf/itc/KellerTBC04URL#6067356Omar I. KhanMichael L. BushnellSpectral Analysis for Statistical Response Compaction During Built-In Self-Testing.ITC67-762004Conference and Workshop Papersclosedconf/itc/KhanB0410.1109/TEST.2004.1386938https://doi.org/10.1109/TEST.2004.1386938https://dblp.org/rec/conf/itc/KhanB04URL#6067357Jitendra KhareMemory Yield Improvement - SoC Design Perspective.ITC14452004Conference and Workshop Papersclosedconf/itc/Khare0410.1109/TEST.2004.1387453https://doi.org/10.1109/TEST.2004.1387453https://dblp.org/rec/conf/itc/Khare04URL#6067358Heon C. KimHong Shin JunXinli GuSung Soo ChungAt-Speed Interconnect Test and Diagnosis of External Memories on a System.ITC156-1622004Conference and Workshop Papersclosedconf/itc/KimJGC0410.1109/TEST.2004.1386948https://doi.org/10.1109/TEST.2004.1386948https://dblp.org/rec/conf/itc/KimJGC04URL#6067359Matthew L. KingKewal K. SalujaTesting Micropipelined Asynchronous Circuits.ITC329-3382004Conference and Workshop Papersclosedconf/itc/KingS0410.1109/TEST.2004.1386968https://doi.org/10.1109/TEST.2004.1386968https://dblp.org/rec/conf/itc/KingS04URL#6067360Bernd KoenemannTest In the Era of "What You see Is NOT What You Get".ITC122004Conference and Workshop Papersclosedconf/itc/Koenemann0410.1109/TEST.2004.1386929https://doi.org/10.1109/TEST.2004.1386929https://dblp.org/rec/conf/itc/Koenemann04URL#6067361Bram KrusemanAnanta K. MajhiGuido GronthoudStefan EichenbergerOn Hazard-free Patterns for Fine-delay Fault Testing.ITC213-2222004Conference and Workshop Papersclosedconf/itc/KrusemanMGE0410.1109/TEST.2004.1386955https://doi.org/10.1109/TEST.2004.1386955https://dblp.org/rec/conf/itc/KrusemanMGE04URL#6067362Bram KrusemanAnanta K. MajhiCamelia HoraStefan EichenbergerJohan MeirlevedeSystematic Defects in Deep Sub-Micron Technologies.ITC290-2992004Conference and Workshop Papersclosedconf/itc/KrusemanMHEM0410.1109/TEST.2004.1386963https://doi.org/10.1109/TEST.2004.1386963https://dblp.org/rec/conf/itc/KrusemanMHEM04URL#6067363Masaji KumeKatsutoshi UeharaMinoru ItakuraHideo SawamotoToru KobayashiMasatoshi HasegawaHideki HayashiProgrammable At-Speed Array and Functional BIST for Embedded DRAM LSI.ITC988-9962004Conference and Workshop Papersclosedconf/itc/KumeUISKHH0410.1109/TEST.2004.1387364https://doi.org/10.1109/TEST.2004.1387364https://dblp.org/rec/conf/itc/KumeUISKHH04URL#6067364Sandip KunduT. M. MakRajesh GalivancheTrends in manufacturing test methods and their implications.ITC679-6872004Conference and Workshop Papersclosedconf/itc/KunduMG0410.1109/TEST.2004.1387329https://doi.org/10.1109/TEST.2004.1387329https://dblp.org/rec/conf/itc/KunduMG04URL#6067365Andy KuoTouraj FarahmandNelson OuAndré IvanovSassan TabatabaeiJitter Models and Measurement Methods for High-Speed Serial Interconnects.ITC1295-13022004Conference and Workshop Papersclosedconf/itc/KuoFOIT0410.1109/TEST.2004.1387404https://doi.org/10.1109/TEST.2004.1387404https://dblp.org/rec/conf/itc/KuoFOIT04URL#6067366Liyang LaiJanak H. PatelThomas RinderknechtWu-Tung ChengLogic BIST with Scan Chain Segmentation.ITC57-662004Conference and Workshop Papersclosedconf/itc/LaiPRC0410.1109/TEST.2004.1386937https://doi.org/10.1109/TEST.2004.1386937https://dblp.org/rec/conf/itc/LaiPRC04URL#6067367Bernd LaquaiA Model-based Test Approach for Testing High-Speed PLLs and Phase Regulation Circuitry in SOC Devices.ITC764-7722004Conference and Workshop Papersclosedconf/itc/Laquai0410.1109/TEST.2004.1387339https://doi.org/10.1109/TEST.2004.1387339https://dblp.org/rec/conf/itc/Laquai04URL#6067368Erik LarssonIntegrating Core Selection in the SOC Test Solution Design-Flow.ITC1349-13582004Conference and Workshop Papersclosedconf/itc/Larsson0410.1109/TEST.2004.1387410https://doi.org/10.1109/TEST.2004.1387410https://dblp.org/rec/conf/itc/Larsson04URL#6067369Geeng-Wei LeeJuinn-Dar HuangJing-Yang JouChun-Yao WangVerification on Port Connections.ITC830-8362004Conference and Workshop Papersclosedconf/itc/LeeHJW0410.1109/TEST.2004.1387346https://doi.org/10.1109/TEST.2004.1387346https://dblp.org/rec/conf/itc/LeeHJW04URL#6067370Peter M. LevineGordon W. RobertsA High-Resolution Flash Time-to-Digital Converter and Calibration Scheme.ITC1148-11572004Conference and Workshop Papersclosedconf/itc/LevineR0410.1109/TEST.2004.1387389https://doi.org/10.1109/TEST.2004.1387389https://dblp.org/rec/conf/itc/LevineR04URL#6067371Mike LiIs "Design to Production" The Ultimate Answer For Jitter, Noise, and BER Challenges For Multi GB/s ICs?ITC14332004Conference and Workshop Papersclosedconf/itc/Li0410.1109/TEST.2004.1387441https://doi.org/10.1109/TEST.2004.1387441https://dblp.org/rec/conf/itc/Li04URL#6067372Mike LiWill "Heisenberg Uncertainty Principle" Hold For Designing and Testing Multiple GB/s ICs?ITC14362004Conference and Workshop Papersclosedconf/itc/Li04a10.1109/TEST.2004.1387444https://doi.org/10.1109/TEST.2004.1387444https://dblp.org/rec/conf/itc/Li04aURL#6067373Mike LiAndy MartwickGerry TalbotJan B. WilstrupTransfer Functions For The Reference Clock Jitter In A Serial Link: Theory And Applications.ITC1158-11672004Conference and Workshop Papersclosedconf/itc/LiMTW0410.1109/TEST.2004.1387390https://doi.org/10.1109/TEST.2004.1387390https://dblp.org/rec/conf/itc/LiMTW04URL#6067374Chunsheng LiuHamid SharifÉrika F. CotaDhiraj K. PradhanTest Scheduling for Network-on-Chip with BIST and Precedence Constraints.ITC1369-13782004Conference and Workshop Papersclosedconf/itc/LiuSCP0410.1109/TEST.2004.1387412https://doi.org/10.1109/TEST.2004.1387412https://dblp.org/rec/conf/itc/LiuSCP04URL#6067375Robert MadgeNew Test Paradigms for Yield and Manufacturability.ITC132004Conference and Workshop Papersclosedconf/itc/Madge0410.1109/TEST.2004.1386930https://doi.org/10.1109/TEST.2004.1386930https://dblp.org/rec/conf/itc/Madge04URL#6067376Robert MadgeATE Value Add through Open Data Collection.ITC14302004Conference and Workshop Papersclosedconf/itc/Madge04a10.1109/TEST.2004.1387438https://doi.org/10.1109/TEST.2004.1387438https://dblp.org/rec/conf/itc/Madge04aURL#6067377Robert MadgeBrady BenwareRitesh P. TurakhiaW. Robert DaaschChris SchuermyerJens RufflerIn Search of the Optimum Test Set - Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost.ITC203-2122004Conference and Workshop Papersclosedconf/itc/MadgeBTDSR0410.1109/TEST.2004.1386954https://doi.org/10.1109/TEST.2004.1386954https://dblp.org/rec/conf/itc/MadgeBTDSR04URL#6067378William R. MannFrederick L. TaberPhilip W. SeitzerJerry J. BrozThe Leading Edge of Production Wafer Probe Test Technology.ITC1168-11952004Conference and Workshop Papersclosedconf/itc/MannTSB0410.1109/TEST.2004.1387391https://doi.org/10.1109/TEST.2004.1387391https://dblp.org/rec/conf/itc/MannTSB04URL#6067379Erik Jan MarinissenSecurity vs. Test Quality: Can We Really Only Have One at a Time?ITC14112004Conference and Workshop Papersclosedconf/itc/Marinissen0410.1109/TEST.2004.1387419https://doi.org/10.1109/TEST.2004.1387419https://dblp.org/rec/conf/itc/Marinissen04URL#6067380Dave MarkJenny FanLocalizing Open Interconnect Defects using Targeted Routing in FPGA's.ITC627-6342004Conference and Workshop Papersclosedconf/itc/MarkF0410.1109/TEST.2004.1387000https://doi.org/10.1109/TEST.2004.1387000https://dblp.org/rec/conf/itc/MarkF04URL#6067381Heinz MattesClaus DworskiSebastian SattlerControlled Sine Wave Fitting for ADC Test.ITC963-9712004Conference and Workshop Papersclosedconf/itc/MattesDS0410.1109/TEST.2004.1387361https://doi.org/10.1109/TEST.2004.1387361https://dblp.org/rec/conf/itc/MattesDS04URL#6067382Benjamin M. MauckVishnumohan RavichandranUsman Azeez MughalA Design for Test Technique for Parametric Analysis of SRAM: On-Die Low Yield Analysis.ITC105-1132004Conference and Workshop Papersclosedconf/itc/MauckRM0410.1109/TEST.2004.1386942https://doi.org/10.1109/TEST.2004.1386942https://dblp.org/rec/conf/itc/MauckRM04URL#6067383Cecilia MetraT. M. MakMartin Omaña 0001Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing.ITC1223-12312004Conference and Workshop Papersclosedconf/itc/MetraMO0410.1109/TEST.2004.1387395https://doi.org/10.1109/TEST.2004.1387395https://dblp.org/rec/conf/itc/MetraMO04URL#6067384Carlos MichelRosa D. ReinosaTest Strategy Cost Model Innovations.ITC384-3922004Conference and Workshop Papersclosedconf/itc/MichelR0410.1109/TEST.2004.1386974https://doi.org/10.1109/TEST.2004.1386974https://dblp.org/rec/conf/itc/MichelR04URL#6067385Liviu MicleaSzilárd EnyediGavril TodereanAlfredo BensoPaolo PrinettoTowards Microagent based DBIST/DBISR.ITC867-8742004Conference and Workshop Papersclosedconf/itc/MicleaSTBP0410.1109/TEST.2004.1387350https://doi.org/10.1109/TEST.2004.1387350https://dblp.org/rec/conf/itc/MicleaSTBP04URL#6067386Subhasish MitraSteven S. LumettaMichael MitzenmacherX-Tolerant Signature Analysis.ITC432-4412004Conference and Workshop Papersclosedconf/itc/MitraLM0410.1109/TEST.2004.1386979https://doi.org/10.1109/TEST.2004.1386979https://dblp.org/rec/conf/itc/MitraLM04URL#6067387Grzegorz MrugalskiChen Wang 0014Artur PogielJerzy TyszerJanusz RajskiFault Diagnosis in Designs with Convolutional Compactors.ITC498-5072004Conference and Workshop Papersclosedconf/itc/MrugalskiWPTR0410.1109/TEST.2004.1386986https://doi.org/10.1109/TEST.2004.1386986https://dblp.org/rec/conf/itc/MrugalskiWPTR04URL#6067388Ali MuhtarogluBenoit ProvostTawfik Rahal-ArabiGreg TaylorI/O Self-Leakage Test.ITC903-9062004Conference and Workshop Papersclosedconf/itc/MuhtarogluPRT0410.1109/TEST.2004.1387354https://doi.org/10.1109/TEST.2004.1387354https://dblp.org/rec/conf/itc/MuhtarogluPRT04URL#6067389Nilanjan Mukherjee 0001Cost of Test - Taking Control.ITC14312004Conference and Workshop Papersclosedconf/itc/Mukherjee0410.1109/TEST.2004.1387439https://doi.org/10.1109/TEST.2004.1387439https://dblp.org/rec/conf/itc/Mukherjee04URL#6067390Jay J. NejedloFunctional Test Coverage Effectiveness on the Decline.ITC14242004Conference and Workshop Papersclosedconf/itc/Nejedlo0410.1109/TEST.2004.1387432https://doi.org/10.1109/TEST.2004.1387432https://dblp.org/rec/conf/itc/Nejedlo04URL#6067391Phil NighAchieving Quality Levels of 100dpm: It's possible - but roll up your sleeves and be prepared to do some work..ITC14202004Conference and Workshop Papersclosedconf/itc/Nigh0410.1109/TEST.2004.1387428https://doi.org/10.1109/TEST.2004.1387428https://dblp.org/rec/conf/itc/Nigh04URL#6067392Phil NighRedefining ATE: "Data Collection Engines that Drive Yield Learning and Process Optimization".ITC14292004Conference and Workshop Papersclosedconf/itc/Nigh04a10.1109/TEST.2004.1387437https://doi.org/10.1109/TEST.2004.1387437https://dblp.org/rec/conf/itc/Nigh04aURL#6067393Phil NighAnne E. GattikerRandom and Systematic Defect Analysis Using IDDQ Signature Analysis for Understanding Fails and Guiding Test Decisions.ITC309-3182004Conference and Workshop Papersclosedconf/itc/NighG0410.1109/TEST.2004.1386966https://doi.org/10.1109/TEST.2004.1386966https://dblp.org/rec/conf/itc/NighG04URL#6067394Kiyoshi NikawaHow long can we succeed using the OBIRCH and its derivatives?ITC14432004Conference and Workshop Papersclosedconf/itc/Nikawa0410.1109/TEST.2004.1387451https://doi.org/10.1109/TEST.2004.1387451https://dblp.org/rec/conf/itc/Nikawa04URL#6067395K. NikilaRubin A. ParekhjiDFT for Test Optimisations in a Complex Mixed-Signal SOC - Case Study on TI's TNETD7300 ADSL Modem Device.ITC773-7822004Conference and Workshop Papersclosedconf/itc/NikilaP0410.1109/TEST.2004.1387340https://doi.org/10.1109/TEST.2004.1387340https://dblp.org/rec/conf/itc/NikilaP04URL#6067396Charles NjindaA Hierarchical DFT Architecture for Chip, Board and System Test/Debug.ITC1061-10712004Conference and Workshop Papersclosedconf/itc/Njinda0410.1109/TEST.2004.1387379https://doi.org/10.1109/TEST.2004.1387379https://dblp.org/rec/conf/itc/Njinda04URL#6067397Hideo OkawaraPrecise Pulse Width Measurement in Write Pre-compensation Test.ITC972-9792004Conference and Workshop Papersclosedconf/itc/Okawara0410.1109/TEST.2004.1387362https://doi.org/10.1109/TEST.2004.1387362https://dblp.org/rec/conf/itc/Okawara04URL#6067398Yukio OkudaPanel Synopsis - Diagnosis Meets Physical Failure Analysis: How Long Can We Succeed?ITC14382004Conference and Workshop Papersclosedconf/itc/Okuda0410.1109/TEST.2004.1387446https://doi.org/10.1109/TEST.2004.1387446https://dblp.org/rec/conf/itc/Okuda04URL#6067399Saravanan PadmanabanSpyros TragoudasA Critical Path Selection Method for Delay Testing.ITC232-2412004Conference and Workshop Papersclosedconf/itc/PadmanabanT0410.1109/TEST.2004.1386957https://doi.org/10.1109/TEST.2004.1386957https://dblp.org/rec/conf/itc/PadmanabanT04URL#6067400Kenneth P. ParkerA New Probing Technique for High-Speed/High-Density Printed Circuit Boards.ITC365-3742004Conference and Workshop Papersclosedconf/itc/Parker0410.1109/TEST.2004.1386972https://doi.org/10.1109/TEST.2004.1386972https://dblp.org/rec/conf/itc/Parker04URL#6067401Kenneth P. ParkerBoard Test Coverage Needs to be Standardized.ITC14262004Conference and Workshop Papersclosedconf/itc/Parker04a10.1109/TEST.2004.1387434https://doi.org/10.1109/TEST.2004.1387434https://dblp.org/rec/conf/itc/Parker04aURL#6067402Chintan PatelAbhishek Singh 0001Jim PlusquellicDefect detection under Realistic Leakage Models using Multiple IDDQ Measurement.ITC319-3282004Conference and Workshop Papersclosedconf/itc/PatelSP0410.1109/TEST.2004.1386967https://doi.org/10.1109/TEST.2004.1386967https://dblp.org/rec/conf/itc/PatelSP04URL#6067403Stephen PaterasSecurity vs. Test Quality: Fully Embedded Test Approaches Are the Key to Having Both.ITC14132004Conference and Workshop Papersclosedconf/itc/Pateras0410.1109/TEST.2004.1387421https://doi.org/10.1109/TEST.2004.1387421https://dblp.org/rec/conf/itc/Pateras04URL#6067404Peter PattenDivide and Conquer based Fast Shmoo algorithms.ITC197-2022004Conference and Workshop Papersclosedconf/itc/Patten0410.1109/TEST.2004.1386953https://doi.org/10.1109/TEST.2004.1386953https://dblp.org/rec/conf/itc/Patten04URL#6067405Bipul Chandra PaulCassondra NeauKaushik Roy 0001Impact of Body Bias on Delay Fault Testing of Nanoscale CMOS Circuits.ITC1269-12752004Conference and Workshop Papersclosedconf/itc/PaulNR0410.1109/TEST.2004.1387401https://doi.org/10.1109/TEST.2004.1387401https://dblp.org/rec/conf/itc/PaulNR04URL#6067406Andrei PavlovManoj SachdevJosé Pineda de GyvezAN SRAM Weak Cell Fault Model and a DFT Technique with a Programmable Detection Threshold.ITC1006-10152004Conference and Workshop Papersclosedconf/itc/PavlovSG0410.1109/TEST.2004.1387366https://doi.org/10.1109/TEST.2004.1387366https://dblp.org/rec/conf/itc/PavlovSG04URL#6067407Sergio M. PerezThe Critical Need For Open ATE Architecture.ITC14092004Conference and Workshop Papersclosedconf/itc/Perez0410.1109/TEST.2004.1387417https://doi.org/10.1109/TEST.2004.1387417https://dblp.org/rec/conf/itc/Perez04URL#6067408Stas PolonskyKeith A. JenkinsAlan J. WegerShinho ChoCMOS IC diagnostics using the luminescence of OFF-state leakage currents.ITC134-1392004Conference and Workshop Papersclosedconf/itc/PolonskyJWC0410.1109/TEST.2004.1386945https://doi.org/10.1109/TEST.2004.1386945https://dblp.org/rec/conf/itc/PolonskyJWC04URL#6067409Irith PomeranzSrikanth VenkataramanSudhakar M. ReddyZ-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection.ITC489-4972004Conference and Workshop Papersclosedconf/itc/PomeranzVR0410.1109/TEST.2004.1386985https://doi.org/10.1109/TEST.2004.1386985https://dblp.org/rec/conf/itc/PomeranzVR04URL#6067410Ankan K. PramanickRamachandran KrishnaswamyMark ElstonToshiaki AdachiHarsanjeet SinghBruce R. ParnasTest Programming Environment in a Modular, Open Architecture Test System.ITC413-4222004Conference and Workshop Papersclosedconf/itc/PramanickKEASP0410.1109/TEST.2004.1386977https://doi.org/10.1109/TEST.2004.1386977https://dblp.org/rec/conf/itc/PramanickKEASP04URL#6067411Benoit ProvostChee How LimMo BashirAli MuhtarogluTiffany HuangKathy TianMubeen AthaCangsang ZhaoHarry MuljonoAC IO Loopback Design for High Speed µProcessor IO Test.ITC23-302004Conference and Workshop Papersclosedconf/itc/ProvostLBMHTAZM0410.1109/TEST.2004.1386933https://doi.org/10.1109/TEST.2004.1386933https://dblp.org/rec/conf/itc/ProvostLBMHTAZM04URL#6067412Jun QianPlan Ahead for Yield.ITC14472004Conference and Workshop Papersclosedconf/itc/Qian0410.1109/TEST.2004.1387455https://doi.org/10.1109/TEST.2004.1387455https://dblp.org/rec/conf/itc/Qian04URL#6067413Wangqi QiuJing Wang 0006D. M. H. WalkerDivya ReddyZhuo Li 0001Weiping ShiHari BalachandranK Longest Paths Per Gate (KLPG) Test Generation for Scan-Based Sequential Circuits.ITC223-2312004Conference and Workshop Papersclosedconf/itc/QiuWWRLSB0410.1109/TEST.2004.1386956https://doi.org/10.1109/TEST.2004.1386956https://dblp.org/rec/conf/itc/QiuWWRLSB04URL#6067414Ashwin RaghunathanJi Hwan (Paul) ChunJacob A. AbrahamAbhijit ChatterjeeQuasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters.ITC252-2612004Conference and Workshop Papersclosedconf/itc/RaghunathanCAC0410.1109/TEST.2004.1386959https://doi.org/10.1109/TEST.2004.1386959https://dblp.org/rec/conf/itc/RaghunathanCAC04URL#6067415R. RaghuramanSimulation Requirements for Vectors in ATE Formats.ITC1100-11072004Conference and Workshop Papersclosedconf/itc/Raghuraman0410.1109/TEST.2004.1387384https://doi.org/10.1109/TEST.2004.1387384https://dblp.org/rec/conf/itc/Raghuraman04URL#6067416Rochit RajsumanMasuda NoriyukiOpen Architecture Test System: System Architecture and Design.ITC403-4122004Conference and Workshop Papersclosedconf/itc/RajsumanN0410.1109/TEST.2004.1386976https://doi.org/10.1109/TEST.2004.1386976https://dblp.org/rec/conf/itc/RajsumanN04URL#6067417Wenjing RaoAlex OrailogluRamesh KarriFault Tolerant Arithmetic with Applications in Nanotechnology based Systems.ITC472-4782004Conference and Workshop Papersclosedconf/itc/RaoOK0410.1109/TEST.2004.1386983https://doi.org/10.1109/TEST.2004.1386983https://dblp.org/rec/conf/itc/RaoOK04URL#6067418C. P. RavikumarGraham HetheringtonA Holistic Parallel and Hierarchical Approach towards Design-For-Test.ITC345-3542004Conference and Workshop Papersclosedconf/itc/RavikumarH0410.1109/TEST.2004.1386970https://doi.org/10.1109/TEST.2004.1386970https://dblp.org/rec/conf/itc/RavikumarH04URL#6067419Jeff RearickSylvia PattersonKrista DornerIntegrating Boundary Scan into Multi-GHz I/O Circuitry.ITC560-5662004Conference and Workshop Papersclosedconf/itc/RearickPD0410.1109/TEST.2004.1386993https://doi.org/10.1109/TEST.2004.1386993https://dblp.org/rec/conf/itc/RearickPD04URL#6067420Vijay ReddyJohn M. CarulliAnand T. KrishnanWilliam BoschBrendan BurgessImpact of Negative Bias Temperature Instability on Product Parametric Drift.ITC148-1552004Conference and Workshop Papersclosedconf/itc/ReddyCKBB0410.1109/TEST.2004.1386947https://doi.org/10.1109/TEST.2004.1386947https://dblp.org/rec/conf/itc/ReddyCKBB04URL#6067421Manu RehaniDavid AbercrombieRobert MadgeJim TeisherJason SawATE Data Collection - A comprehensive requirements proposal to maximize ROI of test.ITC181-1892004Conference and Workshop Papersclosedconf/itc/RehaniAMTS0410.1109/TEST.2004.1386951https://doi.org/10.1109/TEST.2004.1386951https://dblp.org/rec/conf/itc/RehaniAMTS04URL#6067422Jeff RemmersMoe VillalbaRichard FisetteHierarchical DFT Methodology - A Case Study.ITC847-8562004Conference and Workshop Papersclosedconf/itc/RemmersVF0410.1109/TEST.2004.1387348https://doi.org/10.1109/TEST.2004.1387348https://dblp.org/rec/conf/itc/RemmersVF04URL#6067423David ResnickEmbedded Test for a new Memory-Card Architecture.ITC875-8822004Conference and Workshop Papersclosedconf/itc/Resnick0410.1109/TEST.2004.1387351https://doi.org/10.1109/TEST.2004.1387351https://dblp.org/rec/conf/itc/Resnick04URL#6067424Joseph A. ReynickInvestment vs. Yield Relationship for Memories and IP in SOC.ITC14462004Conference and Workshop Papersclosedconf/itc/Reynick0410.1109/TEST.2004.1387454https://doi.org/10.1109/TEST.2004.1387454https://dblp.org/rec/conf/itc/Reynick04URL#6067425Gordon D. RobinsonOpen Architecture ATE: Dream or Reality?ITC14082004Conference and Workshop Papersclosedconf/itc/Robinson0410.1109/TEST.2004.1387416https://doi.org/10.1109/TEST.2004.1387416https://dblp.org/rec/conf/itc/Robinson04URL#6067426Chris SchuermyerJens RufflerW. Robert DaaschMinimum Testing Requirements to Screen Temperature Dependent Defects.ITC300-3082004Conference and Workshop Papersclosedconf/itc/SchuermyerRD0410.1109/TEST.2004.1386964https://doi.org/10.1109/TEST.2004.1386964https://dblp.org/rec/conf/itc/SchuermyerRD04URL#6067427Rodger SchuttertD. C. L. (Erik) van GeestA. KumarOn-Chip Mixed-Signal Test Structures Re-used for Board Test.ITC375-3832004Conference and Workshop Papersclosedconf/itc/SchuttertGK0410.1109/TEST.2004.1386973https://doi.org/10.1109/TEST.2004.1386973https://dblp.org/rec/conf/itc/SchuttertGK04URL#6067428Anuja SehgalSandeep Kumar GoelErik Jan MarinissenKrishnendu ChakrabartyIEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores.ITC1203-12122004Conference and Workshop Papersclosedconf/itc/SehgalGMC0410.1109/TEST.2004.1387393https://doi.org/10.1109/TEST.2004.1387393https://dblp.org/rec/conf/itc/SehgalGMC04URL#6067429Alper Sen 0001Vijay K. GargJacob A. AbrahamJayanta BhadraFormal Verification of a System-on-Chip Using Computation Slicing.ITC810-8192004Conference and Workshop Papersclosedconf/itc/SenGAB0410.1109/TEST.2004.1387344https://doi.org/10.1109/TEST.2004.1387344https://dblp.org/rec/conf/itc/SenGAB04URL#6067430Sanjay SenguptaTest Strategies for Nanometer Technologies.ITC14212004Conference and Workshop Papersclosedconf/itc/Sengupta0410.1109/TEST.2004.1387429https://doi.org/10.1109/TEST.2004.1387429https://dblp.org/rec/conf/itc/Sengupta04URL#6067431Geert SeurenTom WaayersExtending the Digital Core-based Test Methodology to Support Mixed-Signal.ITC281-2892004Conference and Workshop Papersclosedconf/itc/SeurenW0410.1109/TEST.2004.1386962https://doi.org/10.1109/TEST.2004.1386962https://dblp.org/rec/conf/itc/SeurenW04URL#6067432Saghir A. ShaikhIEEE Std 1149.6 Implementation for a XAUI-to-Serial 10-Gbps Transceiver.ITC543-5502004Conference and Workshop Papersclosedconf/itc/Shaikh0410.1109/TEST.2004.1386991https://doi.org/10.1109/TEST.2004.1386991https://dblp.org/rec/conf/itc/Shaikh04URL#6067433Feng ShiYiorgos MakrisSPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits.ITC597-6062004Conference and Workshop Papersclosedconf/itc/ShiM0410.1109/TEST.2004.1386997https://doi.org/10.1109/TEST.2004.1386997https://dblp.org/rec/conf/itc/ShiM04URL#6067434Masashi ShimanouchiTiming Accuracy Enhancement by a New Calibration Scheme for Multi-Gbps ATE.ITC567-5762004Conference and Workshop Papersclosedconf/itc/Shimanouchi0410.1109/TEST.2004.1386994https://doi.org/10.1109/TEST.2004.1386994https://dblp.org/rec/conf/itc/Shimanouchi04URL#6067435Ozgur SinanogluAlex OrailogluAutonomous Yet Deterministic Test of SOC Cores.ITC1359-13682004Conference and Workshop Papersclosedconf/itc/SinanogluO0410.1109/TEST.2004.1387411https://doi.org/10.1109/TEST.2004.1387411https://dblp.org/rec/conf/itc/SinanogluO04URL#6067436Abhishek Singh 0001Chintan PatelJim PlusquellicOn-Chip Impulse Response Generation for Analog and Mixed-Signal Testing.ITC262-2702004Conference and Workshop Papersclosedconf/itc/SinghPP0410.1109/TEST.2004.1386960https://doi.org/10.1109/TEST.2004.1386960https://dblp.org/rec/conf/itc/SinghPP04URL#6067437A. T. SivaramPascal PierraShida SheibaniNancy Wang-LeeJorge E. SolorzanoLily TranActive Tester Interface Unit Design For Data Collection.ITC587-5962004Conference and Workshop Papersclosedconf/itc/SivaramPSWST0410.1109/TEST.2004.1386996https://doi.org/10.1109/TEST.2004.1386996https://dblp.org/rec/conf/itc/SivaramPSWST04URL#6067438A. T. SivaramMasashi ShimanouchiHoward MaassenRobert JacksonTester Architecture For The Source Synchronous Bus.ITC738-7472004Conference and Workshop Papersclosedconf/itc/SivaramSMJ0410.1109/TEST.2004.1387336https://doi.org/10.1109/TEST.2004.1387336https://dblp.org/rec/conf/itc/SivaramSMJ04URL#6067439Michael J. Smith 0005What do you mean my Board Test stinks?ITC14272004Conference and Workshop Papersclosedconf/itc/Smith0410.1109/TEST.2004.1387435https://doi.org/10.1109/TEST.2004.1387435https://dblp.org/rec/conf/itc/Smith04URL#6067440Peilin SongFranco StellariAlan J. WegerTian XiaA Novel Scan Chain Diagnostics Technique Based on Light Emission from Leakage Current.ITC140-1472004Conference and Workshop Papersclosedconf/itc/SongSWX0410.1109/TEST.2004.1386946https://doi.org/10.1109/TEST.2004.1386946https://dblp.org/rec/conf/itc/SongSWX04URL#6067441Laurent SourgenTesting a secure device: High coverage with very low observability.ITC14152004Conference and Workshop Papersclosedconf/itc/Sourgen0410.1109/TEST.2004.1387423https://doi.org/10.1109/TEST.2004.1387423https://dblp.org/rec/conf/itc/Sourgen04URL#6067442Jim SprochA Little DFT Goes a Long Way When Testing Multi-Gb/s I/O Signals.ITC14372004Conference and Workshop Papersclosedconf/itc/Sproch0410.1109/TEST.2004.1387445https://doi.org/10.1109/TEST.2004.1387445https://dblp.org/rec/conf/itc/Sproch04URL#6067443Thomas M. StoreyTesting in a high volume DSM Environment.ITC14222004Conference and Workshop Papersclosedconf/itc/Storey0410.1109/TEST.2004.1387430https://doi.org/10.1109/TEST.2004.1387430https://dblp.org/rec/conf/itc/Storey04URL#6067444Charles E. StroudJohn SunwooSrinivas M. GarimellaJonathan HarrisBuilt-In Self-Test for System-on-Chip: A Case Study.ITC837-8462004Conference and Workshop Papersclosedconf/itc/StroudSGH0410.1109/TEST.2004.1387347https://doi.org/10.1109/TEST.2004.1387347https://dblp.org/rec/conf/itc/StroudSGH04URL#6067445Fei SuKrishnendu ChakrabartyConcurrent Testing of Droplet-Based Microfluidic Systems for Multiplexed Biomedical Assays.ITC883-8922004Conference and Workshop Papersclosedconf/itc/SuC0410.1109/TEST.2004.1387352https://doi.org/10.1109/TEST.2004.1387352https://dblp.org/rec/conf/itc/SuC04URL#6067446Chin-Lung SuRei-Fu HuangCheng-Wen WuChien-Chung HungMing-Jer KaoYeong-Jar ChangWen Ching WuMRAM Defect Analysis and Fault Modeli.ITC124-1332004Conference and Workshop Papersclosedconf/itc/SuHWHKCW0410.1109/TEST.2004.1386944https://doi.org/10.1109/TEST.2004.1386944https://dblp.org/rec/conf/itc/SuHWHKCW04URL#6067447Stephen K. SunterAubin RoyJean-Francois CoteAn Automated, Complete, Structural Test Solution for SERDES.ITC95-1042004Conference and Workshop Papersclosedconf/itc/SunterRC0410.1109/TEST.2004.1386941https://doi.org/10.1109/TEST.2004.1386941https://dblp.org/rec/conf/itc/SunterRC04URL#6067448Manan SyalMichael S. HsiaoSreejit ChakravartyIdentifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks.ITC1034-10432004Conference and Workshop Papersclosedconf/itc/SyalHC0410.1109/TEST.2004.1387369https://doi.org/10.1109/TEST.2004.1387369https://dblp.org/rec/conf/itc/SyalHC04URL#6067449Ahmed Rashid SyedAutomatic Delay Calibration Method for Multi-channel CMOS Formatter.ITC577-5862004Conference and Workshop Papersclosedconf/itc/Syed0410.1109/TEST.2004.1386995https://doi.org/10.1109/TEST.2004.1386995https://dblp.org/rec/conf/itc/Syed04URL#6067450Sassan TabatabaeiMichael LeeFreddy Ben-ZeevJitter Generation and Measurement for Test of Multigbps Serial IO.ITC1313-13212004Conference and Workshop Papersclosedconf/itc/TabatabaeiLB0410.1109/TEST.2004.1387406https://doi.org/10.1109/TEST.2004.1387406https://dblp.org/rec/conf/itc/TabatabaeiLB04URL#6067451Mehdi Baradaran TahooriApplication-Dependent Diagnosis of FPGAs.ITC645-6542004Conference and Workshop Papersclosedconf/itc/Tahoori0410.1109/TEST.2004.1387002https://doi.org/10.1109/TEST.2004.1387002https://dblp.org/rec/conf/itc/Tahoori04URL#6067452Mehdi Baradaran TahooriSubhasish MitraInterconnect Delay Testing of Designs on Programmable Logic Devices.ITC635-6442004Conference and Workshop Papersclosedconf/itc/TahooriM0410.1109/TEST.2004.1387001https://doi.org/10.1109/TEST.2004.1387001https://dblp.org/rec/conf/itc/TahooriM04URL#6067453Christopher S. TailleferGordon W. RobertsReducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment without Increasing Test Time.ITC953-9622004Conference and Workshop Papersclosedconf/itc/TailleferR0410.1109/TEST.2004.1387360https://doi.org/10.1109/TEST.2004.1387360https://dblp.org/rec/conf/itc/TailleferR04URL#6067454Yuyi TangHans-Joachim WunderlichHarald P. E. VrankenFriedrich HapkeMichael WittkePiet EngelkeIlia PolianBernd Becker 0001X-Masking During Logic BIST and Its Impact on Defect Coverage.ITC442-4512004Conference and Workshop Papersclosedconf/itc/TangWVHWEPB0410.1109/TEST.2004.1386980https://doi.org/10.1109/TEST.2004.1386980https://dblp.org/rec/conf/itc/TangWVHWEPB04URL#6067455Karen TaylorBryan NelsonAlan ChongHieu NguyenHenry C. LinMani SomaHosam HaggagJeff HuardJim BraatzExperimental Results for High-Speed Jitter Measurement Technique.ITC85-942004Conference and Workshop Papersclosedconf/itc/TaylorNCNLSHHB0410.1109/TEST.2004.1386940https://doi.org/10.1109/TEST.2004.1386940https://dblp.org/rec/conf/itc/TaylorNCNLSHHB04URL#6067456Mike TrippITC 2004 Panel: Cost of Test - Taking Control.ITC14322004Conference and Workshop Papersclosedconf/itc/Tripp0410.1109/TEST.2004.1387440https://doi.org/10.1109/TEST.2004.1387440https://dblp.org/rec/conf/itc/Tripp04URL#6067457Mike TrippT. M. MakAnne MeixnerElimination of Traditional Functional Testing of Interface Timings at Intel.ITC1448-14562004Conference and Workshop Papersclosedconf/itc/TrippMM03a10.1109/TEST.2004.1387457https://doi.org/10.1109/TEST.2004.1387457https://dblp.org/rec/conf/itc/TrippMM03aURL#6067458Srikanth VenkataramanDiagnosis meets Physical Failure Analysis: What is needed to succeed?ITC14422004Conference and Workshop Papersclosedconf/itc/Venkataraman0410.1109/TEST.2004.1387450https://doi.org/10.1109/TEST.2004.1387450https://dblp.org/rec/conf/itc/Venkataraman04URL#6067459Amit VermaCharles RobinsonSteve ButkovichProduction Test Effectiveness of Combined Automated Inspection and ICT Test Strategies.ITC393-4022004Conference and Workshop Papersclosedconf/itc/VermaRB0410.1109/TEST.2004.1386975https://doi.org/10.1109/TEST.2004.1386975https://dblp.org/rec/conf/itc/VermaRB04URL#6067460Bart VermeulenCamelia HoraBram KrusemanErik Jan MarinissenRobert Van RijsingeTrends in Testing Integrated Circuits.ITC688-6972004Conference and Workshop Papersclosedconf/itc/VermeulenHKMR0410.1109/TEST.2004.1387330https://doi.org/10.1109/TEST.2004.1387330https://dblp.org/rec/conf/itc/VermeulenHKMR04URL#6067461Thomas J. VogelsThomas ZanonRao DesineniR. D. (Shawn) BlantonWojciech MalyJason G. BrownJeffrey E. NelsonY. FeiX. HuangPadmini GopalakrishnanMahim MishraVyacheslav RovnerS. TiwaryBenchmarking Diagnosis Algorithms With a Diverse Set of IC Deformations.ITC508-5172004Conference and Workshop Papersclosedconf/itc/VogelsZDBMBNFHGMRT0410.1109/TEST.2004.1386987https://doi.org/10.1109/TEST.2004.1386987https://dblp.org/rec/conf/itc/VogelsZDBMBNFHGMRT04URL#6067462Osamu WadaToshimasa NamekawaHiroshi ItoAtsushi NakayamaShuso FujiiPost-Packaging Auto Repair Techniques for Fast Row Cycle Embedded DRAM.ITC1016-10232004Conference and Workshop Papersclosedconf/itc/WadaNINF0410.1109/TEST.2004.1387367https://doi.org/10.1109/TEST.2004.1387367https://dblp.org/rec/conf/itc/WadaNINF04URL#6067463Laung-Terng WangKhader S. Abdel-HafezShianling WuXiaoqing WenHiroshi FurukawaFei-Sheng HsuShyh-Horng LinSen-Wei TsaiVirtualScan: A New Compressed Scan Technology for Test Cost Reduction.ITC916-9252004Conference and Workshop Papersclosedconf/itc/WangAWWFHLT0410.1109/TEST.2004.1387356https://doi.org/10.1109/TEST.2004.1387356https://dblp.org/rec/conf/itc/WangAWWFHLT04URL#6067464Haibo Wang 0005Suchitra KulkarniSpyros TragoudasOn-line Testing Field Programmable Analog Array Circuits.ITC1340-13482004Conference and Workshop Papersclosedconf/itc/WangKT0410.1109/TEST.2004.1387409https://doi.org/10.1109/TEST.2004.1387409https://dblp.org/rec/conf/itc/WangKT04URL#6067465Daisuke WatanabeMasakatsu SudaToshiyuki Okayasu34.1Gbps Low Jitter, Low BER High-Speed Parallel CMOS Interface for Interconnections in High-Speed Memory Test System.ITC1255-12622004Conference and Workshop Papersclosedconf/itc/WatanabeSO0410.1109/TEST.2004.1387399https://doi.org/10.1109/TEST.2004.1387399https://dblp.org/rec/conf/itc/WatanabeSO04URL#6067466Burnell G. WestOpen Architecture ATE: Prospects and Problems.ITC14102004Conference and Workshop Papersclosedconf/itc/West0410.1109/TEST.2004.1387418https://doi.org/10.1109/TEST.2004.1387418https://dblp.org/rec/conf/itc/West04URL#6067467Burnell G. WestMichael F. JonesDigital Synchronization for Reconfigurable ATE.ITC1249-12542004Conference and Workshop Papersclosedconf/itc/WestJ0410.1109/TEST.2004.1387398https://doi.org/10.1109/TEST.2004.1387398https://dblp.org/rec/conf/itc/WestJ04URL#6067468Qingwei WuMichael S. HsiaoState Variable Extraction to Reduce Problem Complexity for ATPG and Design Validation.ITC820-8292004Conference and Workshop Papersclosedconf/itc/WuH0410.1109/TEST.2004.1387345https://doi.org/10.1109/TEST.2004.1387345https://dblp.org/rec/conf/itc/WuH04URL#6067469Kaijie Wu 0001Ramesh KarriGrigori KuznetsovMichael GösselLow Cost Concurrent Error Detection for the Advanced Encryption Standard.ITC1242-12482004Conference and Workshop Papersclosedconf/itc/WuKKG0410.1109/TEST.2004.1387397https://doi.org/10.1109/TEST.2004.1387397https://dblp.org/rec/conf/itc/WuKKG04URL#6067470David M. WuMike LinMadhukar ReddyTalal JaberAnil SabbavarapuLarry ThatcherAn Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor.ITC38-472004Conference and Workshop Papersclosedconf/itc/WuLRJST0410.1109/TEST.2004.1386935https://doi.org/10.1109/TEST.2004.1386935https://dblp.org/rec/conf/itc/WuLRJST04URL#6067471Armin WürtenbergerChristofer S. TautermannSybille HellebrandData Compression for Multiple Scan Chains Using Dictionaries with Corrections.ITC926-9352004Conference and Workshop Papersclosedconf/itc/WurtenbergerTH0410.1109/TEST.2004.1387357https://doi.org/10.1109/TEST.2004.1387357https://dblp.org/rec/conf/itc/WurtenbergerTH04URL#6067472International Test Conference - Cover.ITC2004Conference and Workshop Papersclosedconf/itc/X0410.1109/TEST.2004.1386912https://doi.org/10.1109/TEST.2004.1386912https://dblp.org/rec/conf/itc/X04URL#6067473International Test Conference - Title Page.ITCi2004Conference and Workshop Papersclosedconf/itc/X04a10.1109/TEST.2004.1386914https://doi.org/10.1109/TEST.2004.1386914https://dblp.org/rec/conf/itc/X04aURL#6067474International Test Conference - Copyright.ITCii2004Conference and Workshop Papersclosedconf/itc/X04b10.1109/TEST.2004.1386915https://doi.org/10.1109/TEST.2004.1386915https://dblp.org/rec/conf/itc/X04bURL#6067475Welcoming Message.ITC12004Conference and Workshop Papersclosedconf/itc/X04c10.1109/TEST.2004.1386921https://doi.org/10.1109/TEST.2004.1386921https://dblp.org/rec/conf/itc/X04cURL#6067476Steering Committee and Subcommittees.ITC2-32004Conference and Workshop Papersclosedconf/itc/X04d10.1109/TEST.2004.1386922https://doi.org/10.1109/TEST.2004.1386922https://dblp.org/rec/conf/itc/X04dURL#6067477Ned Kornfield Memorial.ITC42004Conference and Workshop Papersclosedconf/itc/X04e10.1109/TEST.2004.1386923https://doi.org/10.1109/TEST.2004.1386923https://dblp.org/rec/conf/itc/X04eURL#60674782003 Paper Awards.ITC52004Conference and Workshop Papersclosedconf/itc/X04f10.1109/TEST.2004.1386924https://doi.org/10.1109/TEST.2004.1386924https://dblp.org/rec/conf/itc/X04fURL#6067479Technical Program Committee.ITC6-82004Conference and Workshop Papersclosedconf/itc/X04g10.1109/TEST.2004.1386925https://doi.org/10.1109/TEST.2004.1386925https://dblp.org/rec/conf/itc/X04gURL#6067480ITC Technical Paper Evaluation and Selection Process.ITC102004Conference and Workshop Papersclosedconf/itc/X04h10.1109/TEST.2004.1386927https://doi.org/10.1109/TEST.2004.1386927https://dblp.org/rec/conf/itc/X04hURL#60674812005 Call for Papers.ITC112004Conference and Workshop Papersclosedconf/itc/X04i10.1109/TEST.2004.1386928https://doi.org/10.1109/TEST.2004.1386928https://dblp.org/rec/conf/itc/X04iURL#6067482TTTC: Test Technology Technical Council.ITC14-162004Conference and Workshop Papersclosedconf/itc/X04j10.1109/TEST.2004.1386931https://doi.org/10.1109/TEST.2004.1386931https://dblp.org/rec/conf/itc/X04jURL#6067483Technical Paper Reviewers.ITC17-222004Conference and Workshop Papersclosedconf/itc/X04k10.1109/TEST.2004.1386932https://doi.org/10.1109/TEST.2004.1386932https://dblp.org/rec/conf/itc/X04kURL#6067484Qiang Xu 0001Nicola NicoliciTime/Area Tradeoffs in Testing Hierarchical SOCs With Hard Mega-Cores.ITC1196-12022004Conference and Workshop Papersclosedconf/itc/XuN0410.1109/TEST.2004.1387392https://doi.org/10.1109/TEST.2004.1387392https://dblp.org/rec/conf/itc/XuN04URL#6067485Takahiro J. YamaguchiLoopback or not?ITC14342004Conference and Workshop Papersclosedconf/itc/Yamaguchi0410.1109/TEST.2004.1387442https://doi.org/10.1109/TEST.2004.1387442https://dblp.org/rec/conf/itc/Yamaguchi04URL#6067486Takahiro J. YamaguchiMasahiro IshidaKiyotaka IchiyamaMani SomaChristian KrawinkelKatsuaki OhsawaMasao SugaiA Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems.ITC77-842004Conference and Workshop Papersclosedconf/itc/YamaguchiIISKOS0410.1109/TEST.2004.1386939https://doi.org/10.1109/TEST.2004.1386939https://dblp.org/rec/conf/itc/YamaguchiIISKOS04URL#6067487Haihua YanAdit D. SinghEvaluating the Effectiveness of Detecting Delay Defects in the Slack Interval: A Simulation Study.ITC242-2512004Conference and Workshop Papersclosedconf/itc/YanS0410.1109/TEST.2004.1386958https://doi.org/10.1109/TEST.2004.1386958https://dblp.org/rec/conf/itc/YanS04URL#6067488Bo Yang 0010Kaijie Wu 0001Ramesh KarriScan Based Side Channel Attack on Dedicated Hardware Implementations of Data Encryption Standard.ITC339-3442004Conference and Workshop Papersclosedconf/itc/YangWK0410.1109/TEST.2004.1386969https://doi.org/10.1109/TEST.2004.1386969https://dblp.org/rec/conf/itc/YangWK04URL#6067489Zhongjun YuDegang Chen 0001Randall L. GeigerA Computationally Efficient Method for Accurate Spectral Testing without Requiring Coherent Sampling.ITC1398-14072004Conference and Workshop Papersclosedconf/itc/YuCG0410.1109/TEST.2004.1387415https://doi.org/10.1109/TEST.2004.1387415https://dblp.org/rec/conf/itc/YuCG04URL#6067490Hak-soo YuHongjoong ShinJi Hwan (Paul) ChunJacob A. AbrahamPerformance Characterization of Mixed-Signal Circuits Using a Ternary Signal Representation.ITC1389-13972004Conference and Workshop Papersclosedconf/itc/YuSCA0410.1109/TEST.2004.1387414https://doi.org/10.1109/TEST.2004.1387414https://dblp.org/rec/conf/itc/YuSCA04URL#6067491Martin ZambaldiWolfgang EckerHow to Bridge the Gap Between Simulationand Test.ITC1091-10992004Conference and Workshop Papersclosedconf/itc/ZambaldiE0410.1109/TEST.2004.1387383https://doi.org/10.1109/TEST.2004.1387383https://dblp.org/rec/conf/itc/ZambaldiE04URL#6067492Jing ZengMagdy S. AbadirA. KolhatkarG. VandlingLi-C. WangJacob A. AbrahamOn Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design.ITC31-372004Conference and Workshop Papersclosedconf/itc/ZengAKVWA0410.1109/TEST.2004.1386934https://doi.org/10.1109/TEST.2004.1386934https://dblp.org/rec/conf/itc/ZengAKVWA04URL#6067493Junwu ZhangMichael L. BushnellVishwani D. AgrawalOn Random Pattern Generation with the Selfish Gene Algorithm for Testing Digital Sequential Circuits.ITC617-6262004Conference and Workshop Papersclosedconf/itc/ZhangBA0410.1109/TEST.2004.1386999https://doi.org/10.1109/TEST.2004.1386999https://dblp.org/rec/conf/itc/ZhangBA04URL#6067494Yujun ZhangZhongcheng LiIPV6 Conformance Testing: Theory and Practice.ITC719-7272004Conference and Workshop Papersclosedconf/itc/ZhangL0410.1109/TEST.2004.1387334https://doi.org/10.1109/TEST.2004.1387334https://dblp.org/rec/conf/itc/ZhangL04URL#6067495Quming ZhouKartik MohanramAnalysis of delay caused by bridging faults in RLC interconnects.ITC1044-10522004Conference and Workshop Papersclosedconf/itc/ZhouM0410.1109/TEST.2004.1387377https://doi.org/10.1109/TEST.2004.1387377https://dblp.org/rec/conf/itc/ZhouM04URL#6067496Yervant ZorianInvestment vs. Yield Relationship for Memories in SOC.ITC14442004Conference and Workshop Papersclosedconf/itc/Zorian0410.1109/TEST.2004.1387452https://doi.org/10.1109/TEST.2004.1387452https://dblp.org/rec/conf/itc/Zorian04URL#6067497Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USAIEEE Computer Society2003Editorshipconf/itc/2004https://ieeexplore.ieee.org/xpl/conhome/9526/proceedinghttps://dblp.org/rec/conf/itc/2004URL#6212818