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Journal Articles
- 2020
[j2]Thomas Chen
, Jacob Botimer, Teyuh Chou, Zhengya Zhang:
A 1.87-mm2 56.9-GOPS Accelerator for Solving Partial Differential Equations. IEEE J. Solid State Circuits 55(6): 1709-1718 (2020)- 2018
- [j1]Chih-Cheng Chang, Pin-Chun Chen, Teyuh Chou, I-Ting Wang, Boris Hudec, Che-Chia Chang, Chia-Ming Tsai, Tian-Sheuan Chang, Tuo-Hung Hou:
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(1): 116-124 (2018)
Conference and Workshop Papers
- 2023
- [c4]Teyuh Chou, Fernando García-Redondo, Paul N. Whatmough, Zhengya Zhang:
AR-PIM: An Adaptive-Range Processing-in-Memory Architecture. ISLPED 2023: 1-6 - 2022
- [c3]Teyuh Chou, Wei Tang, Mihai D. Rotaru, Chester Liu, Rahul Dutta, Sharon Lim Pei Siang, David Ho Soon Wee, Surya Bhattacharya, Zhengya Zhang:
NetFlex: A 22nm Multi-Chiplet Perception Accelerator in High-Density Fan-Out Wafer-Level Packaging. VLSI Technology and Circuits 2022: 208-209 - 2019
- [c2]Thomas Chen, Jacob Botimer, Teyuh Chou, Zhengya Zhang:
An Sram-Based Accelerator for Solving Partial Differential Equations. CICC 2019: 1-4 - [c1]Teyuh Chou, Wei Tang, Jacob Botimer, Zhengya Zhang:
CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm. MICRO 2019: 114-125
Informal and Other Publications
- 2017
- [i1]Chih-Cheng Chang, Pin-Chun Chen, Teyuh Chou, I-Ting Wang, Boris Hudec, Che-Chia Chang, Chia-Ming Tsai, Tian-Sheuan Chang, Tuo-Hung Hou:
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network based on Analog Resistive Synapse. CoRR abs/1712.05895 (2017)
Coauthor Index
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