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ORCID"Useful-Skew Clock Routing with Gate Sizing for Low Power Design."
Joe G. Xi, Wayne Wei-Ming Dai (1997)
- Joe G. Xi, Wayne Wei-Ming Dai:
Useful-Skew Clock Routing with Gate Sizing for Low Power Design. J. VLSI Signal Process. 16(2-3): 163-179 (1997)
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