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"Floating Point CGRA based Ultra-Low Power DSP Accelerator."

Rohit Prasad et al. (2021)

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DOI: 10.1007/S11265-020-01630-2

access: closed

type: Journal Article

metadata version: 2021-11-03

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  dblp key:
  - journals/vlsisp/PrasadDMC21
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  - https://dblp.org/rec/journals/vlsisp/PrasadDMC21
Rohit Prasad, Satyajit Das, Kevin J. M. Martin, Philippe Coussy:
Floating Point CGRA based Ultra-Low Power DSP Accelerator. J. Signal Process. Syst. 93(10): 1159-1171 (2021)

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