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"High-performance VLSI multiplier with a new redundant binary coding."

Xiaoping Huang et al. (1991)

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DOI: 10.1007/BF00936901

access: closed

type: Journal Article

metadata version: 2020-05-20

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  - journals/vlsisp/HuangWCM91
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  - https://dblp.org/rec/journals/vlsisp/HuangWCM91
Xiaoping Huang, Belle W. Y. Wei, Honglu Chen, Yuhai H. Mao:
High-performance VLSI multiplier with a new redundant binary coding. J. VLSI Signal Process. 3(4): 283-291 (1991)

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