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"Clock Skew Optimization for Peak Current Reduction."

Luca Benini et al. (1997)

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DOI: 10.1023/A:1007982806152

access: closed

type: Journal Article

metadata version: 2020-05-20

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  - journals/vlsisp/BeniniVBM97
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  - https://dblp.org/rec/journals/vlsisp/BeniniVBM97
Luca Benini, Patrick Vuillod, Alessandro Bogliolo, Giovanni De Micheli:
Clock Skew Optimization for Peak Current Reduction. J. VLSI Signal Process. 16(2-3): 117-130 (1997)

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