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"Timing Challenges for Very Deep Sub-Micron (VDSM) IC."

Ichiang Lin, Chien-In Henry Chen (2002)

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DOI: 10.1080/1065514021000012183

access: open

type: Journal Article

metadata version: 2023-05-08

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Ichiang Lin, Chien-In Henry Chen:
Timing Challenges for Very Deep Sub-Micron (VDSM) IC. VLSI Design 15(3): 557-562 (2002)

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