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"A 3.2-GHz 178-fsrms Jitter Subsampling PLL/DLL-Based ..."

Dong-Hyun Yoon et al. (2022)

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DOI: 10.1109/TVLSI.2022.3169636

access: closed

type: Journal Article

metadata version: 2022-07-25

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Dong-Hyun Yoon, Dong-Kyu Jung, Kiho Seong, Jae-Soub Han, Keun-Yong Chung, Ju Eon Kim, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 3.2-GHz 178-fs_rms Jitter Subsampling PLL/DLL-Based Injection-Locked Clock Multiplier. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 915-925 (2022)

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