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"Parallel Interleavers Through Optimized Memory Address Remapping."

Jing-Ling Yang (2010)

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DOI: 10.1109/TVLSI.2009.2019076

access: closed

type: Journal Article

metadata version: 2022-04-04

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Jing-Ling Yang:
Parallel Interleavers Through Optimized Memory Address Remapping. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 978-987 (2010)

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