"10-315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation."

Minyoung Song et al. (2013)

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DOI: 10.1109/TVLSI.2012.2227068

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type: Journal Article

metadata version: 2021-10-14

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Minyoung Song, Young-Ho Kwak, Sunghoon Ahn, Hojin Park, Chulwoo Kim:
10-315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation. IEEE Trans. Very Large Scale Integr. Syst. 21(11): 2080-2093 (2013)

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