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"Optimizing the Implementation of SEC-DAEC Codes in FPGAs."

Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro (2016)

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DOI: 10.1109/TVLSI.2016.2556943

access: closed

type: Journal Article

metadata version: 2020-12-29

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  - journals/tvlsi/Sanchez-MacianR16
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  - https://dblp.org/rec/journals/tvlsi/Sanchez-MacianR16
Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro:
Optimizing the Implementation of SEC-DAEC Codes in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3538-3542 (2016)

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