Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm ..."

Robert Polster et al. (2016)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2016.2553673

access: closed

type: Journal Article

metadata version: 2020-03-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/PolsterTWJC16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/PolsterTWJC16
Robert Polster, Yvain Thonnart, Guillaume Waltener, Jose-Luis Gonzalez Jimenez, Eric Cassan:
Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes. IEEE Trans. Very Large Scale Integr. Syst. 24(12): 3450-3459 (2016)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.