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"A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step SAR ADC in 40-nm CMOS."

Jian Luo et al. (2018)

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DOI: 10.1109/TVLSI.2018.2846746

access: closed

type: Journal Article

metadata version: 2021-05-10

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  - https://dblp.org/rec/journals/tvlsi/LuoLNLY18
Jian Luo, Jing Li, Ning Ning, Yang Liu, Qi Yu:
A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step SAR ADC in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 1980-1988 (2018)

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