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"A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time."

Moo-young Kim et al. (2009)

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DOI: 10.1109/TVLSI.2008.2004591

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - journals/tvlsi/KimSCK09
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  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/KimSCK09
Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim:
A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. Very Large Scale Integr. Syst. 17(10): 1461-1469 (2009)

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