"ALTO: an iterative area/performance tradeoff algorithm for LUT-based FPGA ..."

Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen (2000)

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DOI: 10.1109/92.863618

access: closed

type: Journal Article

metadata version: 2020-03-11

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Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen:
ALTO: an iterative area/performance tradeoff algorithm for LUT-based FPGA technology mapping. IEEE Trans. Very Large Scale Integr. Syst. 8(4): 392-400 (2000)

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