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"Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS ..."

Bhaskar Chatterjee, Manoj Sachdev (2005)

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DOI: 10.1109/TVLSI.2005.859563

access: closed

type: Journal Article

metadata version: 2020-03-11

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Bhaskar Chatterjee, Manoj Sachdev:
Design of a 1.7-GHz low-power delay-fault-testable 32-b ALU in 180-nm CMOS technology. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1296-1304 (2005)

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