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"Error-resilient low-power Viterbi decoder architectures."

Rami A. Abdallah, Naresh R. Shanbhag (2009)

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DOI: 10.1109/TSP.2009.2026078

access: closed

type: Journal Article

metadata version: 2020-03-10

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  - https://dblp.org/rec/journals/tsp/AbdallahS09
Rami A. Abdallah, Naresh R. Shanbhag:
Error-resilient low-power Viterbi decoder architectures. IEEE Trans. Signal Process. 57(12): 4906-4917 (2009)

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