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"Design of Synthesis-time Vectorized Arithmetic Hardware for Tapered ..."
Ashish Reddy Bommana et al. (2023)
- Ashish Reddy Bommana, Susheel Ujwal Siddamshetty, Pudi Dhilleswararao, Arvind Thumatti K. R., Srinivas Boppu, M. Sabarimalai Manikandan, Linga Reddy Cenkeramaddi:
Design of Synthesis-time Vectorized Arithmetic Hardware for Tapered Floating-point Addition and Subtraction. ACM Trans. Design Autom. Electr. Syst. 28(3): 32:1-32:35 (2023)
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