"Efficient Algorithm Adaptations and Fully Parallel Hardware Architecture ..."

Yuanzhi Zhang, Chao Lu (2019)

> Home

Details and statistics

DOI: 10.1109/TCSVT.2018.2878399

access: closed

type: Journal Article

metadata version: 2025-01-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcsv/ZhangL19b
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcsv/ZhangL19b
Yuanzhi Zhang, Chao Lu:
Efficient Algorithm Adaptations and Fully Parallel Hardware Architecture of H.265/HEVC Intra Encoder. IEEE Trans. Circuits Syst. Video Technol. 29(11): 3415-3429 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.