"Memory and computation efficient hardware design for a 3 spatial and ..."

Kyujoong Lee et al. (2011)

> Home

Details and statistics

DOI: 10.1109/TCE.2011.6131172

access: closed

type: Journal Article

metadata version: 2020-07-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tce/LeeRLK11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tce/LeeRLK11
Kyujoong Lee, Chae-Eun Rhee, Hyuk-Jae Lee, Jung Won Kang:
Memory and computation efficient hardware design for a 3 spatial and temporal layers SVC encoder. IEEE Trans. Consumer Electron. 57(4): 1921-1928 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.