"Multi-Bit Compute-In Memory Architecture Using a C-2C Ladder Network."

Dinesh Kushwaha et al. (2024)

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DOI: 10.1109/TCSII.2023.3329261

access: closed

type: Journal Article

metadata version: 2024-07-04

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Dinesh Kushwaha, Jaya Kumar Abotula, Rajat Kohli, Jwalant Mishra, Sudeb Dasgupta, Anand Bulusu:
Multi-Bit Compute-In Memory Architecture Using a C-2C Ladder Network. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 3166-3170 (2024)

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