


default search action
"Low-Delay FPGA-Based Implementation of Finite Field Multipliers."
José Luis Imaña (2021)
- José Luis Imaña
:
Low-Delay FPGA-Based Implementation of Finite Field Multipliers. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2952-2956 (2021)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.