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"A Bias-Current-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation."

Xinyu Xu et al. (2021)

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DOI: 10.1109/TCSI.2021.3090567

access: closed

type: Journal Article

metadata version: 2021-09-16

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  - https://dblp.org/rec/journals/tcasI/XuWRW21
Xinyu Xu, Zixiang Wan, Woogeun Rhee, Zhihua Wang:
A Bias-Current-Free Fractional-N Hybrid PLL for Low-Voltage Clock Generation. IEEE Trans. Circuits Syst. I Regul. Pap. 68(9): 3611-3620 (2021)

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