"High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of ..."

Anuj Verma, Rahul Shrestha (2024)

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DOI: 10.1109/TCSI.2024.3429174

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type: Journal Article

metadata version: 2024-09-20

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Anuj Verma, Rahul Shrestha:
High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of Reconfigurable LDPC/Polar Decoder for mMTC and URLLC 5G-NR Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 71(9): 4284-4297 (2024)

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