"A 0.42-3.45 Gb/s Referenceless Clock and Data Recovery Circuit With ..."

Kyung-Sub Son et al. (2020)

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DOI: 10.1109/TCSII.2019.2927408

access: closed

type: Journal Article

metadata version: 2020-10-08

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Kyung-Sub Son, Taek-Joon An, Yong-Hwan Moon, Jin-Ku Kang:
A 0.42-3.45 Gb/s Referenceless Clock and Data Recovery Circuit With Counter-Based Unrestricted Frequency Acquisition. IEEE Trans. Circuits Syst. II Express Briefs 67-II(6): 974-978 (2020)

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