"A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully ..."

Xin Si et al. (2019)

> Home

Details and statistics

DOI: 10.1109/TCSI.2019.2928043

access: closed

type: Journal Article

metadata version: 2023-07-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/SiKCLSLYYLC19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/SiKCLSLYYLC19
Xin Si, Win-San Khwa, Jia-Jing Chen, Jia-Fang Li, Xiaoyu Sun, Rui Liu, Shimeng Yu, Hiroyuki Yamauchi, Qiang Li, Meng-Fan Chang:
A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(11): 4172-4185 (2019)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.