"High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless ..."

Rahul Shrestha, Roy P. Paily (2014)

> Home

Details and statistics

DOI: 10.1109/TCSI.2014.2332266

access: closed

type: Journal Article

metadata version: 2020-10-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/ShresthaP14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/ShresthaP14
Rahul Shrestha, Roy P. Paily:
High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless Communication Standards. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(9): 2699-2710 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.