"Three hardware architectures for the binary modular exponentiation: ..."

Nadia Nedjah, Luiza de Macedo Mourelle (2006)

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DOI: 10.1109/TCSI.2005.858767

access: closed

type: Journal Article

metadata version: 2020-05-22

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Nadia Nedjah, Luiza de Macedo Mourelle:
Three hardware architectures for the binary modular exponentiation: sequential, parallel, and systolic. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 627-633 (2006)

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