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"Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform ..."

Pramod Kumar Meher et al. (2015)

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DOI: 10.1109/TCSI.2015.2495724

access: closed

type: Journal Article

metadata version: 2020-05-22

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Pramod Kumar Meher, Basant Kumar Mohanty, Sujit Kumar Patel, Soumya Ganguly, Thambipillai Srikanthan:
Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(12): 2836-2845 (2015)

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