"High-Performance VLSI Architecture of Decision Feedback Equalizer for ..."

Chih-Hsiu Lin, An-Yeu Wu, Fan-Min Li (2006)

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DOI: 10.1109/TCSII.2006.881165

access: closed

type: Journal Article

metadata version: 2020-05-27

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Chih-Hsiu Lin, An-Yeu Wu, Fan-Min Li:
High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 911-915 (2006)

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