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"A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design."

Jin-Fa Lin et al. (2007)

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DOI: 10.1109/TCSI.2007.895509

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/LinHSH07
Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho:
A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(5): 1050-1059 (2007)

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