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"A Design Technique for Energy Reduction in NORA CMOS Logic."

Konstantinos Limniotis et al. (2006)

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DOI: 10.1109/TCSI.2006.885690

access: closed

type: Journal Article

metadata version: 2022-01-03

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Konstantinos Limniotis, Yiorgos Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni:
A Design Technique for Energy Reduction in NORA CMOS Logic. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(12): 2647-2655 (2006)

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