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ORCID"A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits."
Sunmean Kim et al. (2020)
- Sunmean Kim
, Sung-Yun Lee, Sunghye Park, Kyung Rok Kim, Seokhyeong Kang:
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(9): 3138-3151 (2020)
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