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"1.25/2.5-Gb/s Dual Bit-Rate Burst-Mode Clock Recovery Circuits in 0.18- ..."

Pyung-Su Han, Woo-Young Choi (2007)

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DOI: 10.1109/TCSII.2006.884120

access: closed

type: Journal Article

metadata version: 2020-05-27

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Pyung-Su Han, Woo-Young Choi:
1.25/2.5-Gb/s Dual Bit-Rate Burst-Mode Clock Recovery Circuits in 0.18- μħbox m CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 54-II(1): 38-42 (2007)

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