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"Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal."

Mario Garrido (2019)

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DOI: 10.1109/TCSII.2018.2880921

access: closed

type: Journal Article

metadata version: 2020-05-27

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Mario Garrido:
Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal. IEEE Trans. Circuits Syst. II Express Briefs 66-II(4): 657-661 (2019)

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