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"Exploiting Parity Computation Latency for On-Chip Crosstalk Reduction."

Bo Fu, Paul Ampadu (2010)

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DOI: 10.1109/TCSII.2010.2043472

access: closed

type: Journal Article

metadata version: 2020-05-27

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Bo Fu, Paul Ampadu:
Exploiting Parity Computation Latency for On-Chip Crosstalk Reduction. IEEE Trans. Circuits Syst. II Express Briefs 57-II(5): 399-403 (2010)

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