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"Design and Comparison of Very Low-Voltage CMOS Output Stages."

Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo (2005)

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DOI: 10.1109/TCSI.2005.852005

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/AloisiGP05
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo:
Design and Comparison of Very Low-Voltage CMOS Output Stages. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(8): 1545-1556 (2005)

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